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fixed-clockDIðãdpll4_ck@d00éti,omap3-dpll-per-j-type-clock”""� D 0ã dpll4_m2_ck@d48éti,divider-clock” T?� H_ã$dpll4_m2x2_mul_ckéfixed-factor-clock”$v�ã%dpll4_m2x2_ck@d00éti,hsdiv-gate-clock”%ö� ‹ã&omap_96m_alwon_fckéfixed-factor-clock”&v�ã-dpll3_ck@d00éti,omap3-dpll-core-clock”""� @ 0ãdpll3_m3_ck@1140éti,divider-clock”öT�@_ã'dpll3_m3x2_mul_ckéfixed-factor-clock”'v�ã(dpll3_m3x2_ck@d00éti,hsdiv-gate-clock”(ö � ‹ã)emu_core_alwon_ckéfixed-factor-clock”)v�ãfsys_altclké fixed-clockDã2mcbsp_clksé fixed-clockDãdpll3_m2_ck@d40éti,divider-clock”öT� @_ãcore_ckéfixed-factor-clock”v�ã*dpll1_fck@940éti,divider-clock”*öT� @_ã+dpll1_ck@904éti,omap3-dpll-clock”"+�  $ @ 4ãdpll1_x2_ckéfixed-factor-clock”v�ã,dpll1_x2m2_ck@944éti,divider-clock”,T� D_ã@cm_96m_fckéfixed-factor-clock”-v�ã.omap_96m_fck@d40é ti,mux-clock”."ö� @ãIdpll4_m3_ck@e40éti,divider-clock” öT �@_ã/dpll4_m3x2_mul_ckéfixed-factor-clock”/v�ã0dpll4_m3x2_ck@d00éti,hsdiv-gate-clock”0ö� ‹ã1omap_54m_fck@d40é ti,mux-clock”12ö� @ã<cm_96m_d2_fckéfixed-factor-clock”.v�ã3omap_48m_fck@d40é ti,mux-clock”32ö� @ã4omap_12m_fckéfixed-factor-clock”4v�ãKdpll4_m4_ck@e40éti,divider-clock” T�@_ã5dpll4_m4x2_mul_ckéti,fixed-factor-clock”5¡¯¼ã6dpll4_m4x2_ck@d00éti,gate-clock”6ö� ‹¼ã�dpll4_m5_ck@f40éti,divider-clock” T?�@_ã7dpll4_m5x2_mul_ckéti,fixed-factor-clock”7¡¯¼ã8dpll4_m5x2_ck@d00éti,hsdiv-gate-clock”8ö� ‹¼ãndpll4_m6_ck@1140éti,divider-clock” öT?�@_ã9dpll4_m6x2_mul_ckéfixed-factor-clock”9v�ã:dpll4_m6x2_ck@d00éti,hsdiv-gate-clock”:ö� ‹ã;emu_per_alwon_ckéfixed-factor-clock”;v�ãgclkout2_src_gate_ck@d70é ti,composite-no-wait-gate-clock”*ö� pã=clkout2_src_mux_ck@d70éti,composite-mux-clock”*".<� pã>clkout2_src_ckéti,composite-clock”=>ã?sys_clkout2@d70éti,divider-clock”?öT@� pÏmpu_ckéfixed-factor-clock”@v�ãAarm_fck@924éti,divider-clock”A� $Temu_mpu_alwon_ckéfixed-factor-clock”Av�ãhl3_ick@a40éti,divider-clock”*T� @_ãBl4_ick@a40éti,divider-clock”BöT� @_ãCrm_ick@c40éti,divider-clock”CöT� @_gpt10_gate_fck@a00éti,composite-gate-clock”"ö � ãEgpt10_mux_fck@a40éti,composite-mux-clock”D"ö� @ãFgpt10_fckéti,composite-clock”EFgpt11_gate_fck@a00éti,composite-gate-clock”"ö � ãGgpt11_mux_fck@a40éti,composite-mux-clock”D"ö� @ãHgpt11_fckéti,composite-clock”GHcore_96m_fckéfixed-factor-clock”Iv�ãmmchs2_fck@a00éti,wait-gate-clock”� öã¹mmchs1_fck@a00éti,wait-gate-clock”� öãºi2c3_fck@a00éti,wait-gate-clock”� öã»i2c2_fck@a00éti,wait-gate-clock”� öã¼i2c1_fck@a00éti,wait-gate-clock”� öã½mcbsp5_gate_fck@a00éti,composite-gate-clock”ö � ã mcbsp1_gate_fck@a00éti,composite-gate-clock”ö � ã core_48m_fckéfixed-factor-clock”4v�ãJmcspi4_fck@a00éti,wait-gate-clock”J� öã¾mcspi3_fck@a00éti,wait-gate-clock”J� öã¿mcspi2_fck@a00éti,wait-gate-clock”J� öãÀmcspi1_fck@a00éti,wait-gate-clock”J� öãÁuart2_fck@a00éti,wait-gate-clock”J� öãÂuart1_fck@a00éti,wait-gate-clock”J� ö ãÃcore_12m_fckéfixed-factor-clock”Kv�ãLhdq_fck@a00éti,wait-gate-clock”L� öãÄcore_l3_ickéfixed-factor-clock”Bv�ãMsdrc_ick@a10éti,wait-gate-clock”M� öãŽgpmc_fckéfixed-factor-clock”Mv�core_l4_ickéfixed-factor-clock”Cv�ãNmmchs2_ick@a10éti,omap3-interface-clock”N� öãÅmmchs1_ick@a10éti,omap3-interface-clock”N� öãÆhdq_ick@a10éti,omap3-interface-clock”N� öãÇmcspi4_ick@a10éti,omap3-interface-clock”N� öãÈmcspi3_ick@a10éti,omap3-interface-clock”N� öãÉmcspi2_ick@a10éti,omap3-interface-clock”N� öãÊmcspi1_ick@a10éti,omap3-interface-clock”N� öãËi2c3_ick@a10éti,omap3-interface-clock”N� öãÌi2c2_ick@a10éti,omap3-interface-clock”N� öãÍi2c1_ick@a10éti,omap3-interface-clock”N� öãÎuart2_ick@a10éti,omap3-interface-clock”N� öãÏuart1_ick@a10éti,omap3-interface-clock”N� ö ãÐgpt11_ick@a10éti,omap3-interface-clock”N� ö ãÑgpt10_ick@a10éti,omap3-interface-clock”N� ö ãÒmcbsp5_ick@a10éti,omap3-interface-clock”N� ö ãÓmcbsp1_ick@a10éti,omap3-interface-clock”N� ö ãÔomapctrl_ick@a10éti,omap3-interface-clock”N� öãÕdss_tv_fck@e00éti,gate-clock”<�öã´dss_96m_fck@e00éti,gate-clock”I�öãµdss2_alwon_fck@e00éti,gate-clock”"�öã¶dummy_cké fixed-clockDgpt1_gate_fck@c00éti,composite-gate-clock”"ö� ãOgpt1_mux_fck@c40éti,composite-mux-clock”D"� @ãPgpt1_fckéti,composite-clock”OPã aes2_ick@a10éti,omap3-interface-clock”Nö� ãwkup_32k_fckéfixed-factor-clock”Dv�ãQgpio1_dbck@c00éti,gate-clock”Q� öã«sha12_ick@a10éti,omap3-interface-clock”N� öãÖwdt2_fck@c00éti,wait-gate-clock”Q� öã¬wdt2_ick@c10éti,omap3-interface-clock”R� öã­wdt1_ick@c10éti,omap3-interface-clock”R� öã®gpio1_ick@c10éti,omap3-interface-clock”R� öã¯omap_32ksync_ick@c10éti,omap3-interface-clock”R� öã°gpt12_ick@c10éti,omap3-interface-clock”R� öã±gpt1_ick@c10éti,omap3-interface-clock”R� öã²per_96m_fckéfixed-factor-clock”-v�ã per_48m_fckéfixed-factor-clock”4v�ãSuart3_fck@1000éti,wait-gate-clock”S�ö ã�gpt2_gate_fck@1000éti,composite-gate-clock”"ö�ãTgpt2_mux_fck@1040éti,composite-mux-clock”D"�@ãUgpt2_fckéti,composite-clock”TUã gpt3_gate_fck@1000éti,composite-gate-clock”"ö�ãVgpt3_mux_fck@1040éti,composite-mux-clock”D"ö�@ãWgpt3_fckéti,composite-clock”VWgpt4_gate_fck@1000éti,composite-gate-clock”"ö�ãXgpt4_mux_fck@1040éti,composite-mux-clock”D"ö�@ãYgpt4_fckéti,composite-clock”XYgpt5_gate_fck@1000éti,composite-gate-clock”"ö�ãZgpt5_mux_fck@1040éti,composite-mux-clock”D"ö�@ã[gpt5_fckéti,composite-clock”Z[gpt6_gate_fck@1000éti,composite-gate-clock”"ö�ã\gpt6_mux_fck@1040éti,composite-mux-clock”D"ö�@ã]gpt6_fckéti,composite-clock”\]gpt7_gate_fck@1000éti,composite-gate-clock”"ö�ã^gpt7_mux_fck@1040éti,composite-mux-clock”D"ö�@ã_gpt7_fckéti,composite-clock”^_gpt8_gate_fck@1000éti,composite-gate-clock”"ö �ã`gpt8_mux_fck@1040éti,composite-mux-clock”D"ö�@ãagpt8_fckéti,composite-clock”`agpt9_gate_fck@1000éti,composite-gate-clock”"ö �ãbgpt9_mux_fck@1040éti,composite-mux-clock”D"ö�@ãcgpt9_fckéti,composite-clock”bcper_32k_alwon_fckéfixed-factor-clock”Dv�ãdgpio6_dbck@1000éti,gate-clock”d�öã‘gpio5_dbck@1000éti,gate-clock”d�öã’gpio4_dbck@1000éti,gate-clock”d�öã“gpio3_dbck@1000éti,gate-clock”d�öã”gpio2_dbck@1000éti,gate-clock”d�ö ã•wdt3_fck@1000éti,wait-gate-clock”d�ö ã–per_l4_ickéfixed-factor-clock”Cv�ãegpio6_ick@1010éti,omap3-interface-clock”e�öã—gpio5_ick@1010éti,omap3-interface-clock”e�öã˜gpio4_ick@1010éti,omap3-interface-clock”e�öã™gpio3_ick@1010éti,omap3-interface-clock”e�öãšgpio2_ick@1010éti,omap3-interface-clock”e�ö ã›wdt3_ick@1010éti,omap3-interface-clock”e�ö ãœuart3_ick@1010éti,omap3-interface-clock”e�ö ã�uart4_ick@1010éti,omap3-interface-clock”e�öãžgpt9_ick@1010éti,omap3-interface-clock”e�ö ãŸgpt8_ick@1010éti,omap3-interface-clock”e�ö ã gpt7_ick@1010éti,omap3-interface-clock”e�öã¡gpt6_ick@1010éti,omap3-interface-clock”e�öã¢gpt5_ick@1010éti,omap3-interface-clock”e�öã£gpt4_ick@1010éti,omap3-interface-clock”e�öã¤gpt3_ick@1010éti,omap3-interface-clock”e�öã¥gpt2_ick@1010éti,omap3-interface-clock”e�öã¦mcbsp2_ick@1010éti,omap3-interface-clock”e�öã§mcbsp3_ick@1010éti,omap3-interface-clock”e�öã¨mcbsp4_ick@1010éti,omap3-interface-clock”e�öã©mcbsp2_gate_fck@1000éti,composite-gate-clock”ö�ãmcbsp3_gate_fck@1000éti,composite-gate-clock”ö�ãmcbsp4_gate_fck@1000éti,composite-gate-clock”ö�ãemu_src_mux_ck@1140é ti,mux-clock”"fgh�@ãiemu_src_ckéti,clkdm-gate-clock”iãjpclk_fck@1140éti,divider-clock”jöT�@_pclkx2_fck@1140éti,divider-clock”jöT�@_atclk_fck@1140éti,divider-clock”jöT�@_traceclk_src_fck@1140é ti,mux-clock”"fghö�@ãktraceclk_fck@1140éti,divider-clock”kö T�@_secure_32k_fcké fixed-clockD€ãlgpt12_fckéfixed-factor-clock”lv�ã wdt1_fckéfixed-factor-clock”lv�security_l4_ick2éfixed-factor-clock”Cv�ãmaes1_ick@a14éti,omap3-interface-clock”mö� ãrng_ick@a14éti,omap3-interface-clock”m� öãsha11_ick@a14éti,omap3-interface-clock”m� ödes1_ick@a14éti,omap3-interface-clock”m� öcam_mclk@f00éti,gate-clock”nö�¼cam_ick@f10é!ti,omap3-no-wait-interface-clock”C�öãÝcsi2_96m_fck@f00éti,gate-clock”�öãÞsecurity_l3_ickéfixed-factor-clock”Bv�ãopka_ick@a14éti,omap3-interface-clock”o� öicr_ick@a10éti,omap3-interface-clock”N� ödes2_ick@a10éti,omap3-interface-clock”N� ömspro_ick@a10éti,omap3-interface-clock”N� ömailboxes_ick@a10éti,omap3-interface-clock”N� össi_l4_ickéfixed-factor-clock”Cv�ãvsr1_fck@c00éti,wait-gate-clock”"� öãsr2_fck@c00éti,wait-gate-clock”"� öãsr_l4_ickéfixed-factor-clock”Cv�dpll2_fck@40éti,divider-clock”*öT�@_ãpdpll2_ck@4éti,omap3-dpll-clock”"p�$@4å÷ÿãqdpll2_m2_ck@44éti,divider-clock”qT�D_ãriva2_ck@0éti,wait-gate-clock”r�öãßmodem_fck@a00éti,omap3-interface-clock”"� öãàsad2d_ick@a10éti,omap3-interface-clock”B� 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compatibleinterrupt-parent#address-cells#size-cellsmodelbootargsi2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellsphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesregulator-always-onusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csstatusspi-max-frequencypendown-gpiovcc-supplyti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,swap-xywakeup-sourceti,dual-voltpbias-supplycd-gpioscd-invertedvmmc-supplybus-widthcap-sdio-irqcap-sd-highspeedcap-mmc-highspeedwp-gpios#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-securenum-portsport1-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthti,nand-ecc-optgpmc,mux-add-datagpmc,device-widthgpmc,wait-pingpmc,wait-monitoring-nsgpmc,burst-lengthgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-delay-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nslabelbank-widthgpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthphy-modesmsc,force-internal-phymultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicelinux,default-triggerti,modelti,mcbsp