Ð þíý“8ôÐ(Ãô˜Qheadacoustics,omap3-hatechnexion,omap3-tao3530ti,omap3430ti,omap34xxti,omap3 +37TI OMAP3 HEAD acoustics baseboard with TAO3530 SOMchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000cpus+cpu@0arm,cortex-a8scpuƒŠcpu–“सÇÓpmu@54000000arm,cortex-a8-pmuT€Ûædebugsssocti,omap-inframpu ti,omap3-mpuæmpuiva ti,iva2.2æivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bushÛ +ðæl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ ðHscm@2000ti,omap3-scmsimple-bus + ð pinmux@30 ti,omap3-padconfpinctrl-single08+÷,Jÿgdefaultu pinmux_hsusbb2_pins`ÀÂÄ Æ È Ê ¤ ¦ ¨ ª ¬ ® Ópinmux_mmc1_pinsP "$&Ó÷pinmux_mmc2_pins0(*,.02Óûpinmux_wlan_gpio^pinmux_uart3_pinsnApÓìpinmux_i2c3_pins’”Óópinmux_mcspi1_pins ˜šœžÓôpinmux_mcspi3_pins ¬®°²Óõpinmux_mcbsp3_pins <>@BÓpinmux_twl4030_pins°AÓípinmux_sound2_pinsnpinmux_led_blue_pinsàÓ pinmux_led_green_pinsöÓ pinmux_led_red_pinsþÓ pinmux_poweroff_pinsŽÓpinmux_powerdown_input_pins�Ófpga_boot0_pins êìîðÓfpga_boot1_pins rtvxÓscm_conf@270sysconsimple-busp0+ ðp0Ó pbias_regulator@2b0ti,pbias-omap3ti,pbias-omap°“ pbias_mmc_omap2430špbias_mmc_omap2430©w@Á-ÆÀÓöclocks+mcbsp5_mux_fck@68Ùti,composite-mux-clockƒ æhÓmcbsp5_fckÙti,composite-clockƒÓmcbsp1_mux_fck@4Ùti,composite-mux-clockƒ æÓmcbsp1_fckÙti,composite-clockƒÓýmcbsp2_mux_fck@4Ùti,composite-mux-clockƒæÓmcbsp2_fckÙti,composite-clockƒÓÿmcbsp3_mux_fck@68Ùti,composite-mux-clockƒhÓmcbsp3_fckÙti,composite-clockƒÓmcbsp4_mux_fck@68Ùti,composite-mux-clockƒæhÓmcbsp4_fckÙti,composite-clockƒÓclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+÷,Jÿpinmux_twl4030_vpins Óîtarget-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lórevsyscsyssý  ƒŠick+ ðH `  %disabledaes1@0 ti,omap3-aesPÛ,  1txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLórevsyscsyssý  ƒŠick+ ðH P  %disabledaes2@0 ti,omap3-aesPÛ,AB1txrxprm@48306000 ti,omap3-prmH0`@Û clocks+virt_16_8m_ckÙ fixed-clock;YÓ"osc_sys_ck@d40Ù ti,mux-clockƒ !" @Ó#sys_ck@1270Ùti,divider-clockƒ#æKpVÓ(sys_clkout1@d70Ùti,gate-clockƒ# pædpll3_x2_ckÙfixed-factor-clockƒ$mxdpll3_m2x2_ckÙfixed-factor-clockƒ%mxÓ'dpll4_x2_ckÙfixed-factor-clockƒ&mxcorex2_fckÙfixed-factor-clockƒ'mxÓ)wkup_l4_ickÙfixed-factor-clockƒ(mxÓXcorex2_d3_fckÙfixed-factor-clockƒ)mxÓ�corex2_d5_fckÙfixed-factor-clockƒ)mxÓ�clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclkÙ fixed-clock;omap_32k_fckÙ fixed-clock;€ÓJvirt_12m_ckÙ fixed-clock;·Óvirt_13m_ckÙ fixed-clock;Æ]@Óvirt_19200000_ckÙ fixed-clock;$øÓvirt_26000000_ckÙ fixed-clock;Œº€Ó virt_38_4m_ckÙ fixed-clock;IðÓ!dpll4_ck@d00Ùti,omap3-dpll-per-clockƒ(( D 0Ó&dpll4_m2_ck@d48Ùti,divider-clockƒ&K? HVÓ*dpll4_m2x2_mul_ckÙfixed-factor-clockƒ*mxÓ+dpll4_m2x2_ck@d00Ùti,gate-clockƒ+æ ‚Ó,omap_96m_alwon_fckÙfixed-factor-clockƒ,mxÓ3dpll3_ck@d00Ùti,omap3-dpll-core-clockƒ(( @ 0Ó$dpll3_m3_ck@1140Ùti,divider-clockƒ$æK@VÓ-dpll3_m3x2_mul_ckÙfixed-factor-clockƒ-mxÓ.dpll3_m3x2_ck@d00Ùti,gate-clockƒ.æ  ‚Ó/emu_core_alwon_ckÙfixed-factor-clockƒ/mxÓlsys_altclkÙ fixed-clock;Ó8mcbsp_clksÙ fixed-clock;Ódpll3_m2_ck@d40Ùti,divider-clockƒ$æK @VÓ%core_ckÙfixed-factor-clockƒ%mxÓ0dpll1_fck@940Ùti,divider-clockƒ0æK @VÓ1dpll1_ck@904Ùti,omap3-dpll-clockƒ(1  $ @ 4Ódpll1_x2_ckÙfixed-factor-clockƒmxÓ2dpll1_x2m2_ck@944Ùti,divider-clockƒ2K DVÓFcm_96m_fckÙfixed-factor-clockƒ3mxÓ4omap_96m_fck@d40Ù ti,mux-clockƒ4(æ @ÓOdpll4_m3_ck@e40Ùti,divider-clockƒ&æK @VÓ5dpll4_m3x2_mul_ckÙfixed-factor-clockƒ5mxÓ6dpll4_m3x2_ck@d00Ùti,gate-clockƒ6æ ‚Ó7omap_54m_fck@d40Ù ti,mux-clockƒ78æ @ÓBcm_96m_d2_fckÙfixed-factor-clockƒ4mxÓ9omap_48m_fck@d40Ù ti,mux-clockƒ98æ @Ó:omap_12m_fckÙfixed-factor-clockƒ:mxÓQdpll4_m4_ck@e40Ùti,divider-clockƒ&K@VÓ;dpll4_m4x2_mul_ckÙti,fixed-factor-clockƒ;˜¦³Ó<dpll4_m4x2_ck@d00Ùti,gate-clockƒ<æ ‚³Ó“dpll4_m5_ck@f40Ùti,divider-clockƒ&K?@VÓ=dpll4_m5x2_mul_ckÙti,fixed-factor-clockƒ=˜¦³Ó>dpll4_m5x2_ck@d00Ùti,gate-clockƒ>æ ‚³Ótdpll4_m6_ck@1140Ùti,divider-clockƒ&æK?@VÓ?dpll4_m6x2_mul_ckÙfixed-factor-clockƒ?mxÓ@dpll4_m6x2_ck@d00Ùti,gate-clockƒ@æ ‚ÓAemu_per_alwon_ckÙfixed-factor-clockƒAmxÓmclkout2_src_gate_ck@d70Ù ti,composite-no-wait-gate-clockƒ0æ pÓCclkout2_src_mux_ck@d70Ùti,composite-mux-clockƒ0(4B pÓDclkout2_src_ckÙti,composite-clockƒCDÓEsys_clkout2@d70Ùti,divider-clockƒEæK@ pÆmpu_ckÙfixed-factor-clockƒFmxÓGarm_fck@924Ùti,divider-clockƒG $Kemu_mpu_alwon_ckÙfixed-factor-clockƒGmxÓnl3_ick@a40Ùti,divider-clockƒ0K @VÓHl4_ick@a40Ùti,divider-clockƒHæK @VÓIrm_ick@c40Ùti,divider-clockƒIæK @Vgpt10_gate_fck@a00Ùti,composite-gate-clockƒ(æ  ÓKgpt10_mux_fck@a40Ùti,composite-mux-clockƒJ(æ @ÓLgpt10_fckÙti,composite-clockƒKLgpt11_gate_fck@a00Ùti,composite-gate-clockƒ(æ  ÓMgpt11_mux_fck@a40Ùti,composite-mux-clockƒJ(æ @ÓNgpt11_fckÙti,composite-clockƒMNcore_96m_fckÙfixed-factor-clockƒOmxÓ mmchs2_fck@a00Ùti,wait-gate-clockƒ  æÓ¾mmchs1_fck@a00Ùti,wait-gate-clockƒ  æÓ¿i2c3_fck@a00Ùti,wait-gate-clockƒ  æÓÀi2c2_fck@a00Ùti,wait-gate-clockƒ  æÓÁi2c1_fck@a00Ùti,wait-gate-clockƒ  æÓÂmcbsp5_gate_fck@a00Ùti,composite-gate-clockƒæ  Ómcbsp1_gate_fck@a00Ùti,composite-gate-clockƒæ  Ócore_48m_fckÙfixed-factor-clockƒ:mxÓPmcspi4_fck@a00Ùti,wait-gate-clockƒP æÓÃmcspi3_fck@a00Ùti,wait-gate-clockƒP æÓÄmcspi2_fck@a00Ùti,wait-gate-clockƒP æÓÅmcspi1_fck@a00Ùti,wait-gate-clockƒP æÓÆuart2_fck@a00Ùti,wait-gate-clockƒP æÓÇuart1_fck@a00Ùti,wait-gate-clockƒP æ ÓÈcore_12m_fckÙfixed-factor-clockƒQmxÓRhdq_fck@a00Ùti,wait-gate-clockƒR æÓÉcore_l3_ickÙfixed-factor-clockƒHmxÓSsdrc_ick@a10Ùti,wait-gate-clockƒS æÓ”gpmc_fckÙfixed-factor-clockƒSmxcore_l4_ickÙfixed-factor-clockƒImxÓTmmchs2_ick@a10Ùti,omap3-interface-clockƒT æÓÊmmchs1_ick@a10Ùti,omap3-interface-clockƒT æÓËhdq_ick@a10Ùti,omap3-interface-clockƒT æÓÌmcspi4_ick@a10Ùti,omap3-interface-clockƒT æÓÍmcspi3_ick@a10Ùti,omap3-interface-clockƒT æÓÎmcspi2_ick@a10Ùti,omap3-interface-clockƒT æÓÏmcspi1_ick@a10Ùti,omap3-interface-clockƒT æÓÐi2c3_ick@a10Ùti,omap3-interface-clockƒT æÓÑi2c2_ick@a10Ùti,omap3-interface-clockƒT æÓÒi2c1_ick@a10Ùti,omap3-interface-clockƒT æÓÓuart2_ick@a10Ùti,omap3-interface-clockƒT æÓÔuart1_ick@a10Ùti,omap3-interface-clockƒT æ ÓÕgpt11_ick@a10Ùti,omap3-interface-clockƒT æ ÓÖgpt10_ick@a10Ùti,omap3-interface-clockƒT æ Ó×mcbsp5_ick@a10Ùti,omap3-interface-clockƒT æ ÓØmcbsp1_ick@a10Ùti,omap3-interface-clockƒT æ ÓÙomapctrl_ick@a10Ùti,omap3-interface-clockƒT æÓÚdss_tv_fck@e00Ùti,gate-clockƒBæÓ¹dss_96m_fck@e00Ùti,gate-clockƒOæÓºdss2_alwon_fck@e00Ùti,gate-clockƒ(æÓ»dummy_ckÙ fixed-clock;gpt1_gate_fck@c00Ùti,composite-gate-clockƒ(æ ÓUgpt1_mux_fck@c40Ùti,composite-mux-clockƒJ( @ÓVgpt1_fckÙti,composite-clockƒUVÓaes2_ick@a10Ùti,omap3-interface-clockƒTæ Ówkup_32k_fckÙfixed-factor-clockƒJmxÓWgpio1_dbck@c00Ùti,gate-clockƒW æÓ°sha12_ick@a10Ùti,omap3-interface-clockƒT æÓÛwdt2_fck@c00Ùti,wait-gate-clockƒW æÓ±wdt2_ick@c10Ùti,omap3-interface-clockƒX æÓ²wdt1_ick@c10Ùti,omap3-interface-clockƒX æÓ³gpio1_ick@c10Ùti,omap3-interface-clockƒX æÓ´omap_32ksync_ick@c10Ùti,omap3-interface-clockƒX æÓµgpt12_ick@c10Ùti,omap3-interface-clockƒX æÓ¶gpt1_ick@c10Ùti,omap3-interface-clockƒX æÓ·per_96m_fckÙfixed-factor-clockƒ3mxÓper_48m_fckÙfixed-factor-clockƒ:mxÓYuart3_fck@1000Ùti,wait-gate-clockƒYæ Ó–gpt2_gate_fck@1000Ùti,composite-gate-clockƒ(æÓZgpt2_mux_fck@1040Ùti,composite-mux-clockƒJ(@Ó[gpt2_fckÙti,composite-clockƒZ[Ógpt3_gate_fck@1000Ùti,composite-gate-clockƒ(æÓ\gpt3_mux_fck@1040Ùti,composite-mux-clockƒJ(æ@Ó]gpt3_fckÙti,composite-clockƒ\]gpt4_gate_fck@1000Ùti,composite-gate-clockƒ(æÓ^gpt4_mux_fck@1040Ùti,composite-mux-clockƒJ(æ@Ó_gpt4_fckÙti,composite-clockƒ^_gpt5_gate_fck@1000Ùti,composite-gate-clockƒ(æÓ`gpt5_mux_fck@1040Ùti,composite-mux-clockƒJ(æ@Óagpt5_fckÙti,composite-clockƒ`agpt6_gate_fck@1000Ùti,composite-gate-clockƒ(æÓbgpt6_mux_fck@1040Ùti,composite-mux-clockƒJ(æ@Ócgpt6_fckÙti,composite-clockƒbcgpt7_gate_fck@1000Ùti,composite-gate-clockƒ(æÓdgpt7_mux_fck@1040Ùti,composite-mux-clockƒJ(æ@Óegpt7_fckÙti,composite-clockƒdegpt8_gate_fck@1000Ùti,composite-gate-clockƒ(æ Ófgpt8_mux_fck@1040Ùti,composite-mux-clockƒJ(æ@Óggpt8_fckÙti,composite-clockƒfggpt9_gate_fck@1000Ùti,composite-gate-clockƒ(æ Óhgpt9_mux_fck@1040Ùti,composite-mux-clockƒJ(æ@Óigpt9_fckÙti,composite-clockƒhiper_32k_alwon_fckÙfixed-factor-clockƒJmxÓjgpio6_dbck@1000Ùti,gate-clockƒjæÓ—gpio5_dbck@1000Ùti,gate-clockƒjæÓ˜gpio4_dbck@1000Ùti,gate-clockƒjæÓ™gpio3_dbck@1000Ùti,gate-clockƒjæÓšgpio2_dbck@1000Ùti,gate-clockƒjæ Ó›wdt3_fck@1000Ùti,wait-gate-clockƒjæ Óœper_l4_ickÙfixed-factor-clockƒImxÓkgpio6_ick@1010Ùti,omap3-interface-clockƒkæÓ�gpio5_ick@1010Ùti,omap3-interface-clockƒkæÓžgpio4_ick@1010Ùti,omap3-interface-clockƒkæÓŸgpio3_ick@1010Ùti,omap3-interface-clockƒkæÓ gpio2_ick@1010Ùti,omap3-interface-clockƒkæ Ó¡wdt3_ick@1010Ùti,omap3-interface-clockƒkæ Ó¢uart3_ick@1010Ùti,omap3-interface-clockƒkæ Ó£uart4_ick@1010Ùti,omap3-interface-clockƒkæÓ¤gpt9_ick@1010Ùti,omap3-interface-clockƒkæ Ó¥gpt8_ick@1010Ùti,omap3-interface-clockƒkæ Ó¦gpt7_ick@1010Ùti,omap3-interface-clockƒkæÓ§gpt6_ick@1010Ùti,omap3-interface-clockƒkæÓ¨gpt5_ick@1010Ùti,omap3-interface-clockƒkæÓ©gpt4_ick@1010Ùti,omap3-interface-clockƒkæÓªgpt3_ick@1010Ùti,omap3-interface-clockƒkæÓ«gpt2_ick@1010Ùti,omap3-interface-clockƒkæÓ¬mcbsp2_ick@1010Ùti,omap3-interface-clockƒkæÓ­mcbsp3_ick@1010Ùti,omap3-interface-clockƒkæÓ®mcbsp4_ick@1010Ùti,omap3-interface-clockƒkæÓ¯mcbsp2_gate_fck@1000Ùti,composite-gate-clockƒæÓmcbsp3_gate_fck@1000Ùti,composite-gate-clockƒæÓmcbsp4_gate_fck@1000Ùti,composite-gate-clockƒæÓemu_src_mux_ck@1140Ù ti,mux-clockƒ(lmn@Óoemu_src_ckÙti,clkdm-gate-clockƒoÓppclk_fck@1140Ùti,divider-clockƒpæK@Vpclkx2_fck@1140Ùti,divider-clockƒpæK@Vatclk_fck@1140Ùti,divider-clockƒpæK@Vtraceclk_src_fck@1140Ù ti,mux-clockƒ(lmnæ@Óqtraceclk_fck@1140Ùti,divider-clockƒqæ K@Vsecure_32k_fckÙ fixed-clock;€Órgpt12_fckÙfixed-factor-clockƒrmxÓwdt1_fckÙfixed-factor-clockƒrmxsecurity_l4_ick2Ùfixed-factor-clockƒImxÓsaes1_ick@a14Ùti,omap3-interface-clockƒsæ Órng_ick@a14Ùti,omap3-interface-clockƒs æÓþsha11_ick@a14Ùti,omap3-interface-clockƒs ædes1_ick@a14Ùti,omap3-interface-clockƒs æcam_mclk@f00Ùti,gate-clockƒtæ³cam_ick@f10Ù!ti,omap3-no-wait-interface-clockƒIæÓâcsi2_96m_fck@f00Ùti,gate-clockƒ æÓãsecurity_l3_ickÙfixed-factor-clockƒHmxÓupka_ick@a14Ùti,omap3-interface-clockƒu æicr_ick@a10Ùti,omap3-interface-clockƒT ædes2_ick@a10Ùti,omap3-interface-clockƒT æmspro_ick@a10Ùti,omap3-interface-clockƒT æmailboxes_ick@a10Ùti,omap3-interface-clockƒT æssi_l4_ickÙfixed-factor-clockƒImxÓ|sr1_fck@c00Ùti,wait-gate-clockƒ( æÓsr2_fck@c00Ùti,wait-gate-clockƒ( æÓ sr_l4_ickÙfixed-factor-clockƒImxdpll2_fck@40Ùti,divider-clockƒ0æK@VÓvdpll2_ck@4Ùti,omap3-dpll-clockƒ(v$@4ÜîöÓwdpll2_m2_ck@44Ùti,divider-clockƒwKDVÓxiva2_ck@0Ùti,wait-gate-clockƒxæÓämodem_fck@a00Ùti,omap3-interface-clockƒ( æÓåsad2d_ick@a10Ùti,omap3-interface-clockƒH æÓæmad2d_ick@a18Ùti,omap3-interface-clockƒH æÓçmspro_fck@a00Ùti,wait-gate-clockƒ  æssi_ssr_gate_fck_3430es2@a00Ù ti,composite-no-wait-gate-clockƒ)æ Óyssi_ssr_div_fck_3430es2@a40Ùti,composite-divider-clockƒ)æ @$ Ózssi_ssr_fck_3430es2Ùti,composite-clockƒyzÓ{ssi_sst_fck_3430es2Ùfixed-factor-clockƒ{mxÓ hsotgusb_ick_3430es2@a10Ù"ti,omap3-hsotgusb-interface-clockƒS æÓ•ssi_ick_3430es2@a10Ùti,omap3-ssi-interface-clockƒ| æÓ usim_gate_fck@c00Ùti,composite-gate-clockƒOæ  Ó‡sys_d2_ckÙfixed-factor-clockƒ(mxÓ~omap_96m_d2_fckÙfixed-factor-clockƒOmxÓomap_96m_d4_fckÙfixed-factor-clockƒOmxÓ€omap_96m_d8_fckÙfixed-factor-clockƒOmxÓ�omap_96m_d10_fckÙfixed-factor-clockƒOmx Ó‚dpll5_m2_d4_ckÙfixed-factor-clockƒ}mxÓƒdpll5_m2_d8_ckÙfixed-factor-clockƒ}mxÓ„dpll5_m2_d16_ckÙfixed-factor-clockƒ}mxÓ…dpll5_m2_d20_ckÙfixed-factor-clockƒ}mxÓ†usim_mux_fck@c40Ùti,composite-mux-clock(ƒ(~€�‚ƒ„…†æ @VÓˆusim_fckÙti,composite-clockƒ‡ˆusim_ick@c10Ùti,omap3-interface-clockƒX æ Ó¸dpll5_ck@d04Ùti,omap3-dpll-clockƒ((  $ L 4ÜîÓ‰dpll5_m2_ck@d50Ùti,divider-clockƒ‰K PVÓ}sgx_gate_fck@b00Ùti,composite-gate-clockƒ0æ Ó‘core_d3_ckÙfixed-factor-clockƒ0mxÓŠcore_d4_ckÙfixed-factor-clockƒ0mxÓ‹core_d6_ckÙfixed-factor-clockƒ0mxÓŒomap_192m_alwon_fckÙfixed-factor-clockƒ,mxÓ�core_d2_ckÙfixed-factor-clockƒ0mxÓŽsgx_mux_fck@b40Ùti,composite-mux-clock ƒŠ‹Œ4�Ž�� @Ó’sgx_fckÙti,composite-clockƒ‘’Ósgx_ick@b10Ùti,wait-gate-clockƒH æÓècpefuse_fck@a08Ùti,gate-clockƒ( æÓÜts_fck@a08Ùti,gate-clockƒJ æÓÝusbtll_fck@a08Ùti,wait-gate-clockƒ} æÓÞusbtll_ick@a18Ùti,omap3-interface-clockƒT æÓßmmchs3_ick@a10Ùti,omap3-interface-clockƒT æÓàmmchs3_fck@a00Ùti,wait-gate-clockƒ  æÓádss1_alwon_fck_3430es2@e00Ùti,dss-gate-clockƒ“æ³Ó¼dss_ick_3430es2@e10Ùti,omap3-dss-interface-clockƒIæÓ½usbhost_120m_fck@1400Ùti,gate-clockƒ}æÓéusbhost_48m_fck@1400Ùti,dss-gate-clockƒ:æÓêusbhost_ick@1410Ùti,omap3-dss-interface-clockƒIæÓëclockdomainscore_l3_clkdmti,clockdomainƒ”•dpll3_clkdmti,clockdomainƒ$dpll1_clkdmti,clockdomainƒper_clkdmti,clockdomainhƒ–—˜™š›œ�žŸ ¡¢£¤¥¦§¨©ª«¬­®¯emu_clkdmti,clockdomainƒpdpll4_clkdmti,clockdomainƒ&wkup_clkdmti,clockdomain$ƒ°±²³´µ¶·¸dss_clkdmti,clockdomainƒ¹º»¼½core_l4_clkdmti,clockdomain”ƒ¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚÛÜÝÞßàácam_clkdmti,clockdomainƒâãiva2_clkdmti,clockdomainƒädpll2_clkdmti,clockdomainƒwd2d_clkdmti,clockdomain ƒåæçdpll5_clkdmti,clockdomainƒ‰sgx_clkdmti,clockdomainƒèusbhost_clkdmti,clockdomain ƒéêëtarget-module@48320000ti,sysc-omap2ti,syscH2H2 órevsysc ƒWµŠfckick+ ðH2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intcH Ótarget-module@48056000ti,sysc-omap2ti,syscH`H`,H`(órevsyscsyssý#   ƒSŠick+ ðH`dma-controller@0ti,omap3430-sdmati,omap-sdmaÛ $/ <`Ógpio@48310000ti,omap3-gpioH1Ûægpio1I[kgpio@49050000ti,omap3-gpioIÛægpio2[kgpio@49052000ti,omap3-gpioI Ûægpio3[kgpio@49054000ti,omap3-gpioI@Û ægpio4[kgpio@49056000ti,omap3-gpioI`Û!ægpio5[kÓgpio@49058000ti,omap3-gpioI€Û"ægpio6[kÓserial@4806a000ti,omap3-uartH  wH,121txrxæuart1;Ülserial@4806c000ti,omap3-uartHÀwI,341txrxæuart2;Ülserial@49020000ti,omap3-uartIwJ,561txrxæuart3;Ülgdefaultuìi2c@48070000 ti,omap3-i2cH€Û8,1txrx+æi2c1;'¬@twl@48HÛ  ti,twl4030gdefaultuíîaudioti,twl4030-audiocodecrtcti,twl4030-rtcÛ bciti,twl4030-bciÛ ‹ï™ð ¥vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2 švdd_ehci©w@Áw@¶regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1© 'ÀÁ Óregulator-vdacti,twl4030-vdac©w@Áw@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1©:�Á0°Óøregulator-vmmc2ti,twl4030-vmmc2©:�Á0°regulator-vusb1v5ti,twl4030-vusb1v5Óñregulator-vusb1v8ti,twl4030-vusb1v8Óòregulator-vusb3v1ti,twl4030-vusb3v1Óïregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2©w@Áw@regulator-vsimti,twl4030-vsim©w@Á-ÆÀÓùgpioti,twl4030-gpio[kÊÖá¡ÄÓútwl4030-usbti,twl4030-usbÛ îñüò ï!Ó pwmti,twl4030-pwm,pwmledti,twl4030-pwmled,pwrbuttonti,twl4030-pwrbuttonÛkeypadti,twl4030-keypadÛ7Gmadcti,twl4030-madcÛZÓði2c@48072000 ti,omap3-i2cH €Û9,1txrx+æi2c2 %disabledi2c@48060000 ti,omap3-i2cH€Û=,1txrx+æi2c3;† gdefaultuómailbox@48094000ti,omap3-mailboxæmailboxH @ÛlxŠdsp œ §spi@48098000ti,omap2-mcspiH €ÛA+æmcspi1²@,#$%&'()* 1tx0rx0tx1rx1tx2rx2tx3rx3gdefaultuôspidev@0spidevÀÜlÒspi@4809a000ti,omap2-mcspiH  ÛB+æmcspi2² ,+,-.1tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH €Û[+æmcspi3² ,1tx0rx0tx1rx1gdefaultuõspidev@0spidevÀÜlÒspi@480ba000ti,omap2-mcspiH  Û0+æmcspi4²,FG1tx0rx01w@480b2000 ti,omap3-1wH Û:æhdq1wmmc@4809c000ti,omap3-hsmmcH ÀÛSæmmc1Û,=>1txrxèögdefaultu÷õøù úmmc@480b4000ti,omap3-hsmmcH @ÛVæmmc2,/01txrxgdefaultuûõü!/mmc@480ad000ti,omap3-hsmmcH ÐÛ^æmmc3,MN1txrx %disabledmmu@480bd400Bti,omap2-iommuH Ô€Ûæmmu_ispOÓ mmu@5d000000Bti,omap2-iommu]€Ûæmmu_iva %disabledwdt@48314000 ti,omap3-wdtH1@€ æwd_timer2mcbsp@48074000ti,omap3-mcbspH@ÿómpu Û;< _commontxrxo€æmcbsp1, 1txrxƒýŠfck %disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Dórevsyscsyssý ƒþŠick+ ðH rng@0 ti,omap2-rng Û4mcbsp@49022000ti,omap3-mcbspI ÿI€ÿ ómpusidetoneÛ>?_commontxrxsidetoneoæmcbsp2mcbsp2_sidetone,!"1txrxƒÿ­Šfckick%okayÓmcbsp@49024000ti,omap3-mcbspI@ÿI ÿ ómpusidetoneÛYZ_commontxrxsidetoneo€æmcbsp3mcbsp3_sidetone,1txrxƒ®Šfckick%okaygdefaultumcbsp@49026000ti,omap3-mcbspI`ÿómpu Û67 _commontxrxo€æmcbsp4,1txrxƒŠfck~ %disabledmcbsp@48096000ti,omap3-mcbspH `ÿómpu ÛQR _commontxrxo€æmcbsp5,1txrxƒŠfck %disabledsham@480c3000ti,omap3-shamæshamH 0dÛ1,E1rx %disabledtarget-module@48318000ti,sysc-omap2-timerti,syscH1€H1€H1€órevsyscsyssý'  ƒ·Šfckick+ ðH1€�£timer@0ti,omap3430-timer€ƒŠfckÛ%®½ÍJtarget-module@49032000ti,sysc-omap2-timerti,syscI I I órevsyscsyssý'  ƒ¬Šfckick+ ðI timer@0ti,omap3430-timerÛ&timer@49034000ti,omap3430-timerI@Û'ætimer3timer@49036000ti,omap3430-timerI`Û(ætimer4timer@49038000ti,omap3430-timerI€Û)ætimer5ätimer@4903a000ti,omap3430-timerI Û*ætimer6ätimer@4903c000ti,omap3430-timerIÀÛ+ætimer7ätimer@4903e000ti,omap3430-timerIàÛ,ætimer8ñätimer@49040000ti,omap3430-timerIÛ-ætimer9ñtimer@48086000ti,omap3430-timerH`Û.ætimer10ñtimer@48088000ti,omap3430-timerH€Û/ætimer11ñtarget-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@órevsyscsyssý'  ƒ¶Šfckick+ ðH0@timer@0ti,omap3430-timerÛ_®þusbhstll@48062000 ti,usbhs-tllH ÛN æusb_tll_hsusbhshost@48064000ti,usbhs-hostH@ æusb_host_hs+ð ehci-phyohci@48064400ti,ohci-omap3HDÛLehci@48064800 ti,ehci-omapHHÛM1gpmc@6e000000ti,omap3430-gpmcægpmcnÐÛ,1rxtx6B+[kð0Ónand@0,0ti,omap2-nand  ÛTcusw…“$¥$·ÆÙ$ìú0 &H7HH6W+x-loader@0 iX-Loaderbootloaders@80000iU-Bootbootloaders_env@260000 iU-Boot Env&kernel@280000iKernel(@filesystem@680000 iFile Systemh˜usb_otg_hs@480ab000ti,omap3-musbH °Û\]_mcdma æusb_otg_hsoz‚ ‹š 1  ¢usb2-phy¬2dss@48050000 ti,omap3-dssH %disabled ædss_coreƒ¼Šfck+ðdispc@48050400ti,omap3-dispcHÛ ædss_dispcƒ¼Šfckencoder@4804fc00 ti,omap3-dsiHüHþ@Hÿ óprotophypllÛ %disabled ædss_dsi1ƒ¼» Šfcksys_clk+encoder@48050800ti,omap3-rfbiH %disabled ædss_rfbiƒ¼½Šfckickencoder@48050c00ti,omap3-vencH  %disabled ædss_vencƒ¹Šfckssi-controller@48058000 ti,omap3-ssiæssi%okayH€H�ósysgddÛG_gdd_mpu+ð ƒ{   Šssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portH H¨ótxrxÛCDssi-port@4805b000ti,omap3-ssi-portH°H¸ótxrxÛEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%Ø$+÷,Jÿisp@480bc000 ti,omap3-ispH ÀüH Ø|Û² “ l¹Ùports+bandgap@48002524H%$ti,omap34xx-bandgapÅÓtarget-module@480cb000ti,sysc-omap3430-srti,syscæsmartreflex_coreH °$ósyscýƒ Šfck+ ðH °smartreflex@0ti,omap3-smartreflex-coreÛtarget-module@480c9000ti,sysc-omap3430-srti,syscæsmartreflex_mpu_ivaH �$ósyscýƒŠfck+ ðH �smartreflex@480c9000ti,omap3-smartreflex-mpu-ivaÛtarget-module@50000000ti,sysc-omap2ti,syscPórevƒèŠfckick+ ðP@opp-tableoperating-points-v2-ti-cpu“ Óopp1-125000000ÛsY@ âà˜à˜à˜ðÿÿÿÿopp2-250000000Ûæ²€ âg8g8g8ðÿÿÿÿopp3-500000000ÛÍe âO€O€O€ðÿÿÿÿopp4-550000000Û ÈU€ âtxtxtxðÿÿÿÿopp5-600000000Û#ÃF â™p™p™pðÿÿÿÿopp6-720000000Û*êT â™p™p™pðÿÿÿÿ thermal-zonescpu_thermalú.è<N Itripscpu_alertY8€eÐzpassiveÓcpu_critY_�eÐ zcriticalcooling-mapsmap0p uÿÿÿÿÿÿÿÿmemory@80000000smemory€hsusb2_power_regregulator-fixed šhsusb2_vbus©2Z Á2Z  „ú‰pÓhsusb2_phyusb-nop-xceiv š¦!Ósoundti,omap-twl4030 ±omap3beagleºregulator-mmc2-sdio-poweronregulator-fixedšregulator-mmc2-sdio-poweron©0°Á0° „‰'Óügpio_poweroffgdefaultugpio-poweroff  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2device_typeregclocksclock-namesclock-latencyoperating-points-v2#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskstatusdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesregulator-always-onti,use-ledsti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencyspi-cphati,dual-voltpbias-supplyvmmc-supplyvqmmc-supplycd-gpiosbus-widthnon-removablecap-power-off-card#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,wr-access-nslabelmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespoweriommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicegpiostartup-delay-usreset-gpiosvcc-supplyti,modelti,mcbsp