Ð þí—8  ( ÷ h0ti,omap3-gta04ti,omap3630ti,omap36xxti,omap3 +7Goldelico GTA04A4/Letux 2804chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/serial@4806a000j/ocp@68000000/serial@4806c000r/ocp@68000000/serial@49020000z/ocp@68000000/serial@49042000‚/spi_lcd/td028ttec1@0 ‹/connectorcpus+cpu@0arm,cortex-a8”cpu ¤«cpu·“àÅÙäóÿ$pmu@54000000arm,cortex-a8-pmu T€debugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus h +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus  +  pinmux@30 ti,omap3-padconfpinctrl-single 08+#2CXvÿ“default¡ÿïpinmux_hsusb2_pins0«¤ ¦ ¨ ª ¬ ® ÿpinmux_uart1_pins«RLÿépinmux_uart2_pins«JHÿêpinmux_uart3_pins«npÿðpinmux_mmc1_pins0«ÿbacklight_pins_pinmux«Šÿ.pinmux_dss_dpi_pins૤¦¨ª¬®°²´¶¸º¼¾ÀÂÄÆÈÊÌÎÐÒÔÖØÚÿpinmux_gps_pins«F ÿëhdq_pins«–ÿpinmux_bmp085_pins«ÿøpinmux_bma180_pins« ÿúpinmux_itg3200_pins«ˆÿûpinmux_hmc5843_pins«ÿýpinmux_penirq_pins«dÿþpinmux_camera_pins «ÜÞàâäæèêìîðòôöøúüþ pinmux_mcbsp1_pins0«\^`bfhÿpinmux_mcbsp2_pins « ÿ pinmux_mcbsp3_pins «<>@Bÿ pinmux_mcbsp4_pins«TVZÿpinmux_twl4030_pins«°Aÿòscm_conf@270sysconsimple-bus p0+ p0ÿpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap °¿pbias_mmc_omap2430Æpbias_mmc_omap2430Õw@í-ÆÀÿclocks+mcbsp5_mux_fck@68ti,composite-mux-clock¤  hÿ mcbsp5_fckti,composite-clock¤ ÿmcbsp1_mux_fck@4ti,composite-mux-clock¤  ÿ mcbsp1_fckti,composite-clock¤ ÿmcbsp2_mux_fck@4ti,composite-mux-clock¤  ÿmcbsp2_fckti,composite-clock¤ÿ mcbsp3_mux_fck@68ti,composite-mux-clock¤  hÿmcbsp3_fckti,composite-clock¤ÿ mcbsp4_mux_fck@68ti,composite-mux-clock¤  hÿmcbsp4_fckti,composite-clock¤ÿ clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single  \+#2CXvÿpinmux_gpio1_pins«AAÿèpinmux_twl4030_vpins «ÿótarget-module@480a6000ti,sysc-omap2ti,sysc H `DH `HH `Lrevsyscsyss) 6D¤«ick+ H ` aes1@0 ti,omap3-aes PQ  Vtxrxtarget-module@480c5000ti,sysc-omap2ti,sysc H PDH PHH PLrevsyscsyss) 6D¤«ick+ H P aes2@0 ti,omap3-aes PQABVtxrxprm@48306000 ti,omap3-prm H0`@ clocks+virt_16_8m_ck fixed-clock`Yÿosc_sys_ck@d40 ti,mux-clock¤  @ÿsys_ck@1270ti,divider-clock¤p p{ÿ#sys_clkout1@d70ti,gate-clock¤  pdpll3_x2_ckfixed-factor-clock¤’�dpll3_m2x2_ckfixed-factor-clock¤ ’�ÿ"dpll4_x2_ckfixed-factor-clock¤!’�corex2_fckfixed-factor-clock¤"’�ÿ$wkup_l4_ickfixed-factor-clock¤#’�ÿScorex2_d3_fckfixed-factor-clock¤$’�ÿŠcorex2_d5_fckfixed-factor-clock¤$’�ÿ‹clockdomainscm@48004000 ti,omap3-cm H@@clocks+dummy_apb_pclk fixed-clock`omap_32k_fck fixed-clock`€ÿEvirt_12m_ck fixed-clock`·ÿvirt_13m_ck fixed-clock`Æ]@ÿvirt_19200000_ck fixed-clock`$øÿvirt_26000000_ck fixed-clock`Œº€ÿvirt_38_4m_ck fixed-clock`Iðÿdpll4_ck@d00ti,omap3-dpll-per-j-type-clock¤##  D 0ÿ!dpll4_m2_ck@d48ti,divider-clock¤!p?  H{ÿ%dpll4_m2x2_mul_ckfixed-factor-clock¤%’�ÿ&dpll4_m2x2_ck@d00ti,hsdiv-gate-clock¤&  §ÿ'omap_96m_alwon_fckfixed-factor-clock¤'’�ÿ.dpll3_ck@d00ti,omap3-dpll-core-clock¤##  @ 0ÿdpll3_m3_ck@1140ti,divider-clock¤p @{ÿ(dpll3_m3x2_mul_ckfixed-factor-clock¤(’�ÿ)dpll3_m3x2_ck@d00ti,hsdiv-gate-clock¤)   §ÿ*emu_core_alwon_ckfixed-factor-clock¤*’�ÿgsys_altclk fixed-clock`ÿ3mcbsp_clks fixed-clock`ÿ dpll3_m2_ck@d40ti,divider-clock¤p  @{ÿ core_ckfixed-factor-clock¤ ’�ÿ+dpll1_fck@940ti,divider-clock¤+p  @{ÿ,dpll1_ck@904ti,omap3-dpll-clock¤#,   $ @ 4ÿdpll1_x2_ckfixed-factor-clock¤’�ÿ-dpll1_x2m2_ck@944ti,divider-clock¤-p  D{ÿAcm_96m_fckfixed-factor-clock¤.’�ÿ/omap_96m_fck@d40 ti,mux-clock¤/#  @ÿJdpll4_m3_ck@e40ti,divider-clock¤!p  @{ÿ0dpll4_m3x2_mul_ckfixed-factor-clock¤0’�ÿ1dpll4_m3x2_ck@d00ti,hsdiv-gate-clock¤1  §ÿ2omap_54m_fck@d40 ti,mux-clock¤23  @ÿ=cm_96m_d2_fckfixed-factor-clock¤/’�ÿ4omap_48m_fck@d40 ti,mux-clock¤43  @ÿ5omap_12m_fckfixed-factor-clock¤5’�ÿLdpll4_m4_ck@e40ti,divider-clock¤!p @{ÿ6dpll4_m4x2_mul_ckti,fixed-factor-clock¤6½ËØÿ7dpll4_m4x2_ck@d00ti,gate-clock¤7  §ØÿŽdpll4_m5_ck@f40ti,divider-clock¤!p? @{ÿ8dpll4_m5x2_mul_ckti,fixed-factor-clock¤8½ËØÿ9dpll4_m5x2_ck@d00ti,hsdiv-gate-clock¤9  §Øÿodpll4_m6_ck@1140ti,divider-clock¤!p? @{ÿ:dpll4_m6x2_mul_ckfixed-factor-clock¤:’�ÿ;dpll4_m6x2_ck@d00ti,hsdiv-gate-clock¤;  §ÿ<emu_per_alwon_ckfixed-factor-clock¤<’�ÿhclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock¤+  pÿ>clkout2_src_mux_ck@d70ti,composite-mux-clock¤+#/=  pÿ?clkout2_src_ckti,composite-clock¤>?ÿ@sys_clkout2@d70ti,divider-clock¤@p@  pëmpu_ckfixed-factor-clock¤A’�ÿBarm_fck@924ti,divider-clock¤B  $pemu_mpu_alwon_ckfixed-factor-clock¤B’�ÿil3_ick@a40ti,divider-clock¤+p  @{ÿCl4_ick@a40ti,divider-clock¤Cp  @{ÿDrm_ick@c40ti,divider-clock¤Dp  @{gpt10_gate_fck@a00ti,composite-gate-clock¤#   ÿFgpt10_mux_fck@a40ti,composite-mux-clock¤E#  @ÿGgpt10_fckti,composite-clock¤FGgpt11_gate_fck@a00ti,composite-gate-clock¤#   ÿHgpt11_mux_fck@a40ti,composite-mux-clock¤E#  @ÿIgpt11_fckti,composite-clock¤HIcore_96m_fckfixed-factor-clock¤J’�ÿmmchs2_fck@a00ti,wait-gate-clock¤  ÿºmmchs1_fck@a00ti,wait-gate-clock¤  ÿ»i2c3_fck@a00ti,wait-gate-clock¤  ÿ¼i2c2_fck@a00ti,wait-gate-clock¤  ÿ½i2c1_fck@a00ti,wait-gate-clock¤  ÿ¾mcbsp5_gate_fck@a00ti,composite-gate-clock¤    ÿ mcbsp1_gate_fck@a00ti,composite-gate-clock¤    ÿ core_48m_fckfixed-factor-clock¤5’�ÿKmcspi4_fck@a00ti,wait-gate-clock¤K  ÿ¿mcspi3_fck@a00ti,wait-gate-clock¤K  ÿÀmcspi2_fck@a00ti,wait-gate-clock¤K  ÿÁmcspi1_fck@a00ti,wait-gate-clock¤K  ÿÂuart2_fck@a00ti,wait-gate-clock¤K  ÿÃuart1_fck@a00ti,wait-gate-clock¤K   ÿÄcore_12m_fckfixed-factor-clock¤L’�ÿMhdq_fck@a00ti,wait-gate-clock¤M  ÿÅcore_l3_ickfixed-factor-clock¤C’�ÿNsdrc_ick@a10ti,wait-gate-clock¤N  ÿ�gpmc_fckfixed-factor-clock¤N’�core_l4_ickfixed-factor-clock¤D’�ÿOmmchs2_ick@a10ti,omap3-interface-clock¤O  ÿÆmmchs1_ick@a10ti,omap3-interface-clock¤O  ÿÇhdq_ick@a10ti,omap3-interface-clock¤O  ÿÈmcspi4_ick@a10ti,omap3-interface-clock¤O  ÿÉmcspi3_ick@a10ti,omap3-interface-clock¤O  ÿÊmcspi2_ick@a10ti,omap3-interface-clock¤O  ÿËmcspi1_ick@a10ti,omap3-interface-clock¤O  ÿÌi2c3_ick@a10ti,omap3-interface-clock¤O  ÿÍi2c2_ick@a10ti,omap3-interface-clock¤O  ÿÎi2c1_ick@a10ti,omap3-interface-clock¤O  ÿÏuart2_ick@a10ti,omap3-interface-clock¤O  ÿÐuart1_ick@a10ti,omap3-interface-clock¤O   ÿÑgpt11_ick@a10ti,omap3-interface-clock¤O   ÿÒgpt10_ick@a10ti,omap3-interface-clock¤O   ÿÓmcbsp5_ick@a10ti,omap3-interface-clock¤O   ÿÔmcbsp1_ick@a10ti,omap3-interface-clock¤O   ÿÕomapctrl_ick@a10ti,omap3-interface-clock¤O  ÿÖdss_tv_fck@e00ti,gate-clock¤= ÿµdss_96m_fck@e00ti,gate-clock¤J ÿ¶dss2_alwon_fck@e00ti,gate-clock¤# ÿ·dummy_ck fixed-clock`gpt1_gate_fck@c00ti,composite-gate-clock¤#  ÿPgpt1_mux_fck@c40ti,composite-mux-clock¤E#  @ÿQgpt1_fckti,composite-clock¤PQÿaes2_ick@a10ti,omap3-interface-clock¤O  ÿwkup_32k_fckfixed-factor-clock¤E’�ÿRgpio1_dbck@c00ti,gate-clock¤R  ÿ¬sha12_ick@a10ti,omap3-interface-clock¤O  ÿ×wdt2_fck@c00ti,wait-gate-clock¤R  ÿ­wdt2_ick@c10ti,omap3-interface-clock¤S  ÿ®wdt1_ick@c10ti,omap3-interface-clock¤S  ÿ¯gpio1_ick@c10ti,omap3-interface-clock¤S  ÿ°omap_32ksync_ick@c10ti,omap3-interface-clock¤S  ÿ±gpt12_ick@c10ti,omap3-interface-clock¤S  ÿ²gpt1_ick@c10ti,omap3-interface-clock¤S  ÿ³per_96m_fckfixed-factor-clock¤.’�ÿper_48m_fckfixed-factor-clock¤5’�ÿTuart3_fck@1000ti,wait-gate-clock¤T  ÿ‘gpt2_gate_fck@1000ti,composite-gate-clock¤# ÿUgpt2_mux_fck@1040ti,composite-mux-clock¤E# @ÿVgpt2_fckti,composite-clock¤UVÿgpt3_gate_fck@1000ti,composite-gate-clock¤# ÿWgpt3_mux_fck@1040ti,composite-mux-clock¤E# @ÿXgpt3_fckti,composite-clock¤WXgpt4_gate_fck@1000ti,composite-gate-clock¤# ÿYgpt4_mux_fck@1040ti,composite-mux-clock¤E# @ÿZgpt4_fckti,composite-clock¤YZgpt5_gate_fck@1000ti,composite-gate-clock¤# ÿ[gpt5_mux_fck@1040ti,composite-mux-clock¤E# @ÿ\gpt5_fckti,composite-clock¤[\gpt6_gate_fck@1000ti,composite-gate-clock¤# ÿ]gpt6_mux_fck@1040ti,composite-mux-clock¤E# @ÿ^gpt6_fckti,composite-clock¤]^gpt7_gate_fck@1000ti,composite-gate-clock¤# ÿ_gpt7_mux_fck@1040ti,composite-mux-clock¤E# @ÿ`gpt7_fckti,composite-clock¤_`gpt8_gate_fck@1000ti,composite-gate-clock¤#  ÿagpt8_mux_fck@1040ti,composite-mux-clock¤E# @ÿbgpt8_fckti,composite-clock¤abgpt9_gate_fck@1000ti,composite-gate-clock¤#  ÿcgpt9_mux_fck@1040ti,composite-mux-clock¤E# @ÿdgpt9_fckti,composite-clock¤cdper_32k_alwon_fckfixed-factor-clock¤E’�ÿegpio6_dbck@1000ti,gate-clock¤e ÿ’gpio5_dbck@1000ti,gate-clock¤e ÿ“gpio4_dbck@1000ti,gate-clock¤e ÿ”gpio3_dbck@1000ti,gate-clock¤e ÿ•gpio2_dbck@1000ti,gate-clock¤e  ÿ–wdt3_fck@1000ti,wait-gate-clock¤e  ÿ—per_l4_ickfixed-factor-clock¤D’�ÿfgpio6_ick@1010ti,omap3-interface-clock¤f ÿ˜gpio5_ick@1010ti,omap3-interface-clock¤f ÿ™gpio4_ick@1010ti,omap3-interface-clock¤f ÿšgpio3_ick@1010ti,omap3-interface-clock¤f ÿ›gpio2_ick@1010ti,omap3-interface-clock¤f  ÿœwdt3_ick@1010ti,omap3-interface-clock¤f  ÿ�uart3_ick@1010ti,omap3-interface-clock¤f  ÿžuart4_ick@1010ti,omap3-interface-clock¤f ÿŸgpt9_ick@1010ti,omap3-interface-clock¤f  ÿ gpt8_ick@1010ti,omap3-interface-clock¤f  ÿ¡gpt7_ick@1010ti,omap3-interface-clock¤f ÿ¢gpt6_ick@1010ti,omap3-interface-clock¤f ÿ£gpt5_ick@1010ti,omap3-interface-clock¤f ÿ¤gpt4_ick@1010ti,omap3-interface-clock¤f ÿ¥gpt3_ick@1010ti,omap3-interface-clock¤f ÿ¦gpt2_ick@1010ti,omap3-interface-clock¤f ÿ§mcbsp2_ick@1010ti,omap3-interface-clock¤f ÿ¨mcbsp3_ick@1010ti,omap3-interface-clock¤f ÿ©mcbsp4_ick@1010ti,omap3-interface-clock¤f ÿªmcbsp2_gate_fck@1000ti,composite-gate-clock¤  ÿmcbsp3_gate_fck@1000ti,composite-gate-clock¤  ÿmcbsp4_gate_fck@1000ti,composite-gate-clock¤  ÿemu_src_mux_ck@1140 ti,mux-clock¤#ghi @ÿjemu_src_ckti,clkdm-gate-clock¤jÿkpclk_fck@1140ti,divider-clock¤kp @{pclkx2_fck@1140ti,divider-clock¤kp @{atclk_fck@1140ti,divider-clock¤kp @{traceclk_src_fck@1140 ti,mux-clock¤#ghi @ÿltraceclk_fck@1140ti,divider-clock¤l p @{secure_32k_fck fixed-clock`€ÿmgpt12_fckfixed-factor-clock¤m’�ÿwdt1_fckfixed-factor-clock¤m’�security_l4_ick2fixed-factor-clock¤D’�ÿnaes1_ick@a14ti,omap3-interface-clock¤n  ÿrng_ick@a14ti,omap3-interface-clock¤n  ÿsha11_ick@a14ti,omap3-interface-clock¤n  des1_ick@a14ti,omap3-interface-clock¤n  cam_mclk@f00ti,gate-clock¤o Øcam_ick@f10!ti,omap3-no-wait-interface-clock¤D ÿÞcsi2_96m_fck@f00ti,gate-clock¤ ÿßsecurity_l3_ickfixed-factor-clock¤C’�ÿppka_ick@a14ti,omap3-interface-clock¤p  icr_ick@a10ti,omap3-interface-clock¤O  des2_ick@a10ti,omap3-interface-clock¤O  mspro_ick@a10ti,omap3-interface-clock¤O  mailboxes_ick@a10ti,omap3-interface-clock¤O  ssi_l4_ickfixed-factor-clock¤D’�ÿwsr1_fck@c00ti,wait-gate-clock¤#  ÿ sr2_fck@c00ti,wait-gate-clock¤#  ÿsr_l4_ickfixed-factor-clock¤D’�dpll2_fck@40ti,divider-clock¤+p @{ÿqdpll2_ck@4ti,omap3-dpll-clock¤#q $@4ÿrdpll2_m2_ck@44ti,divider-clock¤rp D{ÿsiva2_ck@0ti,wait-gate-clock¤s ÿàmodem_fck@a00ti,omap3-interface-clock¤#  ÿásad2d_ick@a10ti,omap3-interface-clock¤C  ÿâmad2d_ick@a18ti,omap3-interface-clock¤C  ÿãmspro_fck@a00ti,wait-gate-clock¤  ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock¤$  ÿtssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock¤$  @$/ÿussi_ssr_fck_3430es2ti,composite-clock¤tuÿvssi_sst_fck_3430es2fixed-factor-clock¤v’�ÿhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clock¤N  ÿ�ssi_ick_3430es2@a10ti,omap3-ssi-interface-clock¤w  ÿusim_gate_fck@c00ti,composite-gate-clock¤J   ÿ‚sys_d2_ckfixed-factor-clock¤#’�ÿyomap_96m_d2_fckfixed-factor-clock¤J’�ÿzomap_96m_d4_fckfixed-factor-clock¤J’�ÿ{omap_96m_d8_fckfixed-factor-clock¤J’�ÿ|omap_96m_d10_fckfixed-factor-clock¤J’� ÿ}dpll5_m2_d4_ckfixed-factor-clock¤x’�ÿ~dpll5_m2_d8_ckfixed-factor-clock¤x’�ÿdpll5_m2_d16_ckfixed-factor-clock¤x’�ÿ€dpll5_m2_d20_ckfixed-factor-clock¤x’�ÿ�usim_mux_fck@c40ti,composite-mux-clock(¤#yz{|}~€�  @{ÿƒusim_fckti,composite-clock¤‚ƒusim_ick@c10ti,omap3-interface-clock¤S   ÿ´dpll5_ck@d04ti,omap3-dpll-clock¤##   $ L 4ÿ„dpll5_m2_ck@d50ti,divider-clock¤„p  P{ÿxsgx_gate_fck@b00ti,composite-gate-clock¤+  ÿŒcore_d3_ckfixed-factor-clock¤+’�ÿ…core_d4_ckfixed-factor-clock¤+’�ÿ†core_d6_ckfixed-factor-clock¤+’�ÿ‡omap_192m_alwon_fckfixed-factor-clock¤'’�ÿˆcore_d2_ckfixed-factor-clock¤+’�ÿ‰sgx_mux_fck@b40ti,composite-mux-clock ¤…†‡/ˆ‰Š‹  @ÿ�sgx_fckti,composite-clock¤Œ�ÿ!sgx_ick@b10ti,wait-gate-clock¤C  ÿäcpefuse_fck@a08ti,gate-clock¤#  ÿØts_fck@a08ti,gate-clock¤E  ÿÙusbtll_fck@a08ti,wait-gate-clock¤x  ÿÚusbtll_ick@a18ti,omap3-interface-clock¤O  ÿÛmmchs3_ick@a10ti,omap3-interface-clock¤O  ÿÜmmchs3_fck@a00ti,wait-gate-clock¤  ÿÝdss1_alwon_fck_3430es2@e00ti,dss-gate-clock¤Ž Øÿ¸dss_ick_3430es2@e10ti,omap3-dss-interface-clock¤D ÿ¹usbhost_120m_fck@1400ti,gate-clock¤x ÿåusbhost_48m_fck@1400ti,dss-gate-clock¤5 ÿæusbhost_ick@1410ti,omap3-dss-interface-clock¤D ÿçuart4_fck@1000ti,wait-gate-clock¤T ÿ«clockdomainscore_l3_clkdmti,clockdomain¤��dpll3_clkdmti,clockdomain¤dpll1_clkdmti,clockdomain¤per_clkdmti,clockdomainl¤‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§¨©ª«emu_clkdmti,clockdomain¤kdpll4_clkdmti,clockdomain¤!wkup_clkdmti,clockdomain$¤¬­®¯°±²³´dss_clkdmti,clockdomain¤µ¶·¸¹core_l4_clkdmti,clockdomain”¤º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚÛÜÝcam_clkdmti,clockdomain¤Þßiva2_clkdmti,clockdomain¤àdpll2_clkdmti,clockdomain¤rd2d_clkdmti,clockdomain ¤áâãdpll5_clkdmti,clockdomain¤„sgx_clkdmti,clockdomain¤äusbhost_clkdmti,clockdomain ¤åæçtarget-module@48320000ti,sysc-omap2ti,sysc H2H2 revsysc6¤R±«fckick+ H2counter@0ti,omap-counter32k  interrupt-controller@48200000ti,omap3-intcC2 H ÿtarget-module@48056000ti,sysc-omap2ti,sysc H`H`,H`(revsyscsyss)# ; 6D¤N«ick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma  IT a`ÿgpio@48310000ti,omap3-gpio H1gpio1n€�C2“default¡èÿ%gpio@49050000ti,omap3-gpio Igpio2€�C2ÿügpio@49052000ti,omap3-gpio I gpio3€�C2gpio@49054000ti,omap3-gpio I@ gpio4€�C2ÿùgpio@49056000ti,omap3-gpio I`!gpio5€�C2ÿìgpio@49058000ti,omap3-gpio I€"gpio6€�C2ÿÿserial@4806a000ti,omap3-uart H  œHQ12Vtxrxuart1`Ül“default¡éserial@4806c000ti,omap3-uart HÀœIQ34Vtxrxuart2`Ül“default¡êgnsswi2wi,w2sg0004“default¡ë °ìÁíÌîserial@49020000ti,omap3-uart IœJïnQ56Vtxrxuart3`Ül“default¡ði2c@48070000 ti,omap3-i2c H€8QVtxrx+i2c1`'¬@twl@48 H ¤ñ«fck ti,twl4030C2“default¡òóaudioti,twl4030-audio×codecçpowerti,twl4030-powerûrtcti,twl4030-rtc bciti,twl4030-bci  ôõ %vac60ÔB–watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1Õ&% í-ÆÀregulator-vaux2ti,twl4030-vaux2Õ*¹€í*¹€Mregulator-vaux3ti,twl4030-vaux3Õ&% í&% regulator-vaux4ti,twl4030-vaux4Õ*¹€í0°ÿregulator-vdd1ti,twl4030-vdd1Õ 'Àí ÿregulator-vdacti,twl4030-vdacÕw@íw@ÿregulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1Õ:�í0°ÿregulator-vmmc2ti,twl4030-vmmc2Õ:�í0°regulator-vusb1v5ti,twl4030-vusb1v5ÿöregulator-vusb1v8ti,twl4030-vusb1v8ÿ÷regulator-vusb3v1ti,twl4030-vusb3v1ÿôregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2Õw@íw@Mÿregulator-vsimti,twl4030-vsimÕ*¹€í0°ÿígpioti,twl4030-gpio€�C2al¡Ãtwl4030-usbti,twl4030-usb yö‡÷•ô£¬ÿpwmti,twl4030-pwm·pwmledti,twl4030-pwmled·pwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadÂÒ ådisabledmadcti,twl4030-madcìÿõi2c@48072000 ti,omap3-i2c H €9QVtxrx+i2c2`€bmp085@77 bosch,bmp085 w“default¡ø ùbma180@41 bosch,bma180 A“default¡ú ùitg3200@68invensense,itg3200 h“default¡û ütca6507@45 ti,tca6507+ E€�ÿ3red_aux@0þgta04:red:aux green_aux@1þgta04:green:aux red_power@3þgta04:red:power  default-ongreen_power@4þgta04:green:power wifi_reset@6 gpiohmc5843@1ehoneywell,hmc5883l “default¡ý ùtsc2007@48 ti,tsc2007 H“default¡þ ÿ »ÿX*à=€Pèi|� ©m24lr64@50 atmel,24c64 Pi2c@48060000 ti,omap3-i2c H€=QVtxrx+i2c3`† mailbox@48094000ti,omap3-mailboxmailbox H @ÀÌÞdsp ð ûspi@48098000ti,omap2-mcspi H €A+mcspi1@Q#$%&'()* Vtx0rx0tx1rx1tx2rx2tx3rx3 ådisabledspi@4809a000ti,omap2-mcspi H  B+mcspi2 Q+,-.Vtx0rx0tx1rx1 ådisabledspi@480b8000ti,omap2-mcspi H €[+mcspi3 QVtx0rx0tx1rx1 ådisabledspi@480ba000ti,omap2-mcspi H  0+mcspi4QFGVtx0rx0 ådisabled1w@480b2000 ti,omap3-1w H :hdq1w“default¡mmc@4809c000ti,omap3-hsmmc H ÀSmmc1Q=>Vtxrx!“default¡.:DUmmc@480b4000ti,omap3-hsmmc H @Vmmc2Q/0Vtxrx.:D_rmmc@480ad000ti,omap3-hsmmc H Ð^mmc3QMNVtxrx ådisabledmmu@480bd400}ti,omap2-iommu H Ô€mmu_ispŠÿmmu@5d000000}ti,omap2-iommu ]€mmu_iva ådisabledwdt@48314000 ti,omap3-wdt H1@€ wd_timer2mcbsp@48074000ti,omap3-mcbsp H@ÿmpu ;< šcommontxrxª€mcbsp1Q Vtxrx¤«fckåokay¹“default¡target-module@480a0000ti,sysc-omap2ti,sysc H <H @H Drevsyscsyss)6D¤«ick+ H rng@0 ti,omap2-rng  4mcbsp@49022000ti,omap3-mcbsp I ÿI€ÿ mpusidetone>?šcommontxrxsidetoneªmcbsp2mcbsp2_sidetoneQ!"Vtxrx¤ ¨«fckickåokay“default¡ ÿ&mcbsp@49024000ti,omap3-mcbsp I@ÿI ÿ mpusidetoneYZšcommontxrxsidetoneª€mcbsp3mcbsp3_sidetoneQVtxrx¤ ©«fckickåokay¹“default¡ mcbsp@49026000ti,omap3-mcbsp I`ÿmpu 67 šcommontxrxª€mcbsp4QVtxrx¤ «fck¹åokay“default¡ÿ(mcbsp@48096000ti,omap3-mcbsp H `ÿmpu QR šcommontxrxª€mcbsp5QVtxrx¤«fck ådisabledsham@480c3000ti,omap3-shamsham H 0d1QEVrxtarget-module@48318000ti,sysc-omap2-timerti,sysc H1€H1€H1€revsyscsyss)' 6D¤³«fckick+ H1€ÊÞtimer@0ti,omap3430-timer €¤«fck%éøEtarget-module@49032000ti,sysc-omap2-timerti,sysc I I I revsyscsyss)' 6D¤§«fckick+ I timer@0ti,omap3430-timer &timer@49034000ti,omap3430-timer I@'timer3timer@49036000ti,omap3430-timer I`(timer4timer@49038000ti,omap3430-timer I€)timer5timer@4903a000ti,omap3430-timer I *timer6timer@4903c000ti,omap3430-timer IÀ+timer7timer@4903e000ti,omap3430-timer Ià,timer8,timer@49040000ti,omap3430-timer I-timer9,timer@48086000ti,omap3430-timer H`.timer10,timer@48088000ti,omap3430-timer H€/timer11,ÿ/target-module@48304000ti,sysc-omap2-timerti,sysc H0@H0@H0@revsyscsyss)' 6D¤²«fckick+ H0@timer@0ti,omap3430-timer _é9usbhstll@48062000 ti,usbhs-tll H N usb_tll_hsusbhshost@48064000ti,usbhs-host H@ usb_host_hs+ Iehci-phyohci@48064400ti,ohci-omap3 HDLTehci@48064800 ti,ehci-omap HHMlgpmc@6e000000ti,omap3430-gpmcgpmc nÐQVrxtxq}+C2€�0ÿnand@0,0ti,omap2-nand   �ham1 Ÿ¨+·É×,é,û ",06?(N@]RnR(‘©x-loader@0 þX-Loader bootloaders@80000þU-Boot bootloaders_env@240000 þU-Boot Env $kernel@280000þKernel (`filesystem@880000 þFile System ˆusb_otg_hs@480ab000ti,omap3-musb H °\]šmcdma usb_otg_hsºÅÍ Öål íusb2-phy§÷2dss@48050000 ti,omap3-dss Håokay dss_core¤¸«fck+“default¡ýdispc@48050400ti,omap3-dispc H dss_dispc¤¸«fckencoder@4804fc00 ti,omap3-dsi HüHþ@Hÿ protophypll ådisabled dss_dsi1¤¸· «fcksys_clk+encoder@48050800ti,omap3-rfbi H ådisabled dss_rfbi¤¸¹«fckickencoder@48050c00ti,omap3-venc H åokay dss_venc¤µ¶«fcktv_dac_clk portendpoint  ) 5ÿ1portendpoint  Hÿ,ssi-controller@48058000 ti,omap3-ssissiåokay H€H�sysgddGšgdd_mpu+ ¤v «ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-port H H¨txrxCDssi-port@4805b000ti,omap3-ssi-port H°H¸txrxEFserial@49042000ti,omap3-uart I PQQRVtxrxuart4`Ülregulator-abb-mpu ti,abb-v1 Æabb_mpu_iva+ H0rðH0hbase-addressint-address S¤# l }` �sO€7Èûÿpinmux@480025a0 ti,omap3-padconfpinctrl-single H% \+#2CXvÿ“default¡pinmux_hsusb2_2_pins0«PRT V X Z ÿspi_gpio_pinmux «8FHDÿ*isp@480bc000 ti,omap3-isp H ÀüH Ø ™¿ð  ports+port@0 endpoint ¬ Á: Ð Û è õ bandgap@48002524 H%$ti,omap36xx-bandgap ÿ"target-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_core H °8sysc) 6¤«fck+ H °smartreflex@0ti,omap3-smartreflex-core target-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_iva H �8sysc) 6¤ «fck+ H �smartreflex@480c9000ti,omap3-smartreflex-mpu-iva target-module@50000000ti,sysc-omap4ti,sysc PþPþ revsysc ; 6¤!ä«fckick+ Popp-tableoperating-points-v2-ti-cpu¿ÿopp50-300000000 #ᣠ*ssssss 8ÿÿÿÿ Iopp100-600000000 ##ÃF *O€O€O€O€O€O€ 8ÿÿÿÿopp130-800000000 #/¯ *7È7È7È7È7È7È 8ÿÿÿÿopp1g-1000000000 #;šÊ *ûûûûûû 8ÿÿÿÿ Uopp_supplyti,omap-opp-supply `ûthermal-zonescpu_thermal {ú ‘è ŸN  ¬"tripscpu_alert ¼8€ ÈЛpassiveÿ#cpu_crit ¼_� ÈÐ ›criticalcooling-mapsmap0 Ó# Ø$ÿÿÿÿÿÿÿÿmemory@80000000”memory € fixedregulatorregulator-fixedÆldo_3v3Õ2Z í2Z Mÿîoscillator fixed-clock`Œº€ÿñgpio-keys gpio-keysaux-buttonþaux ç© »% òantenna-detect gpio-keysgps-antenna-button þGPS_EXT_ANT  ç  »ì ì   òsoundti,omap-twl4030 #gta04 ,&sound_telephonysimple-audio-card 5GTA04 voice L' n' �i2s ¦ Ësimple-audio-card,cpu í(simple-audio-card,codec í)ÿ'gsm_codecoption,gtm601¹ÿ)spi_lcd spi-gpio+“default¡* ÷%  % % % td028ttec1@0tpo,td028ttec1  -†  ? H Q+þlcdportendpoint ,ÿbacklightpwm-backlight [-· `backlight, j (2<FPZd | “default¡.ÿ+pwm-11ti,omap-dmtimer-pwm •/· Ÿÿ-hsusb2_phyusb-nop-xceiv ¯ÿ¬ÿconnectorcomposite-video-connectorþtvportendpoint 0ÿ2opa362 ti,opa362 »%ports+port@0 endpoint 1ÿport@1 endpoint 2ÿ0wifi_pwrseqmmc-pwrseq-simple ¯3ÿpinmux_mcbsp1@48002274pinctrl-single H"t+ ÈX v#“default¡4pinmux_mcbsp1_devconf0_pins ãÿ4pinmux_tv_out@480022d8pinctrl-single H"Ø+ ÈX v�#“default¡5pinmux_tv_acbias_devconf1_pins ãÿ5 compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2mmc0mmc1serial0serial1serial2serial3display0display1device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedsirf,onoff-gpioslna-supplyvcc-supplyti,enable-vibrati,ramp_delay_valueti,use_poweroffbci3v1-supplyio-channelsio-channel-namesti,bb-uvoltti,bb-uampregulator-always-onti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnsstatus#io-channel-cellslabellinux,default-triggerti,x-plate-ohmstouchscreen-size-xtouchscreen-size-ytouchscreen-max-pressuretouchscreen-fuzz-xtouchscreen-fuzz-ytouchscreen-fuzz-pressuretouchscreen-inverted-y#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthti,non-removablebroken-cdcap-power-off-cardmmc-pwrseq#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsti,nand-ecc-optrb-gpiosnand-bus-widthgpmc,device-widthgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-off-nsgpmc,we-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,sync-clk-psmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda-supplyremote-endpointti,channelsti,invert-polaritydata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-typeti,isp-clock-divisorti,strobe-modedata-shifthsync-activevsync-activedata-activepclk-sample#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicelinux,codewakeup-sourcelinux,input-typedebounce-intervalti,modelti,mcbspsimple-audio-card,namesimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,formatsimple-audio-card,bitclock-inversionsimple-audio-card,frame-inversionsound-daigpio-sckgpio-misogpio-mosics-gpiosnum-chipselectsspi-max-frequencyspi-cpolspi-cphabacklightpwmspwm-namesbrightness-levelsdefault-brightness-levelti,timersti,clock-sourcereset-gpiosenable-gpiospinctrl-single,bit-per-muxpinctrl-single,bits