Ð þ훉8’ì(�’´(Phytec phyFLEX-i.MX6 Quad Carrier-Board2!phytec,imx6q-pbab01phytec,imx6q-pfla02fsl,imx6qchosen ,/soc/bus@2100000/serial@21f0000aliases"8/soc/bus@2100000/ethernet@2188000!B/soc/bus@2000000/flexcan@2090000!G/soc/bus@2000000/flexcan@2094000L/soc/bus@2000000/gpio@209c000R/soc/bus@2000000/gpio@20a0000X/soc/bus@2000000/gpio@20a4000^/soc/bus@2000000/gpio@20a8000d/soc/bus@2000000/gpio@20ac000j/soc/bus@2000000/gpio@20b0000p/soc/bus@2000000/gpio@20b4000v/soc/bus@2100000/i2c@21a0000{/soc/bus@2100000/i2c@21a4000€/soc/bus@2100000/i2c@21a8000…/soc/ipu@2400000Š/soc/bus@2100000/mmc@2190000�/soc/bus@2100000/mmc@2194000”/soc/bus@2100000/mmc@2198000™/soc/bus@2100000/mmc@219c0001ž/soc/bus@2000000/spba-bus@2000000/serial@2020000 ¦/soc/bus@2100000/serial@21e8000 ®/soc/bus@2100000/serial@21ec000 ¶/soc/bus@2100000/serial@21f0000 ¾/soc/bus@2100000/serial@21f4000.Æ/soc/bus@2000000/spba-bus@2000000/spi@2008000.Ë/soc/bus@2000000/spba-bus@2000000/spi@200c000.Ð/soc/bus@2000000/spba-bus@2000000/spi@2010000.Õ/soc/bus@2000000/spba-bus@2000000/spi@2014000Ú/soc/bus@2100000/usb@2184000ß/soc/bus@2100000/usb@2184200ä/soc/bus@2100000/usb@2184400é/soc/bus@2100000/usb@2184600 î/soc/bus@2000000/usbphy@20c9000 ö/soc/bus@2000000/usbphy@20ca000þ/soc/ipu@2800000./soc/bus@2000000/spba-bus@2000000/spi@2018000clocksckil!fsl,imx-ckilfixed-clock€ckih1!fsl,imx-ckih1fixed-clockosc!fsl,imx-oscfixed-clockn6ldb!fsl,imx6q-ldbfsl,imx53-ldb% )disabled@0!"'()*‡ˆ87di0_plldi1_plldi0_seldi1_seldi2_seldi3_seldi0di1lvds-channel@0C )disabledport@0CendpointGWQport@1CendpointGWUport@2CendpointGW[port@3CendpointGW_lvds-channel@1C )disabledport@0CendpointGWRport@1CendpointGWVport@2CendpointG W\port@3CendpointG W`pmu!arm,cortex-a9-pmu_  p^usbphynop1!usb-nop-xceiv{W0usbphynop2!usb-nop-xceiv{W1soc !simple-bus_ †dma-controller@110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbhC 0p    �gpmi0gpmi1gpmi2gpmi3�¨0jW nand-controller@112000!fsl,imx6q-gpmi-nandC @ µgpmi-nandbch p�bch(0˜™—–•07gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bch¿ Ärx-tx)okayÎdefaultÜ æhdmi@120000C� ps%0{| 7iahbisfr)okay!fsl,imx6q-hdmiport@0CendpointGWOport@1CendpointGWSport@2CendpointGWYport@3CendpointGW]gpu@130000 !vivante,gcC@ p 0zJ7buscoreshaderøgpu@134000 !vivante,gcC@@ p 0y 7buscoreøtimer@a00600!arm,cortex-a9-twd-timerC   p _0interrupt-controller@a01000!arm,cortex-a9-gic&C  _Wcache-controller@a02000!arm,pl310-cacheC   p\;I U evWapcie@1ffc000!fsl,imx6q-pciesnps,dw-pcieCÿÀ@ð µdbiconfigŠpci–ÿ0†�ø‚ð ª px�msi·€Ê { z y x0�ν7pciepcie_buspcie_phy)okayÎdefaultÜ Øbus@2000000!fsl,aips-bussimple-busC†spba-bus@2000000!fsl,spba-bussimple-busC†spdif@2004000!fsl,imx35-spdifC@@ p4 ¿ÄrxtxP0ôÅkv>œ:7corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba )disabledspi@2008000 !fsl,imx6q-ecspifsl,imx51-ecspiC€@ p0pp7ipgper ¿Ärxtx )disabledspi@200c000 !fsl,imx6q-ecspifsl,imx51-ecspiCÀ@ p 0qq7ipgper ¿Ärxtx )disabledspi@2010000 !fsl,imx6q-ecspifsl,imx51-ecspiC@ p!0rr7ipgper ¿Ärxtx)okayÎdefaultÜ ãflash@0!m25p80jedec,spi-norì1-Cspi@2014000 !fsl,imx6q-ecspifsl,imx51-ecspiC@@ p"0ss7ipgper ¿  Ärxtx )disabledserial@2020000!fsl,imx6q-uartfsl,imx21-uartC@ p0 ¡7ipgper ¿Ärxtx )disabledesai@2024000þ!fsl,imx35-esaiC@@ p3(0ÐÑvМ7corememextalfsysspba ¿Ärxtx )disabledssi@2028000þ!fsl,imx6q-ssifsl,imx51-ssiC€@ p.0²� 7ipgbaud ¿%&Ärxtx )disabledssi@202c000þ!fsl,imx6q-ssifsl,imx51-ssiCÀ@ p/0³ž 7ipgbaud ¿)*Ärxtx)okayWnssi@2030000þ!fsl,imx6q-ssifsl,imx51-ssiC@ p00´Ÿ 7ipgbaud ¿-.Ärxtx )disabledasrc@2034000!fsl,imx53-asrcC@@ p2˜0ÒÓkœ�7memipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`¿Ärxarxbrxctxatxbtxc»€,)okayspba@203c000CÀ@spi@2018000 !fsl,imx6q-ecspifsl,imx51-ecspiC€@ p#0tt7ipgper ¿  Ärxtx )disabledvpu@2040000!fsl,imx6q-vpucnm,coda960CÀp  �bitjpeg0¨Œ7perahbø;Baipstz@207c000CÀ@pwm@2080000G!fsl,imx6q-pwmfsl,imx27-pwmC@ pS0>‘7ipgper )disabledpwm@2084000G!fsl,imx6q-pwmfsl,imx27-pwmC@@ pT0>’7ipgper )disabledpwm@2088000G!fsl,imx6q-pwmfsl,imx27-pwmC€@ pU0>“7ipgper )disabledpwm@208c000G!fsl,imx6q-pwmfsl,imx27-pwmCÀ@ pV0>”7ipgper )disabledflexcan@2090000!fsl,imx6q-flexcanC @ pn0lm7ipgperR4)okayÎdefaultÜflexcan@2094000!fsl,imx6q-flexcanC @@ po0no7ipgperR4 )disabledtimer@2098000!fsl,imx6q-gptfsl,imx31-gptC €@ p70wxí7ipgperosc_pergpio@209c000!fsl,imx6q-gpiofsl,imx35-gpioC À@pBC`p&|ˆ�‹ŽŒ� Š Õ ÐÏÒÑt W7gpio@20a0000!fsl,imx6q-gpiofsl,imx35-gpioC @pDE`p&@|¿7#,W=gpio@20a4000!fsl,imx6q-gpiofsl,imx35-gpioC @@pFG`p&0|E$-W4gpio@20a8000!fsl,imx6q-gpiofsl,imx35-gpioC €@pHI`p&0|•~ WWgpio@20ac000!fsl,imx6q-gpiofsl,imx35-gpioC À@pJK`p&P|U"5g –gpio@20b0000!fsl,imx6q-gpiofsl,imx35-gpioC @pLM`p&p|¤6µºª Vgpio@20b4000!fsl,imx6q-gpiofsl,imx35-gpioC @@pNO`p&0|¬  ½ ’keypad@20b8000!fsl,imx6q-kppfsl,imx21-kppC €@ pR0> )disabledwatchdog@20bc000!fsl,imx6q-wdtfsl,imx21-wdtC À@ pP0>watchdog@20c0000!fsl,imx6q-wdtfsl,imx21-wdtC @ pQ0> )disabledclock-controller@20c4000!fsl,imx6q-ccmC @@pWXWanatop@20c8000#!fsl,imx6q-anatopsysconsimple-mfdC €$p16Wregulator-1p1!fsl,anatop-regulatorˆvdd1p1—B@¯O€ÇÛí* 5=ûPregulator-3p0!fsl,anatop-regulatorˆvdd3p0—*¹€¯0°ÇÛ í*( è=3á@Pregulator-2p5!fsl,anatop-regulatorˆvdd2p5—"U¯)ö0ÇÛ0í* =+ÞxPregulator-vddcore!fsl,anatop-regulatorˆvddarm— ¯ ÇÛ@íbpz‘* = ¨Wbregulator-vddpu!fsl,anatop-regulatorˆvddpu— ¯ ³|Û@í bpz‘* = ¨W"regulator-vddsoc!fsl,anatop-regulatorˆvddsoc— ¯ ÇÛ@íbpz‘* = ¨Wctempmon!fsl,imx6q-tempmon_  p1ÏÛ çcalibtemp_grade0¬øusbphy@20c9000"!fsl,imx6q-usbphyfsl,imx23-usbphyC � p,0¶W)usbphy@20ca000"!fsl,imx6q-usbphyfsl,imx23-usbphyC   p-0·W-snvs@20cc000#!fsl,sec-v4.0-monsysconsimple-mfdC À@W!snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp!æ4psnvs-poweroff!syscon-poweroff!æ8 `Å` )disabledsnvs-powerkey!fsl,sec-v4.0-pwrkey! p&t4 )disabledsnvs-lpgpr!fsl,imx6q-snvs-lpgprepit@20d0000C @ p8epit@20d4000C @@ p9reset-controller@20d8000!fsl,imx6q-srcfsl,imx51-srcC €@p[`BWgpc@20dc000!fsl,imx6q-gpcC À@& pY_0>7ipgW pgcpower-domain@0COpower-domain@1COc"00zJy�¨Wiomuxc-gpr@20e0000'!fsl,imx6q-iomuxc-gprsysconsimple-mfdC8Wmux-controller !mmio-muxp8ƒ À (( W#ipu1_csi0_mux !video-mux‘#port@0CendpointG$WCport@1Cendpointport@2CendpointG%WMipu2_csi1_mux !video-mux‘#port@0CendpointG&WFport@1Cendpointport@2CendpointG'WXpinctrl@20e0000!fsl,imx6q-iomuxcC@ÎdefaultÜ(Wimx6q-phytec-pfla02hoggrpxž¬À€|�€ €ð€°Ä€W(ecspi3grpHžxŒ±tˆ±p„±Wenetgrp€žÐä@°°ô°°Xl°0\p°0`t°0dx°0h|°0tˆ°0Ôè°°„˜D°0p„H°0xŒL°0|�P°0€”T°0l€X°0èü°°W2flexcan1grp0ž Ü䰰ذ°Wgpminandgrp˜žÔ¼°±ØÀ°±ÜݱàȰä̰±èа±ôܰ±øà°±ü䰱谱찱𰱠ô°±ø°±ü°±°±±W i2c1grp0ž¤¸˜@¸±ÄØœ@¸±W<i2c2grp0žŒ  @¸±�¤¤@¸±W>i2c3grp0ž”¨¨@¸±˜¬¬@¸±WApciegrpž`t€Wuart3grp`ž´È°±¸Ì 0°±Ðä ,°±Ìà°±WKuart4grp0žøÈ°±üÌ 8°±WLusbh1grpž ð€W/usbotggrpHž$ôÿ pYè D°°ì€W,usdhc2grp�žX@pYT<YThpYL`pYPdpY\DpYW6usdhc3grp�ž¸ pY¼¤YÀ¨pYĬpYȰpYÌ´pYW9usdhc3cdwp0žäø€ì€W:audmuxgrp`ž°ÄÜ0°´Èа¸Ìà0°¼ÐÌ0°WBdcic@20e4000C@@ p|dcic@20e8000C€@ p}dma-controller@20ec000!fsl,imx6q-sdmafsl,imx35-sdmaCÀ@ p0>›7ipgahb�§imx/sdma/sdma-imx6q.binWbus@2100000!fsl,aips-bussimple-busC†crypto@2100000 !fsl,sec-v4.0C † 0ñòóÄ7memaclkipgemi_slowjr@1000!fsl,sec-v4.0-job-ringC pijr@2000!fsl,sec-v4.0-job-ringC  pjaipstz@217c000CÀ@usb@2184000!fsl,imx6q-usbfsl,imx27-usbC@ p+0¢À)Ë*×èü)okay+ÎdefaultÜ,usb@2184200!fsl,imx6q-usbfsl,imx27-usbCB p(0¢À-Ë*1host×èü)okay.ÎdefaultÜ/usb@2184400!fsl,imx6q-usbfsl,imx27-usbCD p)0¢À09hsicË*1host×èü )disabledusb@2184600!fsl,imx6q-usbfsl,imx27-usbCF p*0¢À19hsicË*1host×èü )disabledusbmisc@2184800B!fsl,imx6q-usbmiscCH0¢W*ethernet@2188000!fsl,imx6q-fecC€@ �int0ppspvw 0uu¾¾7ipgahbptpenet_out R4)okayÎdefaultÜ2O3Zrgmiic  v4†5mdioethernet-phy@0!ethernet-phy-ieee802.3-c22C‘��DW3mlb@218c000CÀ@$p5u~mmc@2190000!fsl,imx6q-usdhcC@ p0£££ 7ipgahbper© )disabledmmc@2194000!fsl,imx6q-usdhcC@@ p0¤¤¤ 7ipgahbper©)okayÎdefaultÜ6 ³7 ¼7Å8mmc@2198000!fsl,imx6q-usdhcC€@ p0¥¥¥ 7ipgahbper©)okayÎdefaultÜ9: ³7 ¼7Å;mmc@219c000!fsl,imx6q-usdhcCÀ@ p0¦¦¦ 7ipgahbper© )disabledi2c@21a0000!fsl,imx6q-i2cfsl,imx21-i2cC@ p$0})okayÎdefaultÜ<eeprom@50 !atmel,24c32CPpmic@58 !dlg,da9063CX_=p &regulatorsbcore1— #�¯ ÇWbcore2— #�¯ ÇWbpro—ã`¯ã`Çbperi—2Z ¯2Z Çbmem—2Z ¯2Z Çbio—O€¯O€Çldo4—&% ¯&% ÇW5ldo5—-ÆÀ¯-ÆÀÇldo6—2Z ¯2Z Çldo9—2Z ¯2Z W;ldo10—2Z ¯2Z W8ldo11—-ÆÀ¯-ÆÀÇi2c@21a4000!fsl,imx6q-i2cfsl,imx21-i2cC@@ p%0~)okayÎdefaultÜ>† tlv320@18!ti,tlv320aic3007þCÑá?í?ú?@Wostmpe@41 !st,stmpe811CArtc@51!epson,rtc8564CQadc@64!maxim,max1037Cdi2c@21a8000!fsl,imx6q-i2cfsl,imx21-i2cC€@ p&0)okayÎdefaultÜA† romcp@21ac000CÀ@memory-controller@21b0000!fsl,imx6q-mmdcC@0memory-controller@21b4000!fsl,imx6q-mmdcC@@ )disabledweim@21b8000!fsl,imx6q-weimC€@ p0Ä )disabledefuse@21bc000!fsl,imx6q-ocotpsysconCÀ@0€speed-grade@10CWdcalib@38C8Wtemp-grade@20C W tzasc@21d0000C@ pltzasc@21d4000C@@ pmaudmux@21d8000"!fsl,imx6q-audmuxfsl,imx31-audmuxC€@)okayÎdefaultÜBssi2#3¥€pins5#3 mipi@21dc000!fsl,imx6-mipi-csi2CÀ@pde0Šîa 7dphyrefpix )disabledport@1CendpointGCW$port@2CendpointGDWNport@3CendpointGEWWport@4CendpointGFW&mipi@21e0000C@ )disabledportsport@0CendpointGGWPport@1CendpointGHWTport@2CendpointGIWZport@3CendpointGJW^vdoa@21e4000!fsl,imx6q-vdoaC@@ p0Êserial@21e8000!fsl,imx6q-uartfsl,imx21-uartC€@ p0 ¡7ipgper ¿Ärxtx )disabledserial@21ec000!fsl,imx6q-uartfsl,imx21-uartCÀ@ p0 ¡7ipgper ¿Ärxtx)okayÎdefaultÜKCserial@21f0000!fsl,imx6q-uartfsl,imx21-uartC@ p0 ¡7ipgper ¿ Ärxtx)okayÎdefaultÜLserial@21f4000!fsl,imx6q-uartfsl,imx21-uartC@@ p0 ¡7ipgper ¿!"Ärxtx )disabledipu@2400000!fsl,imx6q-ipuC@@p0‚ƒ„ 7busdi0di1;port@0CWeendpointGMW%port@1CWfendpointGNWDport@2CWiendpoint@0Cendpoint@1CGOWendpoint@2CGPWGendpoint@3CGQWendpoint@4CGRWport@3CWjendpoint@0Cendpoint@1CGSWendpoint@2CGTWHendpoint@3CGUWendpoint@4CGVWsram@900000 !mmio-sramC� †�0ŽWsata@2200000!fsl,imx6q-ahciC @ p'0š»i7satasata_refahb)okaygpu@2204000 !vivante,gcC @@ p 0�y 7buscoreøipu@2800000!fsl,imx6q-ipuC€@p0…†‰ 7busdi0di1;port@0CWgendpointGWWEport@1CWhendpointGXW'port@2CWkendpoint@0Cendpoint@1CGYWendpoint@2CGZWIendpoint@3CG[Wendpoint@4CG\W port@3CWlendpoint@1CG]Wendpoint@2CG^WJendpoint@3CG_Wendpoint@4CG`W cpuscpu@0!arm,cortex-a9ŠcpuCSa(dO€tx2 Ð Ð ÀíØ àà˜(uO€tx2 Ð Ð ÀíØ àíØŽîl(0hª)7armpll2_pfd2_396msteppll1_swpll1_sysœb§"±cÛd çspeed_gradecpu@1!arm,cortex-a9ŠcpuCSa(dO€tx2 Ð Ð ÀíØ àà˜(uO€tx2 Ð Ð ÀíØ àíØŽîl(0hª)7armpll2_pfd2_396msteppll1_swpll1_sysœb§"±ccpu@2!arm,cortex-a9ŠcpuCSa(dO€tx2 Ð Ð ÀíØ àà˜(uO€tx2 Ð Ð ÀíØ àíØŽîl(0hª)7armpll2_pfd2_396msteppll1_swpll1_sysœb§"±ccpu@3!arm,cortex-a9ŠcpuCSa(dO€tx2 Ð Ð ÀíØ àà˜(uO€tx2 Ð Ð ÀíØ àíØŽîl(0hª)7armpll2_pfd2_396msteppll1_swpll1_sysœb§"±ccapture-subsystem!fsl,imx-capture-subsystem¼efghdisplay-subsystem!fsl,imx-display-subsystem¼ijklmemory@10000000ŠmemoryC€regulators !simple-busregulator@0!regulator-fixedC ˆusb_otg_vbus—LK@¯LK@ ÞÂW+regulator@1!regulator-fixedC ˆusb_h1_vbus—LK@¯LK@ Þ7ÂW.regulator@2!regulator-fixedCˆi2s-audio-1v8—w@¯w@W@regulator@3!regulator-fixedCˆi2s-audio-3v3—2Z ¯2Z W?leds !gpio-ledsgreenÕphyflex:green æ7red Õphyflex:red æ=oscillator !fixed-clock$ø Ûtlv320-mclkWpsound!simple-audio-cardîOnboardTLV320AIC3007i2sm@mX_MicrophoneMic JackLineLine InLineLine OutSpeakerSpeakerHeadphoneHeadphone Jack²yLine OutLLOUTLine OutRLOUTSpeakerSPOPSpeakerSPOMHeadphone JackHPLOUTHeadphone JackHPROUTMIC3LMic JackMIC3RMic JackMic JackMic BiasLINE1LLine InLINE1RLine Insimple-audio-card,cpu“nsimple-audio-card,codec“o0pWm #address-cells#size-cellsmodelcompatiblestdout-pathethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usb0usb1usb2usb3usbphy0usbphy1ipu1spi4#clock-cellsclock-frequencygprstatusclocksclock-namesregremote-endpointphandleinterrupt-parentinterrupts#phy-cellsrangesinterrupt-names#dma-cellsdma-channelsreg-namesdmasdma-namespinctrl-namespinctrl-0nand-on-flash-bbtpower-domains#cooling-cells#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridedevice_typebus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-mapreset-gpiocs-gpiosspi-max-frequency#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsfsl,stop-modegpio-controller#gpio-cellsgpio-rangesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthvin-supplyregulator-enable-ramp-delayfsl,tempmonnvmem-cellsnvmem-cell-names#thermal-sensor-cellsfsl,anatopregmapvaluelinux,keycodewakeup-source#reset-cells#power-domain-cellspower-supply#mux-control-cellsmux-reg-masksmux-controlsfsl,pinsfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_modephy_type#index-cellsphy-handlephy-modephy-reset-durationphy-reset-gpiosphy-supplytxc-skew-psrxc-skew-psbus-widthcd-gpioswp-gpiosvmmc-supplyai3x-micbias-vgAVDD-supplyIOVDD-supplyDRVDD-supplyDVDD-supplyfsl,weim-cs-gprfsl,audmux-portfsl,port-configuart-has-rtsctsnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplypu-supplysoc-supplyportsenable-active-highlabelclock-output-namessimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-dai