Ð þíKœ8Fø(¤FÀ!Marvell Armada 388 DB-88F6820-GP4!marvell,a388-gpmarvell,armada388marvell,armada380aliases,/soc/internal-regs/gpio@181002/soc/internal-regs/gpio@18140 8/soc/internal-regs/serial@12000 @/soc/internal-regs/serial@12100pmu!arm,cortex-a9-pmuHsoc"!marvell,armada380-mbussimple-bus\gxàŠèP›ðñÿð ñ ñ ñ bootrom!marvell,bootrom ¢ devbus-bootcs!marvell,mvebu-devbus ¢ð›/ÿÿÿÿ¦ ­disableddevbus-cs0!marvell,mvebu-devbus ¢ð›>ÿÿÿÿ¦ ­disableddevbus-cs1!marvell,mvebu-devbus ¢ð›=ÿÿÿÿ¦ ­disableddevbus-cs2!marvell,mvebu-devbus ¢ð›;ÿÿÿÿ¦ ­disableddevbus-cs3!marvell,mvebu-devbus ¢ð ›7ÿÿÿÿ¦ ­disabledinternal-regs !simple-bus›ðsdramc@1400#!marvell,armada-xp-sdram-controller¢cache-controller@8000!arm,pl310-cache¢€´ÂÎçscu@c000!arm,cortex-a9-scu¢ÀXtimer@c200!arm,cortex-a9-global-timer¢Â  " ¦timer@c600!arm,cortex-a9-twd-timer¢Æ  " ¦interrupt-controller@d000!arm,cortex-a9-gic->¢ÐÁSi2c@11000+!marvell,mv78230-a0-i2cmarvell,mv64xxx-i2c¢  "¦­okay[defaultis† pca9555@20 !nxp,pca9555[defaultig"ƒ“>-¢ S'pca9555@21 !nxp,pca9555[defaultg"ƒ“>-¢!S$eeprom@57 !atmel,24c64¢Wi2c@11100+!marvell,mv78230-a0-i2cmarvell,mv64xxx-i2c¢  "¦ ­disabledserial@12000!!marvell,armada-38x-uartns16550a¢ Ÿ " ©¦­okay[defaultiserial@12100!!marvell,armada-38x-uartns16550a¢!Ÿ " ©¦ ­disabledpinctrl@18000¢€ !marvell,mv88f6828-pinctrlge-rgmii-pins-0D¶mpp6mpp7mpp8mpp9mpp10mpp11mpp12mpp13mpp14mpp15mpp16mpp17Ãge0S ge-rgmii-pins-1H¶mpp21mpp27mpp28mpp29mpp30mpp31mpp32mpp37mpp38mpp39mpp40mpp41Ãge1Si2c-pins-0 ¶mpp2mpp3Ãi2c0Smdio-pins ¶mpp4mpp5ÃgeSref-clk-pins-0¶mpp45ÃrefS ref-clk-pins-1¶mpp46Ãrefspi-pins-0¶mpp22mpp23mpp24mpp25Ãspi0S#spi-pins-1¶mpp56mpp57mpp58mpp59Ãspi1nand-pinsN¶mpp22mpp34mpp23mpp33mpp38mpp28mpp40mpp42mpp35mpp36mpp25mpp30mpp32Ãdevnand-rb¶mpp41Ãnanduart-pins-0 ¶mpp0mpp1Ãua0Suart-pins-1 ¶mpp19mpp20Ãua1sdhci-pins<¶mpp48mpp49mpp50mpp52mpp53mpp54mpp55mpp57mpp58mpp59Ãsd0S sata-pins-0¶mpp20Ãsata0Ssata-pins-1¶mpp19Ãsata1Ssata-pins-2¶mpp47Ãsata2Ssata-pins-3¶mpp44Ãsata3Spca0_pins¶mpp18ÃgpioSgpio@18100+!marvell,armada-370-gpiomarvell,orion-gpio¢�@�À ÔgpiopwmÞ ƒ“å>-0"5678¦Sgpio@18140+!marvell,armada-370-gpiomarvell,orion-gpio¢�@@�È ÔgpiopwmÞƒ“å>-0":;<=¦system-controller@18200M!marvell,armada-380-system-controllermarvell,armada-370-xp-system-controller¢‚clock-gating-control@18220 !marvell,armada-380-gating-clock¢‚ ¦ðS phy@18300!marvell,armada-380-comphy Ôcomphyconf¢ƒ„`phy@0¢ýphy@1¢ýphy@2¢ýphy@3¢ýphy@4¢ýphy@5¢ýmvebu-sar@18600!marvell,armada-380-core-clock¢†ðSmbus-controller@20000!marvell,mbus-controller¢€ PSinterrupt-controller@20a00 !marvell,mpic¢ ÐpX-> "Stimer@203001!marvell,armada-380-timermarvell,armada-xp-timer¢0@0PH    ¦  nbclkfixedwatchdog@20300!marvell,armada-380-wdt¢4‚` ¦  nbclkfixed H@ cpurst@20800!marvell,armada-370-cpu-reset¢mpcore-soc-ctrl@20d20#!marvell,armada-380-mpcore-soc-ctrl¢ lcoherency-fabric@21010$!marvell,armada-380-coherency-fabric¢pmsu@22000!marvell,armada-380-pmsu¢ ethernet@70000!marvell,armada-370-neta¢@H¦ #&H­okay[defaulti 1  5rgmii-id>MZethernet@30000!marvell,armada-370-neta¢@H ¦ ­okay[defaulti1 5rgmii-id>MZethernet@34000!marvell,armada-370-neta¢@@H ¦  ­disabledusb@58000!marvell,orion-ehci¢€ "¦ ­okayhxor@60800)!marvell,armada-380-xormarvell,orion-xor¢ ¦ ­okayxor00 "s�xor01 "s�Œxor@60900)!marvell,armada-380-xormarvell,orion-xor¢  ¦ ­okayxor10 "As�xor11 "Bs�Œmdio@72004!marvell,orion-mdio¢ ¦ [defaultiethernet-phy@1¢S ethernet-phy@0¢Scrypto@90000!marvell,armada-38x-crypto¢ Ôregs" ¦    cesa0cesa1cesaz0cesaz1š¯rtc@a3800!marvell,armada-380-rtc¢ 8 „   Ôrtcrtc-soc "sata@a8000!marvell,armada-380-ahci¢ €  "¦ ­okay[defaultisata-port@0¢Èsata-port@1¢Èbm@c8000!marvell,armada-380-neta-bm¢ €¬¦ Ö­okaySsata@e0000!marvell,armada-380-ahci¢  "¦ ­okay[defaultisata-port@0¢Èsata-port@1¢Èclock@e4250!!marvell,armada-380-corediv-clock¢BP ð¦ãnandSthermal@e8078!marvell,armada380-thermal¢@x@p­okaynand-controller@d0000"!marvell,armada370-nand-controller¢ T "T¦ ­disabledsdhci@d8000!marvell,armada-380-sdhciÔsdhcimbusconf-sdio3¢ € À„T "¦ ö­okay[defaulti  +usb3@f0000!marvell,armada-380-xhci¢@@@ "¦ ­okay5!usb3@f8000!marvell,armada-380-xhci¢€@À@ "¦ ­okay5"sa-sram0 !mmio-sram ¢ ¦ › Ssa-sram1 !mmio-sram ¢ ¦ › Sbm-bppi !mmio-sram ¢ › ¦ =­okaySspi@10600)!marvell,armada-380-spimarvell,orion-spi ¢ðPJ "¦­okay[defaulti#spi-flash@0!st,m25p128jedec,spi-nor¢Uúð€gspi@10680)!marvell,armada-380-spimarvell,orion-spi ¢ð€PJ "?¦ ­disabledpcie!marvell,armada-370-pcie­okayvpci‚�ÿP›‚ð ‚ð ‚@ð@ ‚€ð€ ‚è�à‚è�à‚Ø�Ђ¸�°pcie@1,0vpci—‚ ¢-@›‚‚���ÿª ½Ëݦ ­okaypcie@2,0vpci—‚ ¢-@›‚‚���ÿª ½!Ëݦ ­okaypcie@3,0vpci—‚@ ¢-@›‚‚���ÿª ½FËݦ ­okaypcie@4,0vpci—‚ € ¢ -@›‚‚���ÿª ½GËݦ  ­disabledgpio-fan !gpio-fan ß$ï ¸clocksmainpll !fixed-clockðs;šÊSoscillator !fixed-clockðs}x@S cpusmarvell,armada-380-smpcpu@0vcpu!arm,cortex-a9¢cpu@1vcpu!arm,cortex-a9¢chosenserial0:115200n8memoryvmemory¢€usb2_1_phy!usb-nop-xceivh%ýS!usb3_phy!usb-nop-xceivh&ýS"usb3-vbus!regulator-fixed usb3-vbus+LK@CLK@[ n$S&v5-vbus0!regulator-fixed v5.0-vbus0+LK@CLK@[s n$Sv5-vbus1!regulator-fixed v5.0-vbus1+LK@CLK@[ n'S%pwr-sata0!regulator-fixed pwr_en_sata0+·C·[‡ n'S(v5-sata0!regulator-fixed v5.0-sata0+LK@CLK@™(Sv12-sata0!regulator-fixed v12.0-sata0+·C·™(pwr-sata1 pwr_en_sata1!regulator-fixed+·C·[‡ n'S)v5-sata1!regulator-fixed v5.0-sata1+LK@CLK@™)Sv12-sata1!regulator-fixed v12.0-sata1+·C·™)pwr-sata2!regulator-fixed pwr_en_sata2[‡ n' S*v5-sata2!regulator-fixed v5.0-sata2+LK@CLK@™*Sv12-sata2!regulator-fixed v12.0-sata2+·C·™*pwr-sata3!regulator-fixed pwr_en_sata3[‡ n' S+v5-sata3!regulator-fixed v5.0-sata3+LK@CLK@™+Sv12-sata3!regulator-fixed v12.0-sata3+·C·™+ #address-cells#size-cellsmodelcompatiblegpio0gpio1serial0serial1interrupts-extendedcontrollerinterrupt-parentpcie-mem-aperturepcie-io-aperturerangesregclocksstatuscache-unifiedcache-levelarm,double-linefill-incrarm,double-linefill-wraparm,double-linefillprefetch-datainterrupts#interrupt-cellsinterrupt-controllerphandlepinctrl-namespinctrl-0clock-frequencygpio-controller#gpio-cellsreg-shiftreg-io-widthmarvell,pinsmarvell,functionreg-namesngpios#pwm-cells#clock-cells#phy-cellsmsi-controllerclock-namestx-csum-limitphyphy-modebuffer-managerbm,pool-longbm,pool-shortvcc-supplydmacap,memcpydmacap,xordmacap,memsetmarvell,crypto-sramsmarvell,crypto-sram-sizetarget-supplyinternal-memclock-output-namesmrvl,clk-delay-cyclesno-1-8-vbroken-cdwp-invertedbus-widthusb-phyno-memory-wccell-indexspi-max-frequencym25p,fast-readdevice_typemsi-parentbus-rangeassigned-addressesinterrupt-map-maskinterrupt-mapmarvell,pcie-portmarvell,pcie-lanegpio-fan,speed-mapenable-methodstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highgpioregulator-always-onregulator-boot-onvin-supply