Ð þíñj8æø( ræÀ!ti,am3517-evmti,am3517ti,omap3 +&7TI AM3517 EVM (AM3517/05 TMDSEVM3517)chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000/ocp@68000000/serial@4809e000‡/ocp@68000000/can@5c050000 ‹/display@0cpus+cpu@0arm,cortex-a8”cpu ¤«cpu·“àÅÙpmu@54000000arm,cortex-a8-pmu T€åðdebugsssocti,omap-inframpu ti,omap3-mpuðmpuiva ti,iva2.2ðiva údisableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus hå +ðl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus  +  pinmux@30 ti,omap3-padconfpinctrl-single 08+(=[ÿpinmux_i2c1_pinsxŠŒŒÑpinmux_wl12xx_buffer_pinsx&Œðpinmux_mmc2_pinsXx(*,.02468:–ŒÜpinmux_rtc_pinsx†ŒÒpinmux_tsc2004_pinsx¢ŒÔpinmux_uart2_pins(xDFHJˆŒÏpinmux_mcbsp1_pins x`bfhŒàpinmux_mcbsp2_pins x Œâpinmux_ethernet_pinsPxÎÐÒÔÖØÚÜÞàŒípinmux_i2c2_pinsxŽ�ŒÖpinmux_i2c3_pinsx’”Œ×pinmux_leds_pinsx$&Œþpinmux_mmc1_pins@x "ŒÙpinmux_pwm_pinsx¬Œpinmux_backlight_pinsx®Œpinmux_dss_dpi_pins¨x¢¤¦¨ª¬®°²´¶¸º¼¾ÀÂÄÆÈÊŒëpinmux_hsusb1_rst_pinsxŠŒscm_conf@270sysconsimple-bus p0+ p0Œpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap °”pbias_mmc_omap2430›pbias_mmc_omap2430ªw@Â-ÆÀŒØclocks+mcbsp5_mux_fck@68Úti,composite-mux-clock¤ç hŒ mcbsp5_fckÚti,composite-clock¤ Œåmcbsp1_mux_fck@4Úti,composite-mux-clock¤ç Œ mcbsp1_fckÚti,composite-clock¤ Œßmcbsp2_mux_fck@4Úti,composite-mux-clock¤ ç Œmcbsp2_fckÚti,composite-clock¤ Œámcbsp3_mux_fck@68Úti,composite-mux-clock¤  hŒmcbsp3_fckÚti,composite-clock¤Œãmcbsp4_mux_fck@68Úti,composite-mux-clock¤ ç hŒmcbsp4_fckÚti,composite-clock¤Œäemac_ick@32cÚti,am35xx-gate-clock¤ ,çŒyemac_fck@32cÚti,gate-clock¤ ,ç Œîvpfe_ick@32cÚti,am35xx-gate-clock¤ ,çŒzvpfe_fck@32cÚti,gate-clock¤ ,ç hsotgusb_ick_am35xx@32cÚti,am35xx-gate-clock¤ ,çŒ{hsotgusb_fck_am35xx@32cÚti,gate-clock¤ ,çŒ|hecc_ck@32cÚti,am35xx-gate-clock¤ ,çŒ}clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single  \+(=[ÿpinmux_wl12xx_wkup_pinsx Œóprm@48306000 ti,omap3-prm H0`@å clocks+virt_16_8m_ckÚ fixed-clockôYŒosc_sys_ck@d40Ú ti,mux-clock¤  @Œsys_ck@1270Úti,divider-clock¤ç pŒsys_clkout1@d70Úti,gate-clock¤  pçdpll3_x2_ckÚfixed-factor-clock¤&1dpll3_m2x2_ckÚfixed-factor-clock¤&1Œ!dpll4_x2_ckÚfixed-factor-clock¤ &1corex2_fckÚfixed-factor-clock¤!&1Œ"wkup_l4_ickÚfixed-factor-clock¤&1ŒQcorex2_d3_fckÚfixed-factor-clock¤"&1Œrcorex2_d5_fckÚfixed-factor-clock¤"&1Œsclockdomainscm@48004000 ti,omap3-cm H@@clocks+dummy_apb_pclkÚ fixed-clockôomap_32k_fckÚ fixed-clockô€ŒCvirt_12m_ckÚ fixed-clockô·Œvirt_13m_ckÚ fixed-clockôÆ]@Œvirt_19200000_ckÚ fixed-clockô$øŒvirt_26000000_ckÚ fixed-clockôŒº€Œvirt_38_4m_ckÚ fixed-clockôIðŒdpll4_ck@d00Úti,omap3-dpll-per-clock¤  D 0Œ dpll4_m2_ck@d48Úti,divider-clock¤ ?  HŒ#dpll4_m2x2_mul_ckÚfixed-factor-clock¤#&1Œ$dpll4_m2x2_ck@d00Úti,gate-clock¤$ç  ;Œ%omap_96m_alwon_fckÚfixed-factor-clock¤%&1Œ,dpll3_ck@d00Úti,omap3-dpll-core-clock¤  @ 0Œdpll3_m3_ck@1140Úti,divider-clock¤ç @Œ&dpll3_m3x2_mul_ckÚfixed-factor-clock¤&&1Œ'dpll3_m3x2_ck@d00Úti,gate-clock¤'ç   ;Œ(emu_core_alwon_ckÚfixed-factor-clock¤(&1Œesys_altclkÚ fixed-clockôŒ1mcbsp_clksÚ fixed-clockôŒdpll3_m2_ck@d40Úti,divider-clock¤ç  @Œcore_ckÚfixed-factor-clock¤&1Œ)dpll1_fck@940Úti,divider-clock¤)ç  @Œ*dpll1_ck@904Úti,omap3-dpll-clock¤*   $ @ 4Œdpll1_x2_ckÚfixed-factor-clock¤&1Œ+dpll1_x2m2_ck@944Úti,divider-clock¤+  DŒ?cm_96m_fckÚfixed-factor-clock¤,&1Œ-omap_96m_fck@d40Ú ti,mux-clock¤-ç  @ŒHdpll4_m3_ck@e40Úti,divider-clock¤ ç  @Œ.dpll4_m3x2_mul_ckÚfixed-factor-clock¤.&1Œ/dpll4_m3x2_ck@d00Úti,gate-clock¤/ç  ;Œ0omap_54m_fck@d40Ú ti,mux-clock¤01ç  @Œ;cm_96m_d2_fckÚfixed-factor-clock¤-&1Œ2omap_48m_fck@d40Ú ti,mux-clock¤21ç  @Œ3omap_12m_fckÚfixed-factor-clock¤3&1ŒJdpll4_m4_ck@e40Úti,divider-clock¤  @Œ4dpll4_m4x2_mul_ckÚti,fixed-factor-clock¤4Q_lŒ5dpll4_m4x2_ck@d00Úti,gate-clock¤5ç  ;lŒwdpll4_m5_ck@f40Úti,divider-clock¤ ? @Œ6dpll4_m5x2_mul_ckÚti,fixed-factor-clock¤6Q_lŒ7dpll4_m5x2_ck@d00Úti,gate-clock¤7ç  ;ldpll4_m6_ck@1140Úti,divider-clock¤ ç? @Œ8dpll4_m6x2_mul_ckÚfixed-factor-clock¤8&1Œ9dpll4_m6x2_ck@d00Úti,gate-clock¤9ç  ;Œ:emu_per_alwon_ckÚfixed-factor-clock¤:&1Œfclkout2_src_gate_ck@d70Ú ti,composite-no-wait-gate-clock¤)ç  pŒ<clkout2_src_mux_ck@d70Úti,composite-mux-clock¤)-;  pŒ=clkout2_src_ckÚti,composite-clock¤<=Œ>sys_clkout2@d70Úti,divider-clock¤>ç@  pmpu_ckÚfixed-factor-clock¤?&1Œ@arm_fck@924Úti,divider-clock¤@  $emu_mpu_alwon_ckÚfixed-factor-clock¤@&1Œgl3_ick@a40Úti,divider-clock¤)  @ŒAl4_ick@a40Úti,divider-clock¤Aç  @ŒBrm_ick@c40Úti,divider-clock¤Bç  @gpt10_gate_fck@a00Úti,composite-gate-clock¤ç   ŒDgpt10_mux_fck@a40Úti,composite-mux-clock¤Cç  @ŒEgpt10_fckÚti,composite-clock¤DEgpt11_gate_fck@a00Úti,composite-gate-clock¤ç   ŒFgpt11_mux_fck@a40Úti,composite-mux-clock¤Cç  @ŒGgpt11_fckÚti,composite-clock¤FGcore_96m_fckÚfixed-factor-clock¤H&1Œmmchs2_fck@a00Úti,wait-gate-clock¤  猥mmchs1_fck@a00Úti,wait-gate-clock¤  猦i2c3_fck@a00Úti,wait-gate-clock¤  猧i2c2_fck@a00Úti,wait-gate-clock¤  猨i2c1_fck@a00Úti,wait-gate-clock¤  猩mcbsp5_gate_fck@a00Úti,composite-gate-clock¤ç   Œmcbsp1_gate_fck@a00Úti,composite-gate-clock¤ç   Œ core_48m_fckÚfixed-factor-clock¤3&1ŒImcspi4_fck@a00Úti,wait-gate-clock¤I  猪mcspi3_fck@a00Úti,wait-gate-clock¤I  猫mcspi2_fck@a00Úti,wait-gate-clock¤I  猬mcspi1_fck@a00Úti,wait-gate-clock¤I  猭uart2_fck@a00Úti,wait-gate-clock¤I  献uart1_fck@a00Úti,wait-gate-clock¤I  ç Œ¯core_12m_fckÚfixed-factor-clock¤J&1ŒKhdq_fck@a00Úti,wait-gate-clock¤K  猰core_l3_ickÚfixed-factor-clock¤A&1ŒLsdrc_ick@a10Úti,wait-gate-clock¤L  çŒxgpmc_fckÚfixed-factor-clock¤L&1core_l4_ickÚfixed-factor-clock¤B&1ŒMmmchs2_ick@a10Úti,omap3-interface-clock¤M  猱mmchs1_ick@a10Úti,omap3-interface-clock¤M  猲hdq_ick@a10Úti,omap3-interface-clock¤M  猳mcspi4_ick@a10Úti,omap3-interface-clock¤M  猴mcspi3_ick@a10Úti,omap3-interface-clock¤M  猵mcspi2_ick@a10Úti,omap3-interface-clock¤M  猶mcspi1_ick@a10Úti,omap3-interface-clock¤M  猷i2c3_ick@a10Úti,omap3-interface-clock¤M  猸i2c2_ick@a10Úti,omap3-interface-clock¤M  猹i2c1_ick@a10Úti,omap3-interface-clock¤M  猺uart2_ick@a10Úti,omap3-interface-clock¤M  猻uart1_ick@a10Úti,omap3-interface-clock¤M  ç Œ¼gpt11_ick@a10Úti,omap3-interface-clock¤M  ç Œ½gpt10_ick@a10Úti,omap3-interface-clock¤M  ç Œ¾mcbsp5_ick@a10Úti,omap3-interface-clock¤M  ç Œ¿mcbsp1_ick@a10Úti,omap3-interface-clock¤M  ç ŒÀomapctrl_ick@a10Úti,omap3-interface-clock¤M  çŒÁdss_tv_fck@e00Úti,gate-clock¤; çŒ dss_96m_fck@e00Úti,gate-clock¤H çŒ¡dss2_alwon_fck@e00Úti,gate-clock¤ çŒ¢dummy_ckÚ fixed-clockôgpt1_gate_fck@c00Úti,composite-gate-clock¤ç  ŒNgpt1_mux_fck@c40Úti,composite-mux-clock¤C  @ŒOgpt1_fckÚti,composite-clock¤NOŒæaes2_ick@a10Úti,omap3-interface-clock¤Mç  ŒÂwkup_32k_fckÚfixed-factor-clock¤C&1ŒPgpio1_dbck@c00Úti,gate-clock¤P  猘sha12_ick@a10Úti,omap3-interface-clock¤M  çŒÃwdt2_fck@c00Úti,wait-gate-clock¤P  猙wdt2_ick@c10Úti,omap3-interface-clock¤Q  猚wdt1_ick@c10Úti,omap3-interface-clock¤Q  猛gpio1_ick@c10Úti,omap3-interface-clock¤Q  猜omap_32ksync_ick@c10Úti,omap3-interface-clock¤Q  çŒ�gpt12_ick@c10Úti,omap3-interface-clock¤Q  猞gpt1_ick@c10Úti,omap3-interface-clock¤Q  猟per_96m_fckÚfixed-factor-clock¤,&1Œ per_48m_fckÚfixed-factor-clock¤3&1ŒRuart3_fck@1000Úti,wait-gate-clock¤R ç Œ~gpt2_gate_fck@1000Úti,composite-gate-clock¤ç ŒSgpt2_mux_fck@1040Úti,composite-mux-clock¤C @ŒTgpt2_fckÚti,composite-clock¤STŒçgpt3_gate_fck@1000Úti,composite-gate-clock¤ç ŒUgpt3_mux_fck@1040Úti,composite-mux-clock¤Cç @ŒVgpt3_fckÚti,composite-clock¤UVgpt4_gate_fck@1000Úti,composite-gate-clock¤ç ŒWgpt4_mux_fck@1040Úti,composite-mux-clock¤Cç @ŒXgpt4_fckÚti,composite-clock¤WXgpt5_gate_fck@1000Úti,composite-gate-clock¤ç ŒYgpt5_mux_fck@1040Úti,composite-mux-clock¤Cç @ŒZgpt5_fckÚti,composite-clock¤YZgpt6_gate_fck@1000Úti,composite-gate-clock¤ç Œ[gpt6_mux_fck@1040Úti,composite-mux-clock¤Cç @Œ\gpt6_fckÚti,composite-clock¤[\gpt7_gate_fck@1000Úti,composite-gate-clock¤ç Œ]gpt7_mux_fck@1040Úti,composite-mux-clock¤Cç @Œ^gpt7_fckÚti,composite-clock¤]^gpt8_gate_fck@1000Úti,composite-gate-clock¤ç  Œ_gpt8_mux_fck@1040Úti,composite-mux-clock¤Cç @Œ`gpt8_fckÚti,composite-clock¤_`gpt9_gate_fck@1000Úti,composite-gate-clock¤ç  Œagpt9_mux_fck@1040Úti,composite-mux-clock¤Cç @Œbgpt9_fckÚti,composite-clock¤abper_32k_alwon_fckÚfixed-factor-clock¤C&1Œcgpio6_dbck@1000Úti,gate-clock¤c çŒgpio5_dbck@1000Úti,gate-clock¤c çŒ€gpio4_dbck@1000Úti,gate-clock¤c çŒ�gpio3_dbck@1000Úti,gate-clock¤c çŒ‚gpio2_dbck@1000Úti,gate-clock¤c ç Œƒwdt3_fck@1000Úti,wait-gate-clock¤c ç Œ„per_l4_ickÚfixed-factor-clock¤B&1Œdgpio6_ick@1010Úti,omap3-interface-clock¤d çŒ…gpio5_ick@1010Úti,omap3-interface-clock¤d çŒ†gpio4_ick@1010Úti,omap3-interface-clock¤d çŒ‡gpio3_ick@1010Úti,omap3-interface-clock¤d çŒˆgpio2_ick@1010Úti,omap3-interface-clock¤d ç Œ‰wdt3_ick@1010Úti,omap3-interface-clock¤d ç ŒŠuart3_ick@1010Úti,omap3-interface-clock¤d ç Œ‹uart4_ick@1010Úti,omap3-interface-clock¤d çŒŒgpt9_ick@1010Úti,omap3-interface-clock¤d ç Œ�gpt8_ick@1010Úti,omap3-interface-clock¤d ç ŒŽgpt7_ick@1010Úti,omap3-interface-clock¤d çŒ�gpt6_ick@1010Úti,omap3-interface-clock¤d çŒ�gpt5_ick@1010Úti,omap3-interface-clock¤d çŒ‘gpt4_ick@1010Úti,omap3-interface-clock¤d çŒ’gpt3_ick@1010Úti,omap3-interface-clock¤d çŒ“gpt2_ick@1010Úti,omap3-interface-clock¤d çŒ”mcbsp2_ick@1010Úti,omap3-interface-clock¤d çŒ•mcbsp3_ick@1010Úti,omap3-interface-clock¤d çŒ–mcbsp4_ick@1010Úti,omap3-interface-clock¤d çŒ—mcbsp2_gate_fck@1000Úti,composite-gate-clock¤ç Œ mcbsp3_gate_fck@1000Úti,composite-gate-clock¤ç Œmcbsp4_gate_fck@1000Úti,composite-gate-clock¤ç Œemu_src_mux_ck@1140Ú ti,mux-clock¤efg @Œhemu_src_ckÚti,clkdm-gate-clock¤hŒipclk_fck@1140Úti,divider-clock¤iç @pclkx2_fck@1140Úti,divider-clock¤iç @atclk_fck@1140Úti,divider-clock¤iç @traceclk_src_fck@1140Ú ti,mux-clock¤efgç @Œjtraceclk_fck@1140Úti,divider-clock¤jç  @secure_32k_fckÚ fixed-clockô€Œkgpt12_fckÚfixed-factor-clock¤k&1Œèwdt1_fckÚfixed-factor-clock¤k&1ipss_ick@a10Úti,am35xx-interface-clock¤L  çŒrmii_ckÚ fixed-clockôúð€Œpclk_ckÚ fixed-clockô›üÀŒuart4_ick_am35xx@a10Úti,omap3-interface-clock¤M  çuart4_fck_am35xx@a00Úti,wait-gate-clock¤I  çdpll5_ck@d04Úti,omap3-dpll-clock¤   $ L 4•§Œldpll5_m2_ck@d50Úti,divider-clock¤l  PŒvsgx_gate_fck@b00Úti,composite-gate-clock¤)ç  Œtcore_d3_ckÚfixed-factor-clock¤)&1Œmcore_d4_ckÚfixed-factor-clock¤)&1Œncore_d6_ckÚfixed-factor-clock¤)&1Œoomap_192m_alwon_fckÚfixed-factor-clock¤%&1Œpcore_d2_ckÚfixed-factor-clock¤)&1Œqsgx_mux_fck@b40Úti,composite-mux-clock ¤mno-pqrs  @Œusgx_fckÚti,composite-clock¤tuŒïsgx_ick@b10Úti,wait-gate-clock¤A  çŒÊcpefuse_fck@a08Úti,gate-clock¤  çŒÄts_fck@a08Úti,gate-clock¤C  çŒÅusbtll_fck@a08Úti,wait-gate-clock¤v  çŒÆusbtll_ick@a18Úti,omap3-interface-clock¤M  çŒÇmmchs3_ick@a10Úti,omap3-interface-clock¤M  çŒÈmmchs3_fck@a00Úti,wait-gate-clock¤  çŒÉdss1_alwon_fck_3430es2@e00Úti,dss-gate-clock¤wç lŒ£dss_ick_3430es2@e10Úti,omap3-dss-interface-clock¤B çŒ¤usbhost_120m_fck@1400Úti,gate-clock¤v çŒËusbhost_48m_fck@1400Úti,dss-gate-clock¤3 çŒÌusbhost_ick@1410Úti,omap3-dss-interface-clock¤B çŒÍclockdomainscore_l3_clkdmti,clockdomain¤xyz{|}dpll3_clkdmti,clockdomain¤dpll1_clkdmti,clockdomain¤per_clkdmti,clockdomainh¤~€�‚ƒ„…†‡ˆ‰Š‹Œ�Ž��‘’“”•–—emu_clkdmti,clockdomain¤idpll4_clkdmti,clockdomain¤ wkup_clkdmti,clockdomain ¤˜™š›œ�žŸdss_clkdmti,clockdomain¤ ¡¢£¤core_l4_clkdmti,clockdomain”¤¥¦§¨©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉdpll5_clkdmti,clockdomain¤lsgx_clkdmti,clockdomain¤Êusbhost_clkdmti,clockdomain ¤ËÌÍtarget-module@48320000ti,sysc-omap2ti,sysc H2H2 ¯revsysc¹¤P�«fckick+ H2counter@0ti,omap-counter32k  interrupt-controller@48200000ti,omap3-intc( H Œtarget-module@48056000ti,sysc-omap2ti,sysc H`H`,H`(¯revsyscsyssÇ# Ô ¹â¤L«ick+ H`dma-controller@0ti,omap3430-sdmati,omap-sdma å ïú `ŒÎgpio@48310000ti,omap3-gpio H1åðgpio1&6(Œôgpio@49050000ti,omap3-gpio Iåðgpio2&6(ŒÐgpio@49052000ti,omap3-gpio I åðgpio3&6(ŒÕgpio@49054000ti,omap3-gpio I@å ðgpio4&6(ŒÛgpio@49056000ti,omap3-gpio I`å!ðgpio5&6(Œñgpio@49058000ti,omap3-gpio I€å"ðgpio6&6(ŒÞserial@4806a000ti,omap3-uart H  BHVÎ1Î2[txrxðuart1ôÜlserial@4806c000ti,omap3-uart HÀBIVÎ3Î4[txrxðuart2ôÜledefaultsÏbluetooth ti,wl1271-st }Њ-ÆÀserial@49020000ti,omap3-uart IBJVÎ5Î6[txrxðuart3ôÜli2c@48070000 ti,omap3-i2c H€å8VÎÎ[txrx+ði2c1edefaultsÑô€s35390a@30 sii,s35390a 0edefaultsÒ BÐtps65023@48 ti,tps65023 HregulatorsVDCDC1 ›vdd_core”ªO€ÂO€ŒVDCDC2›vdd_io”ª2Z Â2Z ŒÓVDCDC3›vdd_1v8”ªw@Âw@ŒòLDO1 ›vdd_usb18”ªw@Âw@LDO2 ›vdd_usb33”ª2Z Â2Z tsc2004@4b ti,tsc2004 K¨ÓedefaultsÔ BÕ³ÆÙóà2B@i2c@48072000 ti,omap3-i2c H €å9VÎÎ[txrx+ði2c2edefaultsÖô€codec@1ati,tlv320aic23 ]úokayŒøcodec@1bti,tlv320aic23 ]úokayŒûgpio@21 ti,tca6416 !&6nÓŒýi2c@48060000 ti,omap3-i2c H€å=VÎÎ[txrx+ði2c3edefaults×ô€codec@1ati,tlv320aic23 ]úokaygpio@20 ti,tca6416  &6nÓŒügpio@21 ti,tca6416 !&6nÓtvp5146@5c ti,tvp5146m2 \mailbox@48094000ti,omap3-mailboxðmailbox H @åy…— údisableddsp © ´spi@48098000ti,omap2-mcspi H €åA+ðmcspi1¿@VÎ#Î$Î%Î&Î'Î(Î)Î* [tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspi H  åB+ðmcspi2¿ VÎ+Î,Î-Î.[tx0rx0tx1rx1spi@480b8000ti,omap2-mcspi H €å[+ðmcspi3¿ VÎÎÎÎ[tx0rx0tx1rx1spi@480ba000ti,omap2-mcspi H  å0+ðmcspi4¿VÎFÎG[tx0rx01w@480b2000 ti,omap3-1w H å:ðhdq1wmmc@4809c000ti,omap3-hsmmc H ÀåSðmmc1ÍVÎ=Î>[txrxÚØúokayedefaultsÙçÚó ýÛ Ûmmc@480b4000ti,omap3-hsmmc H @åVðmmc2VÎ/Î0[txrxBVúokayedefaultsÜçÝó+wlcore@2 ti,wl1271  Þå 0Œº€DŒº€mmc@480ad000ti,omap3-hsmmc H Ðå^ðmmc3VÎMÎN[txrx údisabledmmu@480bd400Yti,omap2-iommu H Ô€åðmmu_ispf údisabledmmu@5d000000Yti,omap2-iommu ]€åðmmu_iva údisabledwdt@48314000 ti,omap3-wdt H1@€ ðwd_timer2mcbsp@48074000ti,omap3-mcbsp H@ÿ¯mpu å;< vcommontxrx†€ðmcbsp1VÎÎ [txrx¤ß«fckúokay]edefaultsàŒ÷target-module@480a0000ti,sysc-omap2ti,sysc H <H @H D¯revsyscsyssǹâ«ick+ H  údisabledrng@0 ti,omap2-rng  å4mcbsp@49022000ti,omap3-mcbsp I ÿI€ÿ ¯mpusidetoneå>?vcommontxrxsidetone†ðmcbsp2mcbsp2_sidetoneVÎ!Î"[txrx¤á•«fckickúokay]edefaultsâŒúmcbsp@49024000ti,omap3-mcbsp I@ÿI ÿ ¯mpusidetoneåYZvcommontxrxsidetone†€ðmcbsp3mcbsp3_sidetoneVÎÎ[txrx¤ã–«fckick údisabledmcbsp@49026000ti,omap3-mcbsp I`ÿ¯mpu å67 vcommontxrx†€ðmcbsp4VÎÎ[txrx¤ä«fck] údisabledmcbsp@48096000ti,omap3-mcbsp H `ÿ¯mpu åQR vcommontxrx†€ðmcbsp5VÎÎ[txrx¤å«fck údisabledsham@480c3000ti,omap3-shamðsham H 0då1VÎE[rxtarget-module@48318000ti,sysc-omap2-timerti,sysc H1€H1€H1€¯revsyscsyssÇ' ¹â¤æŸ«fckick+ H1€•©timer@0ti,omap3430-timer €¤æ«fckå%´ÃæÓtarget-module@49032000ti,sysc-omap2-timerti,sysc I I I ¯revsyscsyssÇ' ¹â¤ç”«fckick+ I •©timer@0ti,omap3430-timer å&ÃçÓtimer@49034000ti,omap3430-timer I@å'ðtimer3timer@49036000ti,omap3430-timer I`å(ðtimer4timer@49038000ti,omap3430-timer I€å)ðtimer5êtimer@4903a000ti,omap3430-timer I å*ðtimer6êtimer@4903c000ti,omap3430-timer IÀå+ðtimer7êtimer@4903e000ti,omap3430-timer Iàå,ðtimer8÷êtimer@49040000ti,omap3430-timer Iå-ðtimer9÷timer@48086000ti,omap3430-timer H`å.ðtimer10÷timer@48088000ti,omap3430-timer H€å/ðtimer11÷Œtarget-module@48304000ti,sysc-omap2-timerti,sysc H0@H0@H0@¯revsyscsyssÇ' ¹â¤èž«fckick+ H0@timer@0ti,omap3430-timer å_´usbhstll@48062000 ti,usbhs-tll H åN ðusb_tll_hsusbhshost@48064000ti,usbhs-host H@ ðusb_host_hs+edefaultsé ehci-phyohci@48064400ti,ohci-omap3 HDåLehci@48064800 ti,ehci-omap HHåM7êgpmc@6e000000ti,omap3430-gpmcðgpmc nÐåVÎ[rxtx<H+(&60nand@0,0ti,omap2-nandZmicron,mt29f4g16abchch  ixbch8ˆ™§,¹,ËÚ"í,(6@-R>RO(ay+usb_otg_hs@480ab000ti,omap3-musb H °å\]vmcdma ðusb_otg_hs‹–ž  údisableddss@48050000 ti,omap3-dss Húokay ðdss_core¤£«fck+edefaultsë§Ó·Ódispc@48050400ti,omap3-dispc Hå ðdss_dispc¤£«fckencoder@4804fc00 ti,omap3-dsi HüHþ@Hÿ ¯protophypllå údisabled ðdss_dsi1¤£¢ «fcksys_clk+encoder@48050800ti,omap3-rfbi H údisabled ðdss_rfbi¤£¤«fckickencoder@48050c00ti,omap3-venc H  údisabled ðdss_venc¤ «fckportendpointÉìÙŒssi-controller@48058000 ti,omap3-ssiðssi údisabled H€H�¯sysgddåGvgdd_mpu+ssi-port@4805a000ti,omap3-ssi-port H H¨¯txrxåCDssi-port@4805b000ti,omap3-ssi-port H°H¸¯txrxåEFam35x_otg_hs@5c040000ti,omap3-musb ðam35x_otg_hs údisabled \åGvmcethernet@5c000000ti,am3517-emac ðdavinci_emacúokay \åCDEF”äÿ9 Re¤y«ickedefaultsímdio@5c030000ti,davinci_mdio ðdavinci_mdioúokay \wB@+¤î«fckserial@4809e000ti,omap3-uartðuart4 údisabled H àåTVÎ7Î6[txrxôÜlpinmux@480025d8 ti,omap3-padconfpinctrl-single H%Ø$+(=[ÿpinmux_hsusb1_pins`x  Œécan@5c050000ti,am3517-hecc údisabled \€\0€\ ¯hecchecc-rammbxå¤}target-module@50000000ti,sysc-omap2ti,sysc P¯rev¤ïÊ«fckick+ P@opp-tableoperating-points-v2-ti-cpu”Œopp50-300000000€á£‡O€•ÿÿÿÿÿÿÿÿ¦opp100-600000000€#ÃF‡O€•ÿÿÿÿÿÿÿÿwl12xx_bufregulator-fixed ›wl1271_bufªw@Âw@edefaultsð ²ñ”·òŒõwl12xx_vmmc2regulator-fixed›vwl1271ªw@Âw@edefaultsó ²ôÂpÓ”·õŒÝcodec1simple-audio-cardætlv320aic23-hifi-ýMicrophoneMic InLineLine InLineLine OutI Line OutLOUTLine OutROUTLLINEINLine InRLINEINLine InMICINMic In 1i2s Jö lösimple-audio-card,cpu ‹÷simple-audio-card,codec ‹ø •·Œöcodec2simple-audio-cardætlv320aic23-hifi-ýMicrophoneMic InLineLine InLineLine OutI Line OutLOUTLine OutROUTLLINEINLine InRLINEINLine InMICINMic In 1i2s Jù lùsimple-audio-card,cpu ‹úsimple-audio-card,codec ‹û •·Œùexpander-keysgpio-keys-polled ¬drecord ºRecord „üplay ºPlay ÀÏ „üStop ºStop À€ „ü fwd ºFWD ÀÐ „ü rwd ºRWD À¨ „ü shift ºShift À* „ü Mode ºMode À< „ü Menu ºMenu À‹ „üUp ºUp Àg „üDown ºDown Àl „ümemory@80000000”memory €vmmcregulator-fixed ›vmmc_fixedª2Z Â2Z ŒÚgpio-keysgpio-keys-polled ¬duser_pb ºUser Push Button À „ýuser_sw_1 ºUser Switch 1 À „ýuser_sw_2 ºUser Switch 2 À „ý user_sw_3 ºUser Switch 3 À „ý user_sw_4 ºUser Switch 4 À „ý user_sw_5 ºUser Switch 5 À „ý user_sw_6 ºUser Switch 6 À „ý user_sw_7 ºUser Switch 7 À „ýuser_sw_8 ºUser Switch 8 À „ýgpio-leds gpio-ledsedefaultsþuser_led_1 ºam3517evm:green:user_led_1 „ý Ëonuser_led_2 ºam3517evm:green:user_led_2 „ý Ëonuser_led_3 ºam3517evm:green:user_led_3 „ô  Ùmmc0user_led_4 ºam3517evm:green:user_led_4 „ô Ùheartbeatdisplay@0newhaven,nhd-4.3-480272ef-atxl º15 ïÿ }ÞnÓportendpointÉŒìbacklightpwm-backlightedefault ùÓs LK@, (2<FPZd  }ÞŒÿpwm-11ti,omap-dmtimer-pwmedefaults 6 @ KŒhsusb1_phyedefaultsusb-nop-xceiv [Ð gŒê compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3candisplay0device_typeregclocksclock-namesclock-latencyoperating-points-v2cpu0-supplyinterruptsti,hwmodsstatusranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockreg-namesti,sysc-sidleti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendeddmasdma-namespinctrl-namespinctrl-0enable-gpiosmax-speedregulator-always-onvio-supplytouchscreen-fuzz-xtouchscreen-fuzz-ytouchscreen-fuzz-pressuretouchscreen-size-xtouchscreen-size-ytouchscreen-max-pressureti,x-plate-ohmsti,esd-recovery-timeout-ms#sound-dai-cellsvcc-supply#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthwp-gpioscd-gpiosnon-removablecap-power-off-cardref-clock-frequencytcxo-clock-frequency#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-sizeti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthmultipointnum-epsram-bitsvdds_dsi-supplyvdda_video-supplyremote-endpointdata-linesti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqopp-hzopp-microvoltopp-supported-hwopp-suspendgpiovin-supplystartup-delay-usenable-active-highsimple-audio-card,namesimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersound-daisystem-clock-frequencypoll-intervallabellinux,codedefault-statelinux,default-triggerbacklightpower-supplypwmsbrightness-levelsdefault-brightness-levelti,timers#pwm-cellsti,clock-sourcereset-gpios#phy-cells