d8^t(T^<)tronsmart,orion-r68-metarockchip,rk3368 +7Rockchip Orion R68aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53pscicpu@1cpuarm,cortex-a53pscicpu@2cpuarm,cortex-a53pscicpu@3cpuarm,cortex-a53psci cpu@100cpuarm,cortex-a53pscicpu@101cpuarm,cortex-a53pscicpu@102cpuarm,cortex-a53pscicpu@103cpuarm,cortex-a53pscibus simple-bus+dma-controller@ff250000arm,pl330arm,primecell%@ $  +apb_pclkdma-controller@ff600000arm,pl330arm,primecell`@ $  +apb_pclk9arm-pmuarm,armv8-pmuv3`pqrstuvw 7 psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clockJn6Zxin24mmmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @z $  D r v+biuciuciu-driveciu-sample  resetokayJdefault mmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @zр $  E s w+biuciuciu-driveciu-sample ! reset disabledmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@zр $  G u y+biuciuciu-driveciu-sample # resetokay (7Fdefault saradc@ff100000rockchip,saradc $T$ I [+saradcapb_pclk W saradc-apbokayfspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi$ A R+spiclkapb_pclk ,default+ disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi$ B S+spiclkapb_pclk -default+ disabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi$ C T+spiclkapb_pclk )default !+ disabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >++i2c$ Ndefault" disabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?++i2c$ Odefault# disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @++i2c$ Pdefault$ disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A++i2c$ Qdefault% disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uartJn6$ M U+baudclkapb_pclk 7r| disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uartJn6$ N V+baudclkapb_pclk 8r| disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uartJn6$ P X+baudclkapb_pclk :r| disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uartJn6$ Q Y+baudclkapb_pclk ;r|okaydefault&thermal-zonescpud'tripscpu_alert0$passive(cpu_alert18passive)cpu_crits criticalcooling-mapsmap0(0map1)0 gpud'tripsgpu_alert08passive*gpu_crit8 criticalcooling-mapsmap0*0tsadc@ff280000rockchip,rk3368-tsadc( %$ H Z+tsadcapb_pclk  tsadc-apbinitdefaultsleep+,+s disabled'ethernet@ff290000rockchip,rk3368-gmac) )macirq9-8$  f g c ]M+stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macokayF V.minputz/rgmiidefault0 1  'B@0usb@ff500000 generic-ehciP $ okayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X $ +otgotg@@ okayi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ce$ L+i2c <default2+okaysyr827@40silergy,syr827@0vdd_cpu?,[ 4s`@3hym8563@51haoyu,hym8563QmJZxin32ki2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =++i2c$ Mdefault4 disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault5$ _+pwm disabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault6$ _+pwm disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh $ _+pwm disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh0default7$ _+pwm disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uarti$ O W+baudclkapb_pclk 9default8r|okaymbox@ff6b0000rockchip,rk3368-mailboxk0$ E +pclk_mailbox disabledsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfds<io-domains&rockchip,rk3368-pmu-io-voltage-domain disabledreboot-modesyscon-reboot-modeRBRB RB RBclock-controller@ff760000rockchip,rk3368-cruv9-m% syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdw-io-domains"rockchip,rk3368-io-voltage-domain disabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt$ p Ookaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer  Bspdif@ff880000rockchip,rk3368-spdif 6$ S  +mclkhclk297txdefault:A disabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s (+i2s_clki2s_hclk$ T 2997txrxA disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s 5+i2s_clki2s_hclk$ R 2997txrxdefault;A disablediommu@ff900800rockchip,iommu )iep_mmu$  +aclkifaceR disablediommu@ff914000rockchip,iommu @P )isp_mmu$  +aclkifaceR_ disablediommu@ff930300rockchip,iommu )vop_mmu$  +aclkifaceR disablediommu@ff9a0440rockchip,iommu @@@  )hevc_mmu$  +aclkifaceR disablediommu@ff9a0800rockchip,iommu  )vepu_mmuvdpu_mmu$  +aclkifaceR disabledefuse@ffb00000rockchip,rk3368-efuse +$ q +pclk_efusecpu-leakage@17temp-adjust@1finterrupt-controller@ffb71000 arm,gic-400z@ @ `   pinctrlrockchip,rk3368-pinctrl9-<+gpio0@ff750000rockchip,gpio-banku$ @ QzFgpio1@ff780000rockchip,gpio-bankx$ A Rzgpio2@ff790000rockchip,gpio-banky$ B SzDgpio3@ff7a0000rockchip,gpio-bankz$ C Tz1pcfg-pull-up?pcfg-pull-downBpcfg-pull-none@pcfg-pull-none-12ma Aemmcemmc-clk=emmc-cmd>emmc-pwr?emmc-bus1?emmc-bus4@????emmc-bus8>>>>>>>>emmc-reset@Cgmacrgmii-pins@@@A A AAA A@@@@@@0rmii-pins@@@A A A@@@@i2c0i2c0-xfer @@2i2c1i2c1-xfer @@4i2c2i2c2-xfer  @@"i2c3i2c3-xfer @@#i2c4i2c4-xfer @@$i2c5i2c5-xfer @@%i2si2s-8ch-bus @ @@@@@@@@;pwm0pwm0-pin@5pwm1pwm1-pin@6pwm3pwm3-pin@7sdio0sdio0-bus1?sdio0-bus4@????sdio0-cmd?sdio0-clk@sdio0-cd?sdio0-wp?sdio0-pwr?sdio0-bkpwr?sdio0-int?sdmmcsdmmc-clk = sdmmc-cmd > sdmmc-cd > sdmmc-bus1>sdmmc-bus4@>>>>spdifspdif-tx@:spi0spi0-clk?spi0-cs0?spi0-cs1?spi0-tx?spi0-rx?spi1spi1-clk?spi1-cs0?spi1-cs1?spi1-rx?spi1-tx?spi2spi2-clk ?spi2-cs0 ?!spi2-rx ? spi2-tx ?tsadcotp-pin@+otp-out@,uart0uart0-xfer ?@uart0-cts@uart0-rts@uart1uart1-xfer ?@uart1-cts@uart1-rts@uart2uart2-xfer ?@8uart3uart3-xfer ?@uart3-cts@uart3-rts@uart4uart4-xfer ?@&uart4-cts@uart4-rts@pcfg-pull-none-drv-8ma=pcfg-pull-up-drv-8ma>keyspwr-keyBEledsstby-pwren @Hled-ctl@Gusbhost-vbus-drv@Ichosenserial2:115200n8memorymemoryemmc-pwrseqmmc-pwrseq-emmcCdefault Dexternal-gmac-clock fixed-clockmJsY@ Zext_gmac.gpio-keys gpio-keysdefaultEpower' !F 5GPIO Power;tgpio-leds gpio-ledsled-0 !15orion:red:leddefaultGFonled-1 !F 5orion:blue:leddefaultHFoffvcc18-regulatorregulator-fixed0vcc_18[w@sw@3vcc-host-regulatorregulator-fixed FdefaultI 0vcc_host3vcc-io-regulatorregulator-fixed0vcc_io[2Zs2Z3Jvcc-lan-regulatorregulator-fixed0vcc_lan[2Zs2ZJ/vcc-sd-regulatorregulator-fixed0vcc_sd 1 [w@s2ZJvcc-sys-regulatorregulator-fixed0vcc_sys[LK@sLK@3vcc-io-sd-regulatorregulator-fixed 0vccio_sd[w@s2ZJvccio-wl-regulatorregulator-fixed 0vccio_wl[2Zs2ZJvdd-10-regulatorregulator-fixed0vdd_10[B@sB@3 compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2cpudevice_typeregenable-method#cooling-cellsphandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclocksclock-namesinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyfifo-depthresetsreset-namesstatusbus-widthcap-sd-highspeedcard-detect-delaypinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-mmc-highspeedmmc-pwrseqmmc-hs200-1_2vmmc-hs200-1_8vnon-removable#io-channel-cellsvref-supplyreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-tempinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supply#pwm-cells#mbox-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#sound-dai-cells#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathreset-gpioswakeup-sourcelabellinux,codedefault-state