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Rusb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2‰ÿX ¾�MàotgThost\n}€€@ ±U ¶usb2-phyAokayusb@ff5c0000 generic-ehci‰ÿ\ ¾ �NG±V¶usbAokay»defaultÉWXYZ[\usb@ff5d0000 generic-ohci‰ÿ] ¾ �NG±V¶usb Adisabledusb@ff600000rockchip,rk3328-dwc3snps,dwc3‰ÿ` ¾C�`a„àref_clksuspend_clkbus_clkTotg Œutmi_wide•¶Îð  * Adisabledinterrupt-controller@ff811000 arm,gic-400 C T@‰ÿ�ÿ� ÿ�@ ÿ�`  ¾  pinctrlrockchip,rk3328-pinctrlÌ9+·gpio0@ff210000rockchip,gpio-bank‰ÿ! ¾3�È>N T C jgpio1@ff220000rockchip,gpio-bank‰ÿ" ¾4�É>N T Cgpio2@ff230000rockchip,gpio-bank‰ÿ# ¾5�Ê>N T C (gpio3@ff240000rockchip,gpio-bank‰ÿ$ ¾6�Ë>N T Cpcfg-pull-up i _pcfg-pull-down v gpcfg-pull-none … ]pcfg-pull-none-2ma … ’ fpcfg-pull-up-2ma i ’pcfg-pull-up-4ma i ’ `pcfg-pull-none-4ma … ’ cpcfg-pull-down-4ma v ’pcfg-pull-none-8ma … ’ apcfg-pull-up-8ma i ’ bpcfg-pull-none-12ma … ’  dpcfg-pull-up-12ma i ’  epcfg-output-high ¡ ipcfg-output-low ­ hpcfg-input-high i ¸ ^pcfg-input ¸i2c0i2c0-xfer Å]] &i2c1i2c1-xfer Å]] 'i2c2i2c2-xfer Å ]] +i2c3i2c3-xfer Å]] ,i2c3-pins Å]]hdmi_i2chdmii2c-xfer Å]] Apdm-0pdmm0-clk Å] pdmm0-fsync Å]pdmm0-sdi0 Å] pdmm0-sdi1 Å] pdmm0-sdi2 Å] pdmm0-sdi3 Å] pdmm0-clk-sleep Å^ pdmm0-sdi0-sleep Å^ pdmm0-sdi1-sleep Å^ pdmm0-sdi2-sleep Å^ pdmm0-sdi3-sleep Å^ pdmm0-fsync-sleep Å^tsadcotp-pin Å ] 7otp-out Å ] 8uart0uart0-xfer Å ]_ uart0-cts Å ] uart0-rts Å ] !uart0-rts-pin Å ]uart1uart1-xfer Å]_ "uart1-cts Å] #uart1-rts Å] $uart1-rts-pin Å]uart2-0uart2m0-xfer Å]_uart2-1uart2m1-xfer Å]_ %spi0-0spi0m0-clk Å_spi0m0-cs0 Å _spi0m0-tx Å _spi0m0-rx Å _spi0m0-cs1 Å _spi0-1spi0m1-clk Å_spi0m1-cs0 Å_spi0m1-tx Å_spi0m1-rx Å_spi0m1-cs1 Å_spi0-2spi0m2-clk Å_ -spi0m2-cs0 Å_ 0spi0m2-tx Å_ .spi0m2-rx Å_ /i2s1i2s1-mclk Å]i2s1-sclk Å]i2s1-lrckrx Å]i2s1-lrcktx Å]i2s1-sdi Å]i2s1-sdo Å]i2s1-sdio1 Å]i2s1-sdio2 Å]i2s1-sdio3 Å]i2s1-sleep� Å^^^^^^^^^i2s2-0i2s2m0-mclk Å]i2s2m0-sclk Å]i2s2m0-lrckrx Å]i2s2m0-lrcktx Å]i2s2m0-sdi Å]i2s2m0-sdo Å]i2s2m0-sleep` Å^^^^^^i2s2-1i2s2m1-mclk Å]i2s2m1-sclk Å]i2sm1-lrckrx Å]i2s2m1-lrcktx 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]hdmi_pinhdmi-cec Å] @hdmi-hpd Åg Bcif-0dvp-d2d9-m0À Å]]]]] ] ] ]]]]]cif-1dvp-d2d9-m1À Å]]]]]]]]]]]]pmicpmic-int-l Å_ )usb3usb30-host-drv Å] kwifibt-dis Åh Wbt-wake-host Å_ Xchip-en Åh Yhost-wake-bt Åi Zwl-dis Åh [wl-wake-host Å_ \chosen Óserial2:1500000n8external-gmac-clock fixed-clockxsY@ ˆgmac_clkink Ousb3-current-switchregulator-fixed ß òj»defaultÉk hvcc_host_5v ÷*vcc-sysregulator-fixedhvcc_syswLK@�LK@ *ir-receivergpio-ir-receiver Å( rc-beelink-gs1 compatibleinterrupt-parent#address-cells#size-cellsmodelserial0serial1serial2i2c0i2c1i2c2i2c3ethernet0ethernet1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodnext-level-cacheoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrangesinterruptsarm,pl330-periph-burstclock-names#dma-cellssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1vccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplypmuio-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shifti2c-scl-falling-time-nsi2c-scl-rising-time-nsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarityrockchip,efuse-sizebits#io-channel-cellsinterrupt-namesmali-supply#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesmute-gpiosnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplyvqmmc-supplymmc-ddr-1_8vmmc-hs200-1_8vno-sdno-sdionon-removablesnps,txpblclock_in_outphy-handlephy-modephy-supplysnps,aalsnps,pbltx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosphy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathenable-active-highgpiovin-supplylinux,rc-map-name