Ð þí…}8‚(}�Èhisilicon,hip07-d05 +&7Hisilicon Hip07 D05 Development Boardpsci arm,psci-0.2=smccpus+cpu-mapcluster0core0Dcore1Dcore2Dcore3Dcluster1core0Dcore1Dcore2Dcore3D cluster2core0D core1D core2D core3D cluster3core0Dcore1Dcore2Dcore3Dcluster4core0Dcore1Dcore2Dcore3Dcluster5core0Dcore1Dcore2Dcore3Dcluster6core0Dcore1Dcore2Dcore3Dcluster7core0Dcore1Dcore2D core3D!cluster8core0D"core1D#core2D$core3D%cluster9core0D&core1D'core2D(core3D)cluster10core0D*core1D+core2D,core3D-cluster11core0D.core1D/core2D0core3D1cluster12core0D2core1D3core2D4core3D5cluster13core0D6core1D7core2D8core3D9cluster14core0D:core1D;core2D<core3D=cluster15core0D>core1D?core2D@core3DAcpu@10000Hcpuarm,cortex-a72TXpscifBw„cpu@10001Hcpuarm,cortex-a72TXpscifBw„cpu@10002Hcpuarm,cortex-a72TXpscifBw„cpu@10003Hcpuarm,cortex-a72TXpscifBw„cpu@10100Hcpuarm,cortex-a72TXpscifCw„cpu@10101Hcpuarm,cortex-a72TXpscifCw„cpu@10102Hcpuarm,cortex-a72TXpscifCw„cpu@10103Hcpuarm,cortex-a72TXpscifCw„ cpu@10200Hcpuarm,cortex-a72TXpscifDw„ cpu@10201Hcpuarm,cortex-a72TXpscifDw„ cpu@10202Hcpuarm,cortex-a72TXpscifDw„ cpu@10203Hcpuarm,cortex-a72TXpscifDw„ cpu@10300Hcpuarm,cortex-a72TXpscifEw„cpu@10301Hcpuarm,cortex-a72TXpscifEw„cpu@10302Hcpuarm,cortex-a72TXpscifEw„cpu@10303Hcpuarm,cortex-a72TXpscifEw„cpu@30000Hcpuarm,cortex-a72TXpscifFw„cpu@30001Hcpuarm,cortex-a72TXpscifFw„cpu@30002Hcpuarm,cortex-a72TXpscifFw„cpu@30003Hcpuarm,cortex-a72TXpscifFw„cpu@30100Hcpuarm,cortex-a72TXpscifGw„cpu@30101Hcpuarm,cortex-a72TXpscifGw„cpu@30102Hcpuarm,cortex-a72TXpscifGw„cpu@30103Hcpuarm,cortex-a72TXpscifGw„cpu@30200Hcpuarm,cortex-a72TXpscifHw„cpu@30201Hcpuarm,cortex-a72TXpscifHw„cpu@30202Hcpuarm,cortex-a72TXpscifHw„cpu@30203Hcpuarm,cortex-a72TXpscifHw„cpu@30300Hcpuarm,cortex-a72TXpscifIw„cpu@30301Hcpuarm,cortex-a72TXpscifIw„cpu@30302Hcpuarm,cortex-a72TXpscifIw„ cpu@30303Hcpuarm,cortex-a72TXpscifIw„!cpu@50000Hcpuarm,cortex-a72TXpscifJw„"cpu@50001Hcpuarm,cortex-a72TXpscifJw„#cpu@50002Hcpuarm,cortex-a72TXpscifJw„$cpu@50003Hcpuarm,cortex-a72TXpscifJw„%cpu@50100Hcpuarm,cortex-a72TXpscifKw„&cpu@50101Hcpuarm,cortex-a72TXpscifKw„'cpu@50102Hcpuarm,cortex-a72TXpscifKw„(cpu@50103Hcpuarm,cortex-a72TXpscifKw„)cpu@50200Hcpuarm,cortex-a72TXpscifLw„*cpu@50201Hcpuarm,cortex-a72TXpscifLw„+cpu@50202Hcpuarm,cortex-a72TXpscifLw„,cpu@50203Hcpuarm,cortex-a72TXpscifLw„-cpu@50300Hcpuarm,cortex-a72TXpscifMw„.cpu@50301Hcpuarm,cortex-a72TXpscifMw„/cpu@50302Hcpuarm,cortex-a72TXpscifMw„0cpu@50303Hcpuarm,cortex-a72TXpscifMw„1cpu@70000Hcpuarm,cortex-a72TXpscifNw„2cpu@70001Hcpuarm,cortex-a72TXpscifNw„3cpu@70002Hcpuarm,cortex-a72TXpscifNw„4cpu@70003Hcpuarm,cortex-a72TXpscifNw„5cpu@70100Hcpuarm,cortex-a72TXpscifOw„6cpu@70101Hcpuarm,cortex-a72TXpscifOw„7cpu@70102Hcpuarm,cortex-a72TXpscifOw„8cpu@70103Hcpuarm,cortex-a72TXpscifOw„9cpu@70200Hcpuarm,cortex-a72TXpscifPw„:cpu@70201Hcpuarm,cortex-a72TXpscifPw„;cpu@70202Hcpuarm,cortex-a72TXpscifPw„<cpu@70203Hcpuarm,cortex-a72TXpscifPw„=cpu@70300Hcpuarm,cortex-a72TXpscifQw„>cpu@70301Hcpuarm,cortex-a72TXpscifQw„?cpu@70302Hcpuarm,cortex-a72TXpscifQw„@cpu@70303Hcpuarm,cortex-a72TXpscifQw„Al2-cache0cache„Bl2-cache1cache„Cl2-cache2cache„Dl2-cache3cache„El2-cache4cache„Fl2-cache5cache„Gl2-cache6cache„Hl2-cache7cache„Il2-cache8cache„Jl2-cache9cache„Kl2-cache10cache„Ll2-cache11cache„Ml2-cache12cache„Nl2-cache13cache„Ol2-cache14cache„Pl2-cache15cache„Qinterrupt-controller@4d000000 arm,gic-v3Œ+�¤¹Ð€TMM@m@M@m@þþþ å „interrupt-controller@4c000000arm,gic-v3-itsðÿTLinterrupt-controller@6c000000arm,gic-v3-itsðÿTl„Rinterrupt-controller@c6000000arm,gic-v3-itsðÿTÆ„Sinterrupt-controller@8,c6000000arm,gic-v3-itsðÿTÆ„Tinterrupt-controller@400,4c000000arm,gic-v3-itsðÿTLinterrupt-controller@400,6c000000arm,gic-v3-itsðÿTlinterrupt-controller@400,c6000000arm,gic-v3-itsðÿTÆ„Uinterrupt-controller@408,c6000000arm,gic-v3-itsðÿTÆ„Vtimerarm,armv8-timer0å   pmuarm,cortex-a72-pmu åinterrupt-controller@60080000hisilicon,mbigen-v2T`uart_intc R ǤŒ„[interrupt-controller@a0080000hisilicon,mbigen-v2T intc_pcie2_a S‡¤Œ „nintc_sas1 S¤Œ€„lintc_sas2 S@¤Œ€„mintc_smmu_pcie S ¤Œintc_usb S€¤Œ„\interrupt-controller@d0080000hisilicon,mbigen-v2TÐintc_sec S¤Œ!„ointc_smmu_alg S ¤Œ„Winterrupt-controller@8,d0080000hisilicon,mbigen-v2TÐintc_sec T$¤Œ!„qintc_smmu_alg T+¤Œ„Xinterrupt-controller@400,d0080000hisilicon,mbigen-v2TÐintc_sec UD¤Œ!„sintc_smmu_alg UK¤Œ„Yinterrupt-controller@408,d0080000hisilicon,mbigen-v2TÐintc_sec Vd¤Œ!„uintc_smmu_alg Vk¤Œ„Zinterrupt-controller@c0080000hisilicon,mbigen-v2TÀintc_dsaf0 S¤Œ™„^intc-roce S ¤Œ"„iintc-sas0 S ¤Œ€„jintc_smmu_dsa S ¤Œsmmu_pcie arm,smmu-v3T +8H fdisabledsmmu_alg@d0040000 arm,smmu-v3TÐ WåÝÞßmeventqgerrorpriq+H„psmmu_alg@8,d0040000 arm,smmu-v3TÐ XåÝÞßmeventqgerrorpriq+H„rsmmu_alg@400,d0040000 arm,smmu-v3TÐ YåÝÞßmeventqgerrorpriq+H„tsmmu_alg@408,d0040000 arm,smmu-v3TÐ ZåÝÞßmeventqgerrorpriq+H„vsoc simple-bus+�isa@a01b0000hisilicon,hip07-lpc+T bt@e4ipmi-btHipmi Täfokayuart@602b0000arm,sbsa-uartT`+ [å'}‹fokayohci@a7030000 generic-ohciT§ \å€+fokayehci@a7020000 generic-ehciT§ \å�+fokaysub_ctrl_c@60000000hisilicon,peri-subctrlsysconT`„]dsa_subctrl@c0000000hisilicon,dsa-subctrlsysconTÀ„_dsa_cpld@78000010sysconTx‹„apcie_subctl@a0000000"hisilicon,pcie-sas-subctrlsysconT „ksds_ctrl@c2200000sysconT „`mdio@603c0000hisilicon,hns-mdioT`<˜]8 8SZ+ethernet-phy@0ethernet-phy-ieee802.3-c22T„bethernet-phy@1ethernet-phy-ieee802.3-c22T„cdsa@c7000000+hisilicon,hns-dsaf-v2 ¦6port-16rss TʼnÇ`«ppe-basedsaf-base ^µ_Ä Èå@ABCDEFGHIJKLMNOPQRSTUVWXÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚÛÜÝÞßàáâãäåæçèéêëìíîïðñòóôõö÷øùúûüýþÿ      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~€�‚ƒ„…†‡ˆ‰Š‹Œ�Ž��‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§¨©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚÛÜÝÞßàáâãäåæçèéêëìíîïðñòóôõö÷øùúûüýþÿ      !"#$%&'()*+,-./0123456789:;<=>?×à+„dport@0Té`÷a$ÿð0fiberport@1Té`÷a$ÿð0fiberport@4T;bé`$ÿð0copperport@5T;cé`$ÿð0copperethernet@4hisilicon,hns-nic-v2FdP_fokay+„gethernet@5hisilicon,hns-nic-v2FdP_fokay+„hethernet@0hisilicon,hns-nic-v2FdP_fokay+„eethernet@1hisilicon,hns-nic-v2FdP_fokay+„finfiniband@c4000000hisilicon,hns-roce-v1TÄ+qefgh|dˆšÍ+ iåÒÓÔÕÖרÙÚÛÜÝÞßàáâãäåæçèéêëìíîïðñò5mhns-roce-comp-0hns-roce-comp-1hns-roce-comp-2hns-roce-comp-3hns-roce-comp-4hns-roce-comp-5hns-roce-comp-6hns-roce-comp-7hns-roce-comp-8hns-roce-comp-9hns-roce-comp-10hns-roce-comp-11hns-roce-comp-12hns-roce-comp-13hns-roce-comp-14hns-roce-comp-15hns-roce-comp-16hns-roce-comp-17hns-roce-comp-18hns-roce-comp-19hns-roce-comp-20hns-roce-comp-21hns-roce-comp-22hns-roce-comp-23hns-roce-comp-24hns-roce-comp-25hns-roce-comp-26hns-roce-comp-27hns-roce-comp-28hns-roce-comp-29hns-roce-comp-30hns-roce-comp-31hns-roce-asynchns-roce-commonsas@c3000000hisilicon,hip07-sas-v2TÃ’Pˆ ›_° `¿Z0Ò8åñ+ jå@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~€�‚ƒ„…†‡ˆ‰Š‹Œ�Ž��‘’“”•–—˜™š›œ�žŸYZ[\]^_`abcdefghijklmnopqrstuvwx fdisabledsas@a2000000hisilicon,hip07-sas-v2T¢’Pˆ ›kû° ¿Z Òåñ+ lå@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~€�‚ƒ„…†‡ˆ‰Š‹Œ�Ž��‘’“”•–—˜™š›œ�žŸ@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_fokaysas@a3000000hisilicon,hip07-sas-v2T£’Pˆ ›k° à¿ZpÒ¨åñ + måÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚÛÜÝÞßàáâãäåæçèéêëìíîïðñòóôõö÷øùúûüýþÿ     `abcdefghijklmnopqrstuvwxyz{|}~ fdisabledpcie@a00a0000hisilicon,hip07-pcie-ecam T¯€€  øÿøSø$ÿÿ+Hpci+8�¨¨¯Œ1øpDnŸnŸnŸnŸfokaycrypto@d2000000hisilicon,hip07-sec TÐÒÒÒÒÒÒÒÒÒÒ Ò Ò Ò Ò ÒÒÒ oRp+å@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`crypto@8,d2000000hisilicon,hip07-sec TÐÒÒÒÒÒÒÒÒÒÒ Ò Ò Ò Ò ÒÒÒ qRr+å@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`crypto@400,d2000000hisilicon,hip07-sec TÐÒÒÒÒÒÒÒÒÒÒ Ò Ò Ò Ò ÒÒÒ sRt+å@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`crypto@408,d2000000hisilicon,hip07-sec TÐÒÒÒÒÒÒÒÒÒÒ Ò Ò Ò Ò ÒÒÒ uRv+å@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`memory@0HmemoryT@wdistance-mapnuma-distance-map-v1ÀY    aliasesi/soc/uart@602b0000chosenqserial0:115200n8 compatibleinterrupt-parent#address-cells#size-cellsmodelmethodcpudevice_typeregenable-methodnext-level-cachenuma-node-idphandle#interrupt-cellsrangesinterrupt-controller#redistributor-regionsredistributor-strideinterruptsmsi-controller#msi-cellsmsi-parentnum-pins#iommu-cellsdma-coherentsmmu-cb-memtypehisilicon,broken-prefetch-cmdstatusinterrupt-namescurrent-speedreg-io-widthsubctrl-vbasemodereg-namessubctrl-sysconreset-field-offsetdesc-numbuf-sizeserdes-sysconcpld-sysconport-rst-offsetport-mode-offsetmc-mac-maskmedia-typephy-handleae-handleport-idx-in-aelocal-mac-addresseth-handledsaf-handlenode-guidsas-addrhisilicon,sas-sysconctrl-reset-regctrl-reset-sts-regctrl-clock-ena-regqueue-countphy-counthip06-sas-v2-quirk-amtbus-rangemsi-mapmsi-map-maskinterrupt-map-maskinterrupt-mapiommusdistance-matrixserial0stdout-path