Ð þíJ*8F”(–F\*STMicroelectronics STM32F469i-DISCO board!!st,stm32f469i-discost,stm32f469interrupt-controller@e000e100!arm,armv7m-nvic,ARàá Vtimer@e000e010!arm,armv7m-systickRàà^okay esoc !simple-busl} „Àefuse@1fff7800!st,stm32f4-otpRÿxcalib@22cR,calib@22eR.timers@40000000!st,stm32-timersR@ e€�int ^disabledpwm !st,stm32-pwm› ^disabledtimer@1!st,stm32-timer-triggerR ^disabledtimers@40000400!st,stm32-timersR@ e��int^okaypwm !st,stm32-pwm›^okay¦°defaulttimer@2!st,stm32-timer-triggerR^okaytimers@40000800!st,stm32-timersR@ e‚�int ^disabledpwm !st,stm32-pwm› ^disabledtimer@3!st,stm32-timer-triggerR ^disabledtimers@40000c00!st,stm32-timerR@  eƒ^okay¾2timers@40001000!st,stm32-timersR@ e„�int ^disabledtimer@5!st,stm32-timer-triggerR ^disabledtimers@40001400!st,stm32-timersR@ e…�int ^disabledtimer@6!st,stm32-timer-triggerR ^disabledtimers@40001800!st,stm32-timersR@ e†�int ^disabledpwm !st,stm32-pwm› ^disabledtimer@11!st,stm32-timer-triggerR  ^disabledtimers@40001c00!st,stm32-timersR@ e‡�int ^disabledpwm !st,stm32-pwm› ^disabledtimers@40002000!st,stm32-timersR@  eˆ�int ^disabledpwm !st,stm32-pwm› ^disabledrtc@40002800 !st,stm32-rtcR@( e É Ùl¾ ð^okaywatchdog@40003000!st,stm32-iwdgR@0e�lsi ^disabledspi@40003800!st,stm32f4-spiR@8¾$ eŽ ^disabledspi@40003c00!st,stm32f4-spiR@<¾3 e� ^disabledserial@40004400!st,stm32-uartR@D¾& e‘ ^disabledserial@40004800!st,stm32-uartR@H¾' e’^okay(úÿrxtx¦°defaultserial@40004c00!st,stm32-uartR@L¾4 e“ ^disabledserial@40005000!st,stm32-uartR@P¾5 e” ^disabledi2c@40005400!st,stm32f4-i2cR@T¾   e• ^disabledi2c@40005c00!st,stm32f4-i2cR@\¾HI  e— ^disableddac@40007400!st,stm32f4-dac-coreR@t  e��pclk ^disableddac@1 !st,stm32-dacR ^disableddac@2 !st,stm32-dacR ^disabledserial@40007800!st,stm32-uartR@x¾R ež ^disabledserial@40007c00!st,stm32-uartR@|¾S eŸ ^disabledtimers@40010000!st,stm32-timersR@ e �int^okaypwm !st,stm32-pwm›^okay¦ °defaulttimer@0!st,stm32-timer-triggerR^okaytimers@40010400!st,stm32-timersR@ e¡�int ^disabledpwm !st,stm32-pwm› ^disabledtimer@7!st,stm32-timer-triggerR ^disabledserial@40011000!st,stm32-uartR@¾% e¤ ^disabled(ú  ÿrxtxserial@40011400!st,stm32-uartR@¾G e¥ ^disabledadc@40012000!st,stm32f4-adc-coreR@ ¾ e¨�adc,A ^disabledV adc@0!st,stm32f4-adcR e¨l ¾ú ÿrx ^disabledadc@100!st,stm32f4-adcR e©l ¾ú ÿrx ^disabledadc@200!st,stm32f4-adcR eªl ¾ú ÿrx ^disabledmmc@40012c00!arm,pl180arm,primecell"ˆ€R@, e« �apb_pclk¾19Ül^okayG  S \°defaultopendrain¦fpspi@40013000!st,stm32f4-spiR@0¾# e¬ ^disabledspi@40013400!st,stm32f4-spiR@4¾T e­ ^disabledsyscon@40013800!st,stm32-syscfgsysconR@8Vinterrupt-controller@40013c00!st,stm32-exti,AR@<8¾ ()*>LVtimers@40014000!st,stm32-timersR@@ e°�int ^disabledpwm !st,stm32-pwm› ^disabledtimer@8!st,stm32-timer-triggerR ^disabledtimers@40014400!st,stm32-timersR@D e±�int ^disabledpwm !st,stm32-pwm› ^disabledtimers@40014800!st,stm32-timersR@H e²�int ^disabledpwm !st,stm32-pwm› ^disabledspi@40015000!st,stm32f4-spiR@P¾U e´(ú  ÿrxtx ^disabledspi@40015400!st,stm32f4-spiR@T¾V eµ ^disabledpower-config@40007000!st,stm32-power-configsysconR@pVdisplay-controller@40016800!st,stm32-ltdcR@h¾XY : e�lcd^okayportendpoint@0zVcrc@40023000!st,stm32f4-crcR@0 e  ^disabledrcc@40023800Š—0!st,stm32f469-rccst,stm32f42xx-rccst,stm32-rccR@8eð ɤB@Vdma-controller@40026000 !st,stm32-dmaR@` ¾ / e¹Vdma-controller@40026400 !st,stm32-dmaR@d ¾89:;<DEF e¹ÄV ethernet@40028000 !st,stm32-dwmacsnps,dwmac-3.50aR@€€ Ïstmmaceth¾=Ùmacirq �stmmacethmac-clk-txmac-clk-rx$eéóü ^disableddma2d@4002b000!st,stm32-dma2dR@° ¾Z — e�dma2d^okayusb@40040000 !snps,dwc2R@¾M e�otg ^disabledusb@50000000!st,stm32f4x9-fsotgRP¾C e'�otg^okay host¦°defaultdcmi@50050000!st,stm32-dcmiRP¾N   e �mclk°default¦ú ÿtx ^disabledrng@50060800 !st,stm32-rngRP e&dsi@40016c00 !st,stm32-dsiR@l ;apbe �pclkref^okayportsport@0RendpointzVport@1RendpointzVpanel-dsi@0!orisetech,otm8009aR !-^okayportendpointzVpinctrl@40020000 }@0lð:!st,stm32f469-pinctrlVgpio@40020000L\,AR ehGPIOAuVgpio@40020400L\,AR ehGPIOBuVgpio@40020800L\,AR ehGPIOCu gpio@40020c00L\,AR  ehGPIODu0Vgpio@40021000L\,AR ehGPIOEu@gpio@40021400L\,AR ehGPIOFuPgpio@40021800L\,AR ehGPIOGu`V gpio@40021c00L\,AR ehGPIOHupVgpio@40022000L\,AR  ehGPIOIu€gpio@40022400L\,AR$ e hGPIOJ u� œgpio@40022800L\,AR( e hGPIOKu£Vusart1-0pins1� ˆ•¥pins2� ˆusart3-0Vpins1�ˆ•¥pins2�ˆusbotg-fs-0Vpins � ˆ•¥usbotg-fs-1pins �   ˆ•¥usbotg-hs-0pins0�t ‹          ˆ•¥mii-0pins8�m n "  # k  !   $ % v w ¥adc-200pins�Zpwm1-0V pins �pwm3-0Vpins�i2c1-0pins�ˆ¯¥ltdc-0pinsp�Œ�Ž��‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§¥ltdc-1pinsX�&g*   fj 6k'3l Z¥spi5-0pins1�WYˆ•¥pins2�Xˆi2c3-0pins�)ˆ¯¥dcmi-0Vpins<�&'()+3F*,62ˆ•¥sdio-pins-0Vpins�( ) * + , 2 •¥sdio-pins-od-0Vpins1�( ) * + , •¥pins2�2 ¯¥clocksclk-hse— !fixed-clockÀzVclk-lse— !fixed-clockÀ€clk-lsi— !fixed-clockÀ}Vi2s-ckin— !fixed-clockÀVchosenÐroot=/dev/ramÙserial0:115200n8memory@0åmemoryRaliasesñ/soc/serial@40004800mmc_vcard!regulator-fixed ùmmc_vcard2Z  2Z V vdd-dsi!regulator-fixedùvdd_dsi2Z  2Z Vleds !gpio-ledsled-green V  8heartbeatled-orange Vled-red Vled-blue Vgpio-keys !gpio-keysNbutton-0YUser_� Vvcc5v-otg-regulator!regulator-fixedj } ùvcc5_host1‚ #address-cells#size-cellsmodelcompatibleinterrupt-controller#interrupt-cellsregphandlestatusclocksinterrupt-parentrangesdma-rangesclock-names#pwm-cellspinctrl-0pinctrl-namesinterruptsassigned-clocksassigned-clock-parentsst,syscfgdmasdma-namesresets#io-channel-cellsarm,primecell-periphidmax-frequencyvmmc-supplycd-gpiosbroken-cdpinctrl-1bus-widthremote-endpoint#reset-cells#clock-cellsassigned-clock-rates#dma-cellsst,mem2memreg-namesinterrupt-namesst,sysconsnps,pblsnps,mixed-burstdr_modereset-namesreset-gpiospower-supplypins-are-numberedgpio-controller#gpio-cellsst,bank-namegpio-rangespinmuxbias-disabledrive-push-pullslew-ratedrive-open-drainclock-frequencybootargsstdout-pathdevice_typeserial0regulator-nameregulator-min-microvoltregulator-max-microvoltlinux,default-triggerautorepeatlabellinux,codeenable-active-highgpioregulator-always-on