Ð þíHé8E4(µDü*STMicroelectronics STM32F429i-DISCO board!!st,stm32f429i-discost,stm32f429interrupt-controller@e000e100!arm,armv7m-nvic,ARàá Vtimer@e000e010!arm,armv7m-systickRàà^okay esoc !simple-busl}efuse@1fff7800!st,stm32f4-otpRÿxcalib@22cR,calib@22eR.timers@40000000!st,stm32-timersR@ e€„int ^disabledpwm !st,stm32-pwm� ^disabledtimer@1!st,stm32-timer-triggerR ^disabledtimers@40000400!st,stm32-timersR@ e�„int ^disabledpwm !st,stm32-pwm� ^disabledtimer@2!st,stm32-timer-triggerR ^disabledtimers@40000800!st,stm32-timersR@ e‚„int ^disabledpwm !st,stm32-pwm� ^disabledtimer@3!st,stm32-timer-triggerR ^disabledtimers@40000c00!st,stm32-timerR@  eƒ^okay›2timers@40001000!st,stm32-timersR@ e„„int ^disabledtimer@5!st,stm32-timer-triggerR ^disabledtimers@40001400!st,stm32-timersR@ e…„int ^disabledtimer@6!st,stm32-timer-triggerR ^disabledtimers@40001800!st,stm32-timersR@ e†„int ^disabledpwm !st,stm32-pwm� ^disabledtimer@11!st,stm32-timer-triggerR  ^disabledtimers@40001c00!st,stm32-timersR@ e‡„int ^disabledpwm !st,stm32-pwm� ^disabledtimers@40002000!st,stm32-timersR@  eˆ„int ^disabledpwm !st,stm32-pwm� ^disabledrtc@40002800 !st,stm32-rtcR@( e ¦ ¶l› Í^okaywatchdog@40003000!st,stm32-iwdgR@0e„lsi ^disabledspi@40003800!st,stm32f4-spiR@8›$ eŽ ^disabledspi@40003c00!st,stm32f4-spiR@<›3 e� ^disabledserial@40004400!st,stm32-uartR@D›& e‘ ^disabledserial@40004800!st,stm32-uartR@H›' e’ ^disabled(×Ürxtxserial@40004c00!st,stm32-uartR@L›4 e“ ^disabledserial@40005000!st,stm32-uartR@P›5 e” ^disabledi2c@40005400!st,stm32f4-i2cR@T› æ e• ^disabledi2c@40005c00!st,stm32f4-i2cR@\›HIæ e—^okayídefaultû† stmpe811@41 !st,stmpe811RA›l!,7stmpe_touchscreen !st,stmpe-tsFR`kwstmpe_adc !st,stmpe-adcŠdac@40007400!st,stm32f4-dac-coreR@tæ e�„pclk ^disableddac@1 !st,stm32-dacœR ^disableddac@2 !st,stm32-dacœR ^disabledserial@40007800!st,stm32-uartR@x›R ež ^disabledserial@40007c00!st,stm32-uartR@|›S eŸ ^disabledtimers@40010000!st,stm32-timersR@ e „int ^disabledpwm !st,stm32-pwm� ^disabledtimer@0!st,stm32-timer-triggerR ^disabledtimers@40010400!st,stm32-timersR@ e¡„int ^disabledpwm !st,stm32-pwm� ^disabledtimer@7!st,stm32-timer-triggerR ^disabledserial@40011000!st,stm32-uartR@›% e¤^okay(×  Ürxtxû ídefaultserial@40011400!st,stm32-uartR@›G e¥ ^disabledadc@40012000!st,stm32f4-adc-coreR@ › e¨„adc,A ^disabledV adc@0!st,stm32f4-adcœR e¨l ›× Ürx ^disabledadc@100!st,stm32f4-adcœR e©l ›× Ürx ^disabledadc@200!st,stm32f4-adcœR eªl ›× Ürx ^disabledmmc@40012c00!arm,pl180arm,primecell®ˆ€R@, e« „apb_pclk›1ÅÜl ^disabledspi@40013000!st,stm32f4-spiR@0›# e¬ ^disabledspi@40013400!st,stm32f4-spiR@4›T e­ ^disabledsyscon@40013800!st,stm32-syscfgsysconR@8Vinterrupt-controller@40013c00!st,stm32-exti,AR@<8› ()*>LVtimers@40014000!st,stm32-timersR@@ e°„int ^disabledpwm !st,stm32-pwm� ^disabledtimer@8!st,stm32-timer-triggerR ^disabledtimers@40014400!st,stm32-timersR@D e±„int ^disabledpwm !st,stm32-pwm� ^disabledtimers@40014800!st,stm32-timersR@H e²„int ^disabledpwm !st,stm32-pwm� ^disabledspi@40015000!st,stm32f4-spiR@P›U e´(×  Ürxtx^okayû ídefaultÓ  l3gd20@0!st,l3gd20-gyroܘ–€îl›R^okaydisplay@1#!st,sf-tc240t-9370-tilitek,ili9341Rþܘ–€  portendpointVspi@40015400!st,stm32f4-spiR@T›V eµ ^disabledpower-config@40007000!st,stm32-power-configsysconR@pVdisplay-controller@40016800!st,stm32-ltdcR@h›XYæ: e„lcd^okayûídefaultportendpointVcrc@40023000!st,stm32f4-crcR@0 e ^okayrcc@40023800!.!st,stm32f42xx-rccst,stm32-rccR@8eÍ ¦;B@Vdma-controller@40026000 !st,stm32-dmaR@` › / ePVdma-controller@40026400 !st,stm32-dmaR@d ›89:;<DEF eP[V ethernet@40028000 !st,stm32-dwmacsnps,dwmac-3.50aR@€€ fstmmaceth›=pmacirq „stmmacethmac-clk-txmac-clk-rx$e€Š“ ^disableddma2d@4002b000!st,stm32-dma2dR@° ›Zæ— e„dma2d ^disabledusb@40040000!st,stm32f4x9-fsotgR@›M e„otg^okay¤hostûídefaultusb@50000000!st,stm32f4x9-fsotgRP›C e'„otg ^disableddcmi@50050000!st,stm32-dcmiRP›Næ  e „mclkídefaultû× Ütx ^disabledrng@50060800 !st,stm32-rngRP e&pinctrl@40020000 }@0lͬ!st,stm32f429-pinctrlVgpio@40020000¾Î,AR eÚGPIOAçVgpio@40020400¾Î,AR eÚGPIOBçgpio@40020800¾Î,AR eÚGPIOCç V gpio@40020c00¾Î,AR  eÚGPIODç0Vgpio@40021000¾Î,AR eÚGPIOEç@gpio@40021400¾Î,AR eÚGPIOFçPgpio@40021800¾Î,AR eÚGPIOGç`Vgpio@40021c00¾Î,AR eÚGPIOHçpgpio@40022000¾Î,AR  eÚGPIOIç€gpio@40022400¾Î,AR$ e ÚGPIOJç�gpio@40022800¾Î,AR( e ÚGPIOKç usart1-0V pins1ó úpins2ó úusart3-0pins1óúpins2óúusbotg-fs-0pins ó úusbotg-fs-1Vpins ó   úusbotg-hs-0pins0ót ‹          úmii-0pins8óm n "  # k  !   $ % v w adc-200pinsóZpwm1-0pins ópwm3-0pinsói2c1-0pinsóú!ltdc-0pinspóŒ�Ž��‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§ltdc-1VpinsXó&g*   fj 6k'3l Zspi5-0V pins1óWYúpins2óXúi2c3-0Vpinsó)ú!dcmi-0Vpins<ó&'()+3F*,62úsdio-pins-0pinsó( ) * + , 2 sdio-pins-od-0pins1ó( ) * + , pins2ó2 !clocksclk-hse. !fixed-clockzVclk-lse. !fixed-clock€clk-lsi. !fixed-clock}Vi2s-ckin. !fixed-clockVchosen2root=/dev/ram;serial0:115200n8memory@90000000GmemoryR�€aliasesS/soc/serial@40011000leds !gpio-ledsled-red Öled-green Ö  [heartbeatgpio-keys !gpio-keysqbutton-0|User‚f Övcc5v-otg-regulator!regulator-fixed �  ’vcc5_host1¡ #address-cells#size-cellsmodelcompatibleinterrupt-controller#interrupt-cellsregphandlestatusclocksinterrupt-parentrangesclock-names#pwm-cellsinterruptsassigned-clocksassigned-clock-parentsst,syscfgdmasdma-namesresetspinctrl-namespinctrl-0clock-frequencyst,adc-freqst,mod-12bst,ref-selst,sample-timest,ave-ctrlst,fraction-zst,i-drivest,settlingst,touch-det-delayst,norequest-mask#io-channel-cellsarm,primecell-periphidmax-frequencycs-gpiosspi-max-frequencyst,drdy-int-pinspi-3wiredc-gpiosremote-endpoint#reset-cells#clock-cellsassigned-clock-rates#dma-cellsst,mem2memreg-namesinterrupt-namesst,sysconsnps,pblsnps,mixed-burstdr_modepins-are-numberedgpio-controller#gpio-cellsst,bank-namegpio-rangespinmuxbias-disabledrive-push-pullslew-ratedrive-open-drainbootargsstdout-pathdevice_typeserial0linux,default-triggerautorepeatlabellinux,codegpioregulator-nameregulator-always-on