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'coreaxiahbvop@ff930000rockchip,rk3288-vop ùÿ“œÿ“ ´5žÑüaclk_vopdclk_vophclk_vopñb ýdef 'axiahbdclkÿc3okayportb endpoint@0ù dbwendpoint@1ù ebsendpoint@2ù fbmendpoint@3ù gbpiommu@ff930300rockchip,iommuùÿ“ ´5ÅÑ üaclkifaceñb É3okaybcvop@ff940000rockchip,rk3288-vop ùÿ”œÿ” ´5Æ¿Òüaclk_vopdclk_vophclk_vopñb ý°±² 'axiahbdclkÿh 3disabledportb endpoint@0ù ibxendpoint@1ù jbtendpoint@2ù kbnendpoint@3ù lbqiommu@ff940300rockchip,iommuùÿ” ´5ÆÒ üaclkifaceñb É 3disabledbhmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsiùÿ–@ ´5~d ürefpclkñb @ 3disabledportsportendpoint@0ù mbfendpoint@1ù nbklvds@ff96c000rockchip,rk3288-lvdsùÿ–À@5g üpclk_lvds‘lcdcŸoñb @ 3disabledportsport@0ùendpoint@0ù pbgendpoint@1ù qbldp@ff970000rockchip,rk3288-dpùÿ—@ ´b5icüdppclkgrldpñb ýo'dp@ 3disabledportsport@0ùendpoint@0ù sbeendpoint@1ù tbjhdmi@ff980000rockchip,rk3288-dw-hdmiùÿ˜Øƒ@ ´g5hmnüiahbisfrcecñb 3okay‘defaultunwedgeŸu×vb�portsportendpoint@0ù wbdendpoint@1ù xbivideo-codec@ff9a0000rockchip,rk3288-vpuùÿš´   Wvepuvdpu5ÐÜ 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#address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedrockchip,default-sample-phasedisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreg-shiftreg-io-widthhost-wakeup-gpiosshutdown-gpiosdevice-wakeup-gpiosmax-speedbrcm,bt-pcm-int-params#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc7-supplyvcc8-supplyvddio-supplydvs-gpiosvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltregulator-suspend-mem-disabled#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-line-namesrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpiopwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,hdmi-codecrockchip,i2s-controller