Ð þí]{8W({VÈ.,rockchip,px3-evbrockchip,px3rockchip,rk31887Rockchip PX3-EVBaliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/serial@10124000h/serial@10126000p/serial@20064000x/serial@20068000€/spi@20070000…/spi@20074000Š/mmc@10214000�/mmc@1021c000oscillator ,fixed-clock”n6¤±xin24mÄ8gpu@10090000",rockchip,rk3188-maliarm,mali-400Ì ÐÅÅ ×buscoreãÅóõáx disabledx 5!gpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu31video-codec@10104000(,rockchip,rk3188-vpurockchip,rk3066-vpuÌ@   !vepuvdpu ÐÎØÍ×(×aclk_vdpuhclk_vdpuaclk_vepuhclk_vepu1cache-controller@10138000,arm,pl310-cacheÌ€?MÄ0scu@1013c000,arm,cortex-a9-scuÌÀglobal-timer@1013c200,arm,cortex-a9-global-timerÌ   Ð disabledlocal-timer@1013c600,arm,cortex-a9-twd-timerÌÆ   Ðinterrupt-controller@1013d000,arm,cortex-a9-gicYnÌÐÁÄserial@10124000&,rockchip,rk3188-uartsnps,dw-apb-uartÌ@ "‰×baudclkapb_pclkÐ@Lokay–default¤serial@10126000&,rockchip,rk3188-uartsnps,dw-apb-uartÌ` #‰×baudclkapb_pclkÐAMokay–default¤qos@1012d000,rockchip,rk3066-qossysconÌÐ Äqos@1012e000,rockchip,rk3066-qossysconÌà Äqos@1012f000,rockchip,rk3066-qossysconÌð Äqos@1012f080,rockchip,rk3066-qossysconÌð€ Äqos@1012f100,rockchip,rk3066-qossysconÌñ Äqos@1012f180,rockchip,rk3066-qossysconÌñ€ Äqos@1012f200,rockchip,rk3066-qossysconÌò qos@1012f280,rockchip,rk3066-qossysconÌò€ Äusb@10180000,rockchip,rk3066-usbsnps,dwc2Ì ÐÃ×otg®otg¶È×€€@@ æ ëusb2-phyokayusb@101c0000 ,snps,dwc2Ì ÐÉ×otg®hostæ ëusb2-phyokayethernet@10204000,rockchip,rk3188-emacÌ @< õÐÄD ×hclkmacrefd rmii disabledmmc@10214000,rockchip,rk2928-dw-mshcÌ!@ ÐÀH×biuciu rx-tx$Q/resetokay–default¤ ;GQctmmc@10218000,rockchip,rk2928-dw-mshcÌ!€ ÐÁI×biuciu rx-tx$R/reset disabledmmc@1021c000,rockchip,rk2928-dw-mshcÌ!À ÐÂJ×biuciu rx-tx$S/resetokayGQ–default ¤nand-controller@10500000,rockchip,rk2928-nfcÌP@ ÐÓ×ahb disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfdÌ @Ä9reboot-mode,syscon-reboot-mode�@”RBàRBîRBà ¾RBÃpower-controller!,rockchip,rk3188-power-controllerÊÄpower-domain@7ÌhÐÃľ¿ÍÎOÊÐÈÑÉÒÞÊpower-domain@6Ì ÐÎÍØ×ÞÊpower-domain@8ÌÐÅÞÊgrf@20008000&,rockchip,rk3188-grfsysconsimple-mfdÌ €Äio-domains",rockchip,rk3188-io-voltage-domain disabledusbphy,rockchip,rk3188-usb-phyokayusb-phy@10cÌ ÐQ×phyclk¤åÄusb-phy@11cÌÐR×phyclk¤åÄdma-controller@20018000,arm,pl330arm,primecellÌ €@ðûÐÀ ×apb_pclkÄ6dma-controller@2001c000,arm,pl330arm,primecellÌ À@ðûÐÀ ×apb_pclk disabledi2c@2002d000,rockchip,rk3188-i2cÌ Ð (õ×i2cÐPokay–default¤accelerometer@18 ,bosch,bma250Ìi2c@2002f000,rockchip,rk3188-i2cÌ ð )õÐQ×i2cokay–default¤”€pmic@1c,rockchip,rk818Ì -N¤±xin32krk808-clkout2\ht€Œ˜¤°regulatorsDCDC_REG1¼Ðâ q°ú™pvdd_armÄ2regulator-state-mem!DCDC_REG2¼Ðâ øPúÐvdd_gpuregulator-state-mem:RB@DCDC_REG3¼Ðvcc_ddrregulator-state-mem:DCDC_REG4¼Ðâ2Z ú2Z vcc_ioÄregulator-state-mem:R2Z LDO_REG1â2Z ú2Z vcc_cifLDO_REG2¼Ðâ2Z ú2Z  vcc_jetta33LDO_REG3¼ÐâB@úB@vdd_10regulator-state-mem:RB@LDO_REG4âw@úw@lvds_12LDO_REG5âw@ú2Z lvds_25LDO_REG6âB@úB@cif_18LDO_REG7âw@ú2Z vcc_sdÄregulator-state-mem:R2Z LDO_REG8âw@ú2Z wl_18SWITCH_REGlcd_33pwm@20030000,rockchip,rk2928-pwmÌ nÐF disabled–default¤pwm@20030010,rockchip,rk2928-pwmÌ nÐFokay–default¤watchdog@2004c000 ,rockchip,rk3188-wdtsnps,dw-wdtÌ ÀÐK 3okaypwm@20050020,rockchip,rk2928-pwmÌ  nÐGokay–default¤ pwm@20050030,rockchip,rk2928-pwmÌ 0nÐGokay–default¤!i2c@20056000,rockchip,rk3188-i2cÌ ` *õÐR×i2c disabled–default¤"touchscreen@40,silead,gsl1680Ì@# y… ˜«i2c@2005a000,rockchip,rk3188-i2cÌ   +õÐS×i2c disabled–default¤$i2c@2005e000,rockchip,rk3188-i2cÌ à 4õÐT×i2c disabled–default¤%serial@20064000&,rockchip,rk3188-uartsnps,dw-apb-uartÌ @ $‰×baudclkapb_pclkÐBNokay–default¤&serial@20068000&,rockchip,rk3188-uartsnps,dw-apb-uartÌ € %‰×baudclkapb_pclkÐCOokay–default¤'saradc@2006c000,rockchip,saradcÌ À ¾ÐGJ×saradcapb_pclkW /saradc-apb disabledspi@20070000(,rockchip,rk3188-spirockchip,rk3066-spiÐEH×spiclkapb_pclk &Ì  txrx disabled–default¤()*+spi@20074000(,rockchip,rk3188-spirockchip,rk3066-spiÐFI×spiclkapb_pclk 'Ì @ txrx disabled–default¤,-./dma-controller@20078000,arm,pl330arm,primecellÌ €@ðûÐÁ ×apb_pclkÄ cpusÐrockchip,rk3066-smpcpu@0Þcpu,arm,cortex-a9ê0Ìûœ@Ð 12cpu@1Þcpu,arm,cortex-a9ê0Ì 12cpu@2Þcpu,arm,cortex-a9ê0Ì 12cpu@3Þcpu,arm,cortex-a9ê0Ì 12opp-table-0,operating-points-v2(Ä1opp-3120000003˜¾: YøHœ@opp-5040000003 n:Hopp-6000000003#ÃF:~ðYopp-81600000030£,:à˜opp-10080000003<Ü:g8opp-12000000003G†Œ:Œ0opp-14160000003Tfr:Ðopp-16080000003_Ø":™pdisplay-subsystem,rockchip,display-subsysteme34sram@10080000 ,mmio-sramÌ€ k€smp-sram@0,rockchip,rk3066-smp-sramÌPvop@1010c000,rockchip,rk3188-vopÌÀ  ÐþÍ×aclk_vopdclk_vophclk_vop1def /axiahbdclk disabledportÄ3vop@1010e000,rockchip,rk3188-vopÌà ÐÄ¿Î×aclk_vopdclk_vophclk_vop1ghi /axiahbdclk disabledportÄ4timer@2000e000,,rockchip,rk3188-timerrockchip,rk3288-timerÌ à  .ÐEW ×pclktimertimer@200380a0,,rockchip,rk3188-timerrockchip,rk3288-timerÌ €   @ÐBZ ×pclktimeri2s@1011a000(,rockchip,rk3188-i2srockchip,rk3066-i2sÌ    –default¤5ÐKÆ×i2s_clki2s_hclk66txrxr�§ disabledsound@1011e000,,rockchip,rk3188-spdifrockchip,rk3066-spdifÌà §ÐNÅ ×mclkhclk6tx  –default¤7 disabledclock-controller@20000000,rockchip,rk3188-cruÌ Ð8×xin24mõ¤¸Äefuse@20010000,rockchip,rk3188-efuseÌ @Ð[ ×pclk_efusecpu_leakage@17Ìpinctrl,rockchip,rk3188-pinctrlõÅ9kgpio@2000a000,rockchip,rk3188-gpio-bank0Ì   6ÐUÒâYnÄgpio@2003c000,rockchip,gpio-bankÌ À 7ÐVÒâYnÄ#gpio@2003e000,rockchip,gpio-bankÌ à 8ÐWÒâYngpio@20080000,rockchip,gpio-bankÌ  9ÐXÒâYnpcfg-pull-upîÄ;pcfg-pull-downûpcfg-pull-none Ä:emmcemmc-clk:Äemmc-cmd;Äemmc-rst:Äemacemac-xfer€::::::::emac-mdio ::i2c0i2c0-xfer ::Äi2c1i2c1-xfer ::Äi2c2i2c2-xfer ::Ä"i2c3i2c3-xfer ::Ä$i2c4i2c4-xfer ::Ä%lcdc1lcdc1-dclk:lcdc1-den:lcdc1-hsync:lcdc1-vsync:lcdc1-rgb24€::::::::: : : : : :::::::::::pwm0pwm0-out:Äpwm1pwm1-out:Äpwm2pwm2-out:Ä pwm3pwm3-out:Ä!spi0spi0-clk;Ä(spi0-cs0;Ä+spi0-tx;Ä)spi0-rx;Ä*spi0-cs1;spi1spi1-clk;Ä,spi1-cs0;Ä/spi1-rx;Ä.spi1-tx;Ä-spi1-cs1;uart0uart0-xfer ;:Äuart0-cts:uart0-rts:uart1uart1-xfer ;:Äuart1-cts:uart1-rts:uart2uart2-xfer ; :Ä&uart3uart3-xfer  ; :Ä'uart3-cts :uart3-rts :sd0sd0-clk:Ä sd0-cmd:Ä sd0-cd:Ä sd0-wp :sd0-pwr:sd0-bus-width1:sd0-bus-width4@::::Ä sd1sd1-clk:sd1-cmd:sd1-cd:sd1-wp:sd1-bus-width1:sd1-bus-width4@::::i2s0i2s0-bus`::::::Ä5spdifspdif-tx:Ä7pcfg-output-low%usbhost-vbus-drv:otg-vbus-drv:chosen0serial2:115200n8memory@60000000Ì`€Þmemorygpio-keys ,gpio-keys<key-power GtRGPIO Key PowerXNidvsys-regulator,regulator-fixedvsysâLK@úLK@ÐÄ #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1mmc0mmc1clock-frequency#clock-cellsclock-output-namesphandleregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthpinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modedmasdma-namesfifo-depthreset-namesvmmc-supplybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpnon-removableoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellspower-gpiostouchscreen-size-xtouchscreen-size-ysilead,max-fingers#io-channel-cellsenable-methoddevice_typenext-level-cacheclock-latencyoperating-points-v2cpu-supplyopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsrangesrockchip,playback-channelsrockchip,capture-channels#sound-dai-cells#reset-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disablerockchip,pinsoutput-lowstdout-pathautorepeatlinux,codelabellinux,input-typedebounce-interval