Ð þí_ 8Xø(XÀ!,rikomagic,mk808rockchip,rk3066a7Rikomagic MK808aliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/serial@10124000h/serial@10126000p/serial@20064000x/serial@20068000€/spi@20070000…/spi@20074000Š/mmc@10214000�/mmc@10218000oscillator ,fixed-clock”n6¤±xin24mÄ=gpu@10090000",rockchip,rk3066-maliarm,mali-400Ì ÐÅÅ ×buscoreãÅóõáx disabledx5!gpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu31video-codec@10104000,rockchip,rk3066-vpuÌ@   !vepuvdpu ÐÎØÍ×(×aclk_vdpuhclk_vdpuaclk_vepuhclk_vepu1cache-controller@10138000,arm,pl310-cacheÌ€?MÄ0scu@1013c000,arm,cortex-a9-scuÌÀglobal-timer@1013c200,arm,cortex-a9-global-timerÌ   Ð disabledlocal-timer@1013c600,arm,cortex-a9-twd-timerÌÆ   Ðinterrupt-controller@1013d000,arm,cortex-a9-gicYnÌÐÁÄserial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uartÌ@ "‰×baudclkapb_pclkÐ@L disabled–›txrx¥default³serial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uartÌ` #‰×baudclkapb_pclkÐAM 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disabled¥default³$serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uartÌ @ $‰×baudclkapb_pclkÐBNokay–  ›txrx¥default³%serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uartÌ € %‰×baudclkapb_pclkÐCO disabled–  ›txrx¥default³&saradc@2006c000,rockchip,saradcÌ À ÅÐGJ×saradcapb_pclkW /saradc-apbokay×'Ä@spi@20070000,rockchip,rk3066-spiÐEH×spiclkapb_pclk &Ì – ›txrx disabled¥default³()*+spi@20074000,rockchip,rk3066-spiÐFI×spiclkapb_pclk 'Ì @– ›txrx disabled¥default³,-./dma-controller@20078000,arm,pl330arm,primecellÌ €@}ˆ£ÐÁ ×apb_pclkÄ cpusãrockchip,rk3066-smpcpu@0ñcpu,arm,cortex-a9ý0Ì8›@Ö O€íØa€*ˆ s€*ˆ 'ÀÈà°ÀÈàÂÀg8œ@Ðcpu@1ñcpu,arm,cortex-a9ý0Ìdisplay-subsystem,rockchip,display-subsystem-12sram@10080000 ,mmio-sramÌ 3smp-sram@0,rockchip,rk3066-smp-sramÌPvop@1010c000,rockchip,rk3066-vopÌÀœ  ÐþÍ×aclk_vopdclk_vophclk_vop1def /axiahbdclkokayportÄ1endpoint@0Ì:3Ä7vop@1010e000,rockchip,rk3066-vopÌàœ ÐÄ¿Î×aclk_vopdclk_vophclk_vop1ghi /axiahbdclk disabledportÄ2endpoint@0Ì:4Ä8hdmi@10116000,rockchip,rk3066-hdmiÌ`  @ÐÙ×hclk¥default³561 Jokayportsport@0Ìendpoint@0Ì:7Ä3endpoint@1Ì:8 disabledÄ4port@1Ìendpoint:9ÄBi2s@10118000,rockchip,rk3066-i2sÌ€  ¥default³:ÐKÆ×i2s_clki2s_hclk–›txrx[vJ disabledi2s@1011a000,rockchip,rk3066-i2sÌ    ¥default³;ÐLÇ×i2s_clki2s_hclk–›txrx[vJ disabledi2s@1011c000,rockchip,rk3066-i2sÌÀ  ¥default³<ÐMÈ×i2s_clki2s_hclk–  ›txrx[vJ disabledclock-controller@20000000,rockchip,rk3066a-cruÌ Ð=×xin24m ¤�@ãËÔ^ÌÕ_ óׄ#g¸€á£ðÑ€xhÀá£ðÑ€xhÀÄtimer@2000e000,snps,dw-apb-timerÌ à .ÐVD ×timerpclkefuse@20010000,rockchip,rk3066a-efuseÌ @Ð[ ×pclk_efusecpu_leakage@17Ìtimer@20038000,snps,dw-apb-timerÌ € ,ÐTB ×timerpclktimer@2003a000,snps,dw-apb-timerÌ   -ÐUC ×timerpclktsadc@20060000,rockchip,rk3066-tsadcÌ Ð]]×saradcapb_pclk Å\ /saradc-apb disabledpinctrl,rockchip,rk3066a-pinctrl 3gpio@20034000,rockchip,gpio-bankÌ @ 6ÐU�­YnÄAgpio@2003c000,rockchip,gpio-bankÌ À 7ÐV�­Yngpio@2003e000,rockchip,gpio-bankÌ à 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???Ä:i2s1i2s1-bus`Ü??????Ä;i2s2i2s2-bus`Ü??????Ä<usb-hosthost-drvÜ?ÄCusb-otgotg-drvÜ?ÄEsdmmcsdmmc-pwrÜ?ÄGsdiowifi-pwrÜ>ÄHchosenêserial2:115200n8memory@60000000Ì`@ñmemoryadc-keys ,adc-keysö@buttons&% -dbutton-recovery �recovery;hFgpio-leds ,gpio-ledsled-0�mk808:blue:power `Afoff tdefault-onhdmi_con,hdmi-connectorøcportendpoint:BÄ9vcc-2v5,regulator-fixedŠvcc_2v5™&% ±&% Ä'vcc-io,regulator-fixedŠvcc_io™2Z ±2Z ÄDusb-host-regulator,regulator-fixedÉ ÜA³C¥defaultá Šhost-pwr™LK@±LK@õ† Dusb-otg-regulator,regulator-fixedÉ ÜA³E¥defaultáŠvcc_otg™LK@±LK@õ† Dsdmmc-regulator,regulator-fixed ÜF³G¥defaultŠvcc_sd™2Z ±2Z õ† DÄsdio-regulator,regulator-fixedÉ ÜF³H¥default Švcc_wifi™2Z ±2Z õ† DÄ #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1mmc0mmc1clock-frequency#clock-cellsclock-output-namesphandleregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modefifo-depthreset-namesmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeedvmmc-supplynon-removablelabelnand-bus-widthnand-ecc-modenand-ecc-step-sizenand-ecc-strengthnand-is-boot-mediumrockchip,boot-blksrockchip,boot-ecc-strengthoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burst#pwm-cells#io-channel-cellsvref-supplyenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencyportsrangesremote-endpoint#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#reset-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltgpiosdefault-statelinux,default-triggerregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highgpioregulator-always-onstartup-delay-usvin-supply