Ð þí^c8Xà(ƒX¨',mundoreader,bq-curie2rockchip,rk3066a 7bq Curie 2aliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/serial@10124000h/serial@10126000p/serial@20064000x/serial@20068000€/spi@20070000…/spi@20074000Š/mmc@10214000�/mmc@10218000oscillator ,fixed-clock”n6¤±xin24mÄ=gpu@10090000",rockchip,rk3066-maliarm,mali-400Ì ÐÅÅ ×buscoreãÅóõáx disabledx5!gpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu31video-codec@10104000,rockchip,rk3066-vpuÌ@   !vepuvdpu ÐÎØÍ×(×aclk_vdpuhclk_vdpuaclk_vepuhclk_vepu1cache-controller@10138000,arm,pl310-cacheÌ€?MÄ0scu@1013c000,arm,cortex-a9-scuÌÀglobal-timer@1013c200,arm,cortex-a9-global-timerÌ   Ð disabledlocal-timer@1013c600,arm,cortex-a9-twd-timerÌÆ   Ðinterrupt-controller@1013d000,arm,cortex-a9-gicYnÌÐÁÄserial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uartÌ@ "‰×baudclkapb_pclkÐ@Lokay–›txrx¥default³serial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uartÌ` #‰×baudclkapb_pclkÐAMokay–›txrx¥default³qos@1012d000,rockchip,rk3066-qossysconÌÐ Äqos@1012e000,rockchip,rk3066-qossysconÌà Äqos@1012f000,rockchip,rk3066-qossysconÌð Äqos@1012f080,rockchip,rk3066-qossysconÌð€ Äqos@1012f100,rockchip,rk3066-qossysconÌñ Äqos@1012f180,rockchip,rk3066-qossysconÌñ€ Äqos@1012f200,rockchip,rk3066-qossysconÌò Äqos@1012f280,rockchip,rk3066-qossysconÌò€ Äusb@10180000,rockchip,rk3066-usbsnps,dwc2Ì ÐÃ×otg½otgÅ׿€€@@ õ úusb2-phy disabledusb@101c0000 ,snps,dwc2Ì ÐÉ×otg½hostõ úusb2-phy disabledethernet@10204000,rockchip,rk3066-emacÌ @<  ÐÄD ×hclkmacrefdrmii disabledmmc@10214000,rockchip,rk2928-dw-mshcÌ!@ ÐÀH×biuciu– ›rx-tx$Q/resetokay”úð€;úð€¥default³ IU_q‚mmc@10218000,rockchip,rk2928-dw-mshcÌ!€ ÐÁI×biuciu– ›rx-tx$R/resetokay¥default ³�Ummc@1021c000,rockchip,rk2928-dw-mshcÌ!À ÐÂJ×biuciu– ›rx-tx$S/reset disablednand-controller@10500000,rockchip,rk2928-nfcÌP@ ÐÓ×ahb disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfdÌ @reboot-mode,syscon-reboot-mode›@¢RBîRBüRBà ÌRBÃpower-controller!,rockchip,rk3066-power-controllerØÄpower-domain@7̈ÐÃľ¿ÍÎPÇÖOÊÐÙÈÑÉÒìØpower-domain@6Ì ÐÎÍØ×ìØpower-domain@8ÌÐÅìØgrf@20008000&,rockchip,rk3066-grfsysconsimple-mfdÌ €Ä usbphy,rockchip,rk3066a-usb-phy disabledusb-phy@17cÌ|ÐQ×phyclk¤óÄusb-phy@188̈ÐR×phyclk¤óÄdma-controller@20018000,arm,pl330arm,primecellÌ €@þ $ÐÀ ×apb_pclkÄdma-controller@2001c000,arm,pl330arm,primecellÌ À@þ $ÐÀ ×apb_pclk disabledi2c@2002d000,rockchip,rk3066-i2cÌ Ð ( ×i2cÐP disabled¥default³i2c@2002f000,rockchip,rk3066-i2cÌ ð ) ÐQ×i2cokay¥default³”€tps@2dÌ-;G ,ti,tps65910regulatorsregulator@0Svcc_rtcbÌvvrtcregulator@1Svcc_iobÌvvioÄregulator@2Svdd_arm‹ 'À£ã`»bÌvvdd1Ä1regulator@3Svcc_ddr‹ 'À£ã`»bÌvvdd2regulator@5 Svcc18_cifbÌvvdig1regulator@6Svdd_11bÌvvdig2regulator@7Svcc_25bÌvvpllregulator@8Svcc_18bÌvvdacregulator@9 Svcc25_hdmibÌ vvaux1regulator@10Svcca_33bÌ vvaux2regulator@11Svcc_tpbÌ vvaux33regulator@12 Svcc28_cifbÌ vvmmcregulator@4Ìvvdd3regulator@13Ì vvbbpwm@20030000,rockchip,rk2928-pwmÌ ÍÐF disabled¥default³pwm@20030010,rockchip,rk2928-pwmÌ ÍÐF disabled¥default³ watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdtÌ ÀÐK 3okaypwm@20050020,rockchip,rk2928-pwmÌ  ÍÐG disabled¥default³!pwm@20050030,rockchip,rk2928-pwmÌ 0ÍÐGokay¥default³"Ä@i2c@20056000,rockchip,rk3066-i2cÌ ` * ÐR×i2c disabled¥default³#i2c@2005a000,rockchip,rk3066-i2cÌ   + ÐS×i2c disabled¥default³$i2c@2005e000,rockchip,rk3066-i2cÌ à 4 ÐT×i2c disabled¥default³%serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uartÌ @ $‰×baudclkapb_pclkÐBNokay–  ›txrx¥default³&serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uartÌ € %‰×baudclkapb_pclkÐCOokay–  ›txrx¥default³'saradc@2006c000,rockchip,saradcÌ À ØÐGJ×saradcapb_pclkW /saradc-apb disabledspi@20070000,rockchip,rk3066-spiÐEH×spiclkapb_pclk &Ì – ›txrx disabled¥default³()*+spi@20074000,rockchip,rk3066-spiÐFI×spiclkapb_pclk 'Ì @– ›txrx disabled¥default³,-./dma-controller@20078000,arm,pl330arm,primecellÌ €@þ $ÐÁ ×apb_pclkÄ cpusêrockchip,rk3066-smpcpu@0øcpu,arm,cortex-a90Ì8›@Ö O€íØa€*ˆ s€*ˆ 'ÀÈà°ÀÈàÂÀg8&œ@Ð41cpu@1øcpu,arm,cortex-a90Ì41display-subsystem,rockchip,display-subsystem?23sram@10080000 ,mmio-sramÌ Esmp-sram@0,rockchip,rk3066-smp-sramÌPvop@1010c000,rockchip,rk3066-vopÌÀœ  ÐþÍ×aclk_vopdclk_vophclk_vop1def /axiahbdclk disabledportÄ2endpoint@0ÌL4Ä8vop@1010e000,rockchip,rk3066-vopÌàœ ÐÄ¿Î×aclk_vopdclk_vophclk_vop1ghi /axiahbdclk disabledportÄ3endpoint@0ÌL5Ä9hdmi@10116000,rockchip,rk3066-hdmiÌ`  @ÐÙ×hclk¥default³671 \ disabledportsport@0Ìendpoint@0ÌL8Ä4endpoint@1ÌL9Ä5port@1Ìi2s@10118000,rockchip,rk3066-i2sÌ€  ¥default³:ÐKÆ×i2s_clki2s_hclk–›txrxmˆ\ disabledi2s@1011a000,rockchip,rk3066-i2sÌ    ¥default³;ÐLÇ×i2s_clki2s_hclk–›txrxmˆ\ disabledi2s@1011c000,rockchip,rk3066-i2sÌÀ  ¥default³<ÐMÈ×i2s_clki2s_hclk–  ›txrxmˆ\ disabledclock-controller@20000000,rockchip,rk3066a-cruÌ Ð=×xin24m ¤¢@ãËÔ^ÌÕ_ óׄ#g¸€á£ðÑ€xhÀá£ðÑ€xhÀÄtimer@2000e000,snps,dw-apb-timerÌ à .ÐVD ×timerpclkefuse@20010000,rockchip,rk3066a-efuseÌ @Ð[ ×pclk_efusecpu_leakage@17Ìtimer@20038000,snps,dw-apb-timerÌ € ,ÐTB ×timerpclktimer@2003a000,snps,dw-apb-timerÌ   -ÐUC ×timerpclktsadc@20060000,rockchip,rk3066-tsadcÌ Ð]]×saradcapb_pclk Ø\ /saradc-apb disabledpinctrl,rockchip,rk3066a-pinctrl Egpio@20034000,rockchip,gpio-bankÌ @ 6ÐU¯¿Yngpio@2003c000,rockchip,gpio-bankÌ À 7ÐV¯¿Yngpio@2003e000,rockchip,gpio-bankÌ à 8ÐW¯¿Yngpio@20080000,rockchip,gpio-bankÌ  9ÐX¯¿YnÄAgpio@20084000,rockchip,gpio-bankÌ @ :ÐY¯¿YnÄBgpio@2000a000,rockchip,gpio-bankÌ   <ÐZ¯¿YnÄpcfg-pull-defaultËÄ?pcfg-pull-noneáÄ>emacemac-xfer€î>>>>>>>>emac-mdio î>>emmcemmc-clkî?emmc-cmdî ?emmc-rstî ?hdmihdmi-hpdî?Ä7hdmii2c-xfer î>>Ä6i2c0i2c0-xfer î>>Äi2c1i2c1-xfer î>>Äi2c2i2c2-xfer î>>Ä#i2c3i2c3-xfer î>>Ä$i2c4i2c4-xfer î>>Ä%pwm0pwm0-outî>Äpwm1pwm1-outî>Ä pwm2pwm2-outî>Ä!pwm3pwm3-outî>Ä"spi0spi0-clkî?Ä(spi0-cs0î?Ä+spi0-txî?Ä)spi0-rxî?Ä*spi0-cs1î?spi1spi1-clkî?Ä,spi1-cs0î?Ä/spi1-rxî?Ä.spi1-txî?Ä-spi1-cs1î?uart0uart0-xfer î??Äuart0-ctsî?uart0-rtsî?uart1uart1-xfer î??Äuart1-ctsî?uart1-rtsî?uart2uart2-xfer î? ?Ä&uart3uart3-xfer î??Ä'uart3-ctsî?uart3-rtsî?sd0sd0-clkî?Ä sd0-cmdî ?Ä sd0-cdî?Ä sd0-wpî?sd0-bus-width1î ?sd0-bus-width4@î ? ? ? ?Äsd1sd1-clkî?Äsd1-cmdî?Äsd1-cdî?sd1-wpî?sd1-bus-width1î?sd1-bus-width4@î????Äi2s0i2s0-bus�î?? ? ? ? ? ???Ä:i2s1i2s1-bus`î??????Ä;i2s2i2s2-bus`î??????Ä<memory@60000000ømemoryÌ`@vdd-log,pwm-regulator ü@èSvdd_log‹O€£O€bB@dO€*okayfixed-regulator,regulator-fixed Ssdmmc-supply‹-ÆÀ£-ÆÀ A† %Ägpio-keys ,gpio-keys0key-power ;AtLGPIO Key PowerRcqdkey-volume-down ;BArLGPIO Key Vol-Rqd #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1mmc0mmc1clock-frequency#clock-cellsclock-output-namesphandleregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modefifo-depthreset-namesmax-frequencyvmmc-supplybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpnon-removableoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstvcc5-supplyvcc6-supplyregulator-nameregulator-always-onregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-on#pwm-cells#io-channel-cellsenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencycpu-supplyportsrangesremote-endpoint#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#reset-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinspwmsvoltage-tablegpiostartup-delay-usvin-supplyautorepeatgpioslinux,codelabellinux,input-typewakeup-sourcedebounce-interval