Ð þí ™8( �àStechnexion,omap3-thundertechnexion,omap3-tao3530ti,omap3430ti,omap34xxti,omap3 +,7TI OMAP3 Thunder baseboard with TAO3530 SOMchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000 s/displaycpus+cpu@0arm,cortex-a8|cpuˆŒ“cpuŸ“à­ÁÐÜ pmu@54000000arm,cortex-a8-pmuˆT€äïdebugsssocti,omap-inframpu ti,omap3-mpuïmpuiva ti,iva2.2ïivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busˆhä +ùïl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ ùHscm@2000ti,omap3-scmsimple-busˆ + ù pinmux@30 ti,omap3-padconfpinctrl-singleˆ08+ 5Sÿpinmux_hsusbb2_pins`pÀÂÄ Æ È Ê ¤ ¦ ¨ ª ¬ ® pinmux_mmc1_pinsPp "$&Üðpinmux_mmc2_pins0p(*,.02Üôpinmux_wlan_gpiop^pinmux_uart3_pinspnApÜåpinmux_i2c3_pinsp’”Üìpinmux_mcspi1_pins p˜šœžÜípinmux_mcspi3_pins p¬®°²Üîpinmux_mcbsp3_pins p<>@BÜúpinmux_twl4030_pinsp°AÜæpinmux_dss_dpi_pinsàp¤¦¨ª¬®°²´¶¸º¼¾ÀÂÄÆÈÊÌÎÐÒÔÖØÚÜpinmux_lte430_pinsp8Üpinmux_backlight_pinsp:Üscm_conf@270sysconsimple-busˆp0+ ùp0Üpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapˆ°„pbias_mmc_omap2430‹pbias_mmc_omap2430šw@²-ÆÀÜïclocks+clock@68 ti,clkselˆhÊclock-mcbsp5-mux-fckÊti,composite-mux-clock×mcbsp5_mux_fckŒêÜ clock-mcbsp3-mux-fckÊti,composite-mux-clock×mcbsp3_mux_fckŒÜclock-mcbsp4-mux-fckÊti,composite-mux-clock×mcbsp4_mux_fckŒêÜmcbsp5_fckÊti,composite-clockŒ Üüclock@4 ti,clkselˆÊclock-mcbsp1-mux-fckÊti,composite-mux-clock×mcbsp1_mux_fckŒêÜ clock-mcbsp2-mux-fckÊti,composite-mux-clock×mcbsp2_mux_fckŒêÜmcbsp1_fckÊti,composite-clockŒ Üömcbsp2_fckÊti,composite-clockŒ Üømcbsp3_fckÊti,composite-clockŒÜùmcbsp4_fckÊti,composite-clockŒÜûclockdomainspinmux@a00 ti,omap3-padconfpinctrl-singleˆ \+ 5Sÿpinmux_twl4030_vpins pÜçtarget-module@480a6000ti,sysc-omap2ti,syscˆH `DH `HH `L÷revsyscsyss Œ“ick+ ùH `  )disabledaes1@0 ti,omap3-aesˆPä0  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×dpll3_m2_ckŒêOZÜclock-omap-96m-fckÊ ti,mux-clock ×omap_96m_fckŒ2!êÜXclock-omap-54m-fckÊ ti,mux-clock ×omap_54m_fckŒ34êÜ@clock-omap-48m-fckÊ ti,mux-clock ×omap_48m_fckŒ54êÜ8clock@e40 ti,clkselˆ@Êclock-dpll4-m3Êti,divider-clock ×dpll4_m3_ckŒêO ZÜ6clock-dpll4-m4Êti,divider-clock ×dpll4_m4_ckŒOZÜ9dpll4_m3x2_mul_ckÊfixed-factor-clockŒ6q|Ü7dpll4_m3x2_ck@d00Êti,gate-clockŒ7êˆ †Ü3cm_96m_d2_fckÊfixed-factor-clockŒ2q|Ü5omap_12m_fckÊfixed-factor-clockŒ8q|ÜYdpll4_m4x2_mul_ckÊti,fixed-factor-clockŒ9œª·Ü:dpll4_m4x2_ck@d00Êti,gate-clockŒ:êˆ †·Ü]dpll4_m5_ck@f40Êti,divider-clockŒO?ˆ@ZÜ;dpll4_m5x2_mul_ckÊti,fixed-factor-clockŒ;œª·Ü<dpll4_m5x2_ck@d00Êti,gate-clockŒ<êˆ †·Üydpll4_m6x2_mul_ckÊfixed-factor-clockŒ=q|Ü>dpll4_m6x2_ck@d00Êti,gate-clockŒ>êˆ †Ü?emu_per_alwon_ckÊfixed-factor-clockŒ?q|Ü'clock@d70 ti,clkselˆ pÊclock-clkout2-src-gateÊ ti,composite-no-wait-gate-clock×clkout2_src_gate_ckŒ.êÜBclock-clkout2-src-muxÊti,composite-mux-clock×clkout2_src_mux_ckŒ.!2@ÜCclock-sys-clkout2Êti,divider-clock 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×i2c3_fckŒêܹclock-i2c2-fckÊti,wait-gate-clock ×i2c2_fckŒêܺclock-i2c1-fckÊti,wait-gate-clock ×i2c1_fckŒêÜ»clock-mcbsp5-gate-fckÊti,composite-gate-clock×mcbsp5_gate_fckŒê Ü clock-mcbsp1-gate-fckÊti,composite-gate-clock×mcbsp1_gate_fckŒê Ü clock-mcspi4-fckÊti,wait-gate-clock ×mcspi4_fckŒRêܼclock-mcspi3-fckÊti,wait-gate-clock ×mcspi3_fckŒRêܽclock-mcspi2-fckÊti,wait-gate-clock ×mcspi2_fckŒRêܾclock-mcspi1-fckÊti,wait-gate-clock ×mcspi1_fckŒRêÜ¿clock-uart2-fckÊti,wait-gate-clock ×uart2_fckŒRêÜÀclock-uart1-fckÊti,wait-gate-clock ×uart1_fckŒRê ÜÁclock-hdq-fckÊti,wait-gate-clock×hdq_fckŒSêÜÂclock-modem-fckÊti,omap3-interface-clock ×modem_fckŒ!êÜÞclock-mspro-fckÊti,wait-gate-clock ×mspro_fckŒêclock-ssi-ssr-gate-fck-3430es2Ê ti,composite-no-wait-gate-clock×ssi_ssr_gate_fck_3430es2Œ"êÜ}clock-mmchs3-fckÊti,wait-gate-clock ×mmchs3_fckŒêÜÚgpt10_fckÊti,composite-clockŒTUgpt11_fckÊti,composite-clockŒVWcore_96m_fckÊfixed-factor-clockŒXq|Ücore_48m_fckÊfixed-factor-clockŒ8q|ÜRcore_12m_fckÊfixed-factor-clockŒYq|ÜScore_l3_ickÊfixed-factor-clockŒFq|ÜZclock@a10 ti,clkselˆ Êclock-sdrc-ickÊti,wait-gate-clock ×sdrc_ickŒZêÜ�clock-mmchs2-ickÊti,omap3-interface-clock ×mmchs2_ickŒ[êÜÃclock-mmchs1-ickÊti,omap3-interface-clock ×mmchs1_ickŒ[êÜÄclock-hdq-ickÊti,omap3-interface-clock×hdq_ickŒ[êÜÅclock-mcspi4-ickÊti,omap3-interface-clock ×mcspi4_ickŒ[êÜÆclock-mcspi3-ickÊti,omap3-interface-clock ×mcspi3_ickŒ[êÜÇclock-mcspi2-ickÊti,omap3-interface-clock ×mcspi2_ickŒ[êÜÈclock-mcspi1-ickÊti,omap3-interface-clock ×mcspi1_ickŒ[êÜÉclock-i2c3-ickÊti,omap3-interface-clock ×i2c3_ickŒ[êÜÊclock-i2c2-ickÊti,omap3-interface-clock ×i2c2_ickŒ[êÜËclock-i2c1-ickÊti,omap3-interface-clock ×i2c1_ickŒ[êÜÌclock-uart2-ickÊti,omap3-interface-clock ×uart2_ickŒ[êÜÍclock-uart1-ickÊti,omap3-interface-clock ×uart1_ickŒ[ê ÜÎclock-gpt11-ickÊti,omap3-interface-clock ×gpt11_ickŒ[ê ÜÏclock-gpt10-ickÊti,omap3-interface-clock ×gpt10_ickŒ[ê ÜÐclock-mcbsp5-ickÊti,omap3-interface-clock ×mcbsp5_ickŒ[ê ÜÑclock-mcbsp1-ickÊti,omap3-interface-clock ×mcbsp1_ickŒ[ê ÜÒclock-omapctrl-ickÊti,omap3-interface-clock ×omapctrl_ickŒ[êÜÓclock-aes2-ickÊti,omap3-interface-clock ×aes2_ickŒ[êÜclock-sha12-ickÊti,omap3-interface-clock ×sha12_ickŒ[êÜÔclock-icr-ickÊti,omap3-interface-clock×icr_ickŒ[êclock-des2-ickÊti,omap3-interface-clock ×des2_ickŒ[êclock-mspro-ickÊti,omap3-interface-clock ×mspro_ickŒ[êclock-mailboxes-ickÊti,omap3-interface-clock×mailboxes_ickŒ[êclock-sad2d-ickÊti,omap3-interface-clock ×sad2d_ickŒFêÜßclock-hsotgusb-ick-3430es2Ê"ti,omap3-hsotgusb-interface-clock×hsotgusb_ick_3430es2ŒZêÜŽclock-ssi-ick-3430es2Êti,omap3-ssi-interface-clock×ssi_ick_3430es2Œ\êÜclock-mmchs3-ickÊti,omap3-interface-clock ×mmchs3_ickŒ[êÜÙgpmc_fckÊfixed-factor-clockŒZq|core_l4_ickÊfixed-factor-clockŒHq|Ü[clock@e00 ti,clkselˆÊclock-dss-tv-fckÊti,gate-clock ×dss_tv_fckŒ@êܲclock-dss-96m-fckÊti,gate-clock ×dss_96m_fckŒXêܳclock-dss2-alwon-fckÊti,gate-clock×dss2_alwon_fckŒ!êÜ´clock-dss1-alwon-fck-3430es2Êti,dss-gate-clock×dss1_alwon_fck_3430es2Œ]ê·ܵdummy_ckÊ fixed-clock?clock@c00 ti,clkselˆ Êclock-gpt1-gate-fckÊti,composite-gate-clock×gpt1_gate_fckŒ!êÜ_clock-gpio1-dbckÊti,gate-clock ×gpio1_dbckŒ^êÜ©clock-wdt2-fckÊti,wait-gate-clock ×wdt2_fckŒ^êܪclock-sr1-fckÊti,wait-gate-clock×sr1_fckŒ!êÜ clock-sr2-fckÊti,wait-gate-clock×sr2_fckŒ!êÜclock-usim-gate-fckÊti,composite-gate-clock×usim_gate_fckŒXê Ü�gpt1_fckÊti,composite-clockŒ_`Üýwkup_32k_fckÊfixed-factor-clockŒGq|Ü^clock@c10 ti,clkselˆ Êclock-wdt2-ickÊti,omap3-interface-clock ×wdt2_ickŒaêÜ«clock-wdt1-ickÊti,omap3-interface-clock ×wdt1_ickŒaêܬclock-gpio1-ickÊti,omap3-interface-clock ×gpio1_ickŒaêÜ­clock-omap-32ksync-ickÊti,omap3-interface-clock×omap_32ksync_ickŒaêÜ®clock-gpt12-ickÊti,omap3-interface-clock ×gpt12_ickŒaêܯclock-gpt1-ickÊti,omap3-interface-clock ×gpt1_ickŒaêܰclock-usim-ickÊti,omap3-interface-clock ×usim_ickŒaê ܱper_96m_fckÊfixed-factor-clockŒ1q|Üper_48m_fckÊfixed-factor-clockŒ8q|Übclock@1000 ti,clkselˆÊclock-uart3-fckÊti,wait-gate-clock ×uart3_fckŒbê Ü�clock-gpt2-gate-fckÊti,composite-gate-clock×gpt2_gate_fckŒ!êÜdclock-gpt3-gate-fckÊti,composite-gate-clock×gpt3_gate_fckŒ!êÜfclock-gpt4-gate-fckÊti,composite-gate-clock×gpt4_gate_fckŒ!êÜhclock-gpt5-gate-fckÊti,composite-gate-clock×gpt5_gate_fckŒ!êÜjclock-gpt6-gate-fckÊti,composite-gate-clock×gpt6_gate_fckŒ!êÜlclock-gpt7-gate-fckÊti,composite-gate-clock×gpt7_gate_fckŒ!êÜnclock-gpt8-gate-fckÊti,composite-gate-clock×gpt8_gate_fckŒ!ê Üpclock-gpt9-gate-fckÊti,composite-gate-clock×gpt9_gate_fckŒ!ê Ürclock-gpio6-dbckÊti,gate-clock ×gpio6_dbckŒcêÜ�clock-gpio5-dbckÊti,gate-clock ×gpio5_dbckŒcêÜ‘clock-gpio4-dbckÊti,gate-clock ×gpio4_dbckŒcêÜ’clock-gpio3-dbckÊti,gate-clock ×gpio3_dbckŒcêÜ“clock-gpio2-dbckÊti,gate-clock ×gpio2_dbckŒcê Ü”clock-wdt3-fckÊti,wait-gate-clock ×wdt3_fckŒcê Ü•clock-mcbsp2-gate-fckÊti,composite-gate-clock×mcbsp2_gate_fckŒêÜ clock-mcbsp3-gate-fckÊti,composite-gate-clock×mcbsp3_gate_fckŒêÜclock-mcbsp4-gate-fckÊti,composite-gate-clock×mcbsp4_gate_fckŒêÜclock@1040 ti,clkselˆ@Êclock-gpt2-mux-fckÊti,composite-mux-clock ×gpt2_mux_fckŒG!Üeclock-gpt3-mux-fckÊti,composite-mux-clock ×gpt3_mux_fckŒG!êÜgclock-gpt4-mux-fckÊti,composite-mux-clock ×gpt4_mux_fckŒG!êÜiclock-gpt5-mux-fckÊti,composite-mux-clock ×gpt5_mux_fckŒG!êÜkclock-gpt6-mux-fckÊti,composite-mux-clock ×gpt6_mux_fckŒG!êÜmclock-gpt7-mux-fckÊti,composite-mux-clock ×gpt7_mux_fckŒG!êÜoclock-gpt8-mux-fckÊti,composite-mux-clock ×gpt8_mux_fckŒG!êÜqclock-gpt9-mux-fckÊti,composite-mux-clock ×gpt9_mux_fckŒG!êÜsgpt2_fckÊti,composite-clockŒdeÜþgpt3_fckÊti,composite-clockŒfggpt4_fckÊti,composite-clockŒhigpt5_fckÊti,composite-clockŒjkgpt6_fckÊti,composite-clockŒlmgpt7_fckÊti,composite-clockŒnogpt8_fckÊti,composite-clockŒpqgpt9_fckÊti,composite-clockŒrsper_32k_alwon_fckÊfixed-factor-clockŒGq|Ücper_l4_ickÊfixed-factor-clockŒHq|Ütclock@1010 ti,clkselˆÊclock-gpio6-ickÊti,omap3-interface-clock ×gpio6_ickŒtêÜ–clock-gpio5-ickÊti,omap3-interface-clock ×gpio5_ickŒtêÜ—clock-gpio4-ickÊti,omap3-interface-clock ×gpio4_ickŒtêܘclock-gpio3-ickÊti,omap3-interface-clock ×gpio3_ickŒtêÜ™clock-gpio2-ickÊti,omap3-interface-clock ×gpio2_ickŒtê Üšclock-wdt3-ickÊti,omap3-interface-clock ×wdt3_ickŒtê Ü›clock-uart3-ickÊti,omap3-interface-clock ×uart3_ickŒtê Üœclock-uart4-ickÊti,omap3-interface-clock ×uart4_ickŒtêÜ�clock-gpt9-ickÊti,omap3-interface-clock ×gpt9_ickŒtê Üžclock-gpt8-ickÊti,omap3-interface-clock ×gpt8_ickŒtê ÜŸclock-gpt7-ickÊti,omap3-interface-clock ×gpt7_ickŒtêÜ clock-gpt6-ickÊti,omap3-interface-clock ×gpt6_ickŒtêÜ¡clock-gpt5-ickÊti,omap3-interface-clock ×gpt5_ickŒtêÜ¢clock-gpt4-ickÊti,omap3-interface-clock ×gpt4_ickŒtêÜ£clock-gpt3-ickÊti,omap3-interface-clock ×gpt3_ickŒtêܤclock-gpt2-ickÊti,omap3-interface-clock ×gpt2_ickŒtêÜ¥clock-mcbsp2-ickÊti,omap3-interface-clock ×mcbsp2_ickŒtêܦclock-mcbsp3-ickÊti,omap3-interface-clock ×mcbsp3_ickŒtêܧclock-mcbsp4-ickÊti,omap3-interface-clock ×mcbsp4_ickŒtêܨemu_src_ckÊti,clkdm-gate-clockŒuÜ)secure_32k_fckÊ fixed-clock?€Üvgpt12_fckÊfixed-factor-clockŒvq|Üÿwdt1_fckÊfixed-factor-clockŒvq|security_l4_ick2Êfixed-factor-clockŒHq|Üwclock@a14 ti,clkselˆ Êclock-aes1-ickÊti,omap3-interface-clock ×aes1_ickŒwêÜclock-rng-ickÊti,omap3-interface-clock×rng_ickŒwêÜ÷clock-sha11-ickÊti,omap3-interface-clock ×sha11_ickŒwêclock-des1-ickÊti,omap3-interface-clock ×des1_ickŒwêclock-pka-ickÊti,omap3-interface-clock×pka_ickŒxêclock@f00 ti,clkselˆÊclock-cam-mclkÊti,gate-clock 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