Ð þíÂ8„( >L;isee,omap3-igep0030-rev-gti,omap3630ti,omap36xxti,omap3 +*7IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8‡cpu“—žcpuª“à¸Ì׿pmu@54000000arm,cortex-a8-pmu“T€îùdebugsssocti,omap-inframpu ti,omap3-mpuùmpuiva ti,iva2.2ùivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus“hî +ùl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus“ +  pinmux@30 ti,omap3-padconfpinctrl-single“08+ *?]ÿzdefaultˆpinmux_gpmc_pins’Žæpinmux_uart1_pins’RLæçpinmux_uart3_pins’npæêpinmux_mcbsp2_pins ’ æþpinmux_mmc1_pins0’æôpinmux_mmc2_pins0’(*,.02æøpinmux_i2c1_pins’ŠŒæëpinmux_i2c3_pins’’”æòpinmux_twl4030_pins’°Aæìpinmux_hsusb2_pins0’¤ ¦ ¨ ª ¬ ® æpinmux_uart2_pins ’<>@Bæèpinmux_lbep5clwmc_pins’46:æùpinmux_leds_pins’Žæscm_conf@270sysconsimple-bus“p0+ p0æpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap“°¦pbias_mmc_omap2430­pbias_mmc_omap2430¼w@Ô-ÆÀæóclocks+clock@68 ti,clksel“hìclock-mcbsp5-mux-fckìti,composite-mux-clockùmcbsp5_mux_fck— æ clock-mcbsp3-mux-fckìti,composite-mux-clockùmcbsp3_mux_fck— æclock-mcbsp4-mux-fckìti,composite-mux-clockùmcbsp4_mux_fck—  æmcbsp5_fckìti,composite-clock— æclock@4 ti,clksel“ìclock-mcbsp1-mux-fckìti,composite-mux-clockùmcbsp1_mux_fck— æ clock-mcbsp2-mux-fckìti,composite-mux-clockùmcbsp2_mux_fck—  æmcbsp1_fckìti,composite-clock— æûmcbsp2_fckìti,composite-clock—æýmcbsp3_fckìti,composite-clock—æÿmcbsp4_fckìti,composite-clock—æclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single“ \+ *?]ÿpinmux_twl4030_vpins ’æítarget-module@480a6000ti,sysc-omap2ti,sysc“H `DH `HH `Lrevsyscsyss# 0>—žick+ H ` aes1@0 ti,omap3-aes“PîK  Ptxrxtarget-module@480c5000ti,sysc-omap2ti,sysc“H PDH PHH PLrevsyscsyss# 0>—žick+ H P aes2@0 ti,omap3-aes“PîKABPtxrxprm@48306000 ti,omap3-prm“H0`@î clocks+virt_16_8m_ckì fixed-clockZYæosc_sys_ck@d40ì ti,mux-clock—“ @æsys_ck@1270ìti,divider-clock— j“puæ"sys_clkout1@d70ìti,gate-clock—“ p dpll3_x2_ckìfixed-factor-clock—Œ—dpll3_m2x2_ckìfixed-factor-clock—Œ—æ!dpll4_x2_ckìfixed-factor-clock— Œ—corex2_fckìfixed-factor-clock—!Œ—æ#wkup_l4_ickìfixed-factor-clock—"Œ—æbcorex2_d3_fckìfixed-factor-clock—#Œ—æŠcorex2_d5_fckìfixed-factor-clock—#Œ—æ‹clockdomainscm@48004000 ti,omap3-cm“H@@clocks+dummy_apb_pclkì fixed-clockZomap_32k_fckì fixed-clockZ€æHvirt_12m_ckì fixed-clockZ·ævirt_13m_ckì fixed-clockZÆ]@ævirt_19200000_ckì fixed-clockZ$øævirt_26000000_ckì fixed-clockZŒº€ævirt_38_4m_ckì fixed-clockZIðædpll4_ck@d00ìti,omap3-dpll-per-j-type-clock—""“ D 0æ dpll4_m2_ck@d48ìti,divider-clock— j?“ Huæ$dpll4_m2x2_mul_ckìfixed-factor-clock—$Œ—æ%dpll4_m2x2_ck@d00ìti,hsdiv-gate-clock—% “ ¡æ&omap_96m_alwon_fckìfixed-factor-clock—&Œ—æ2dpll3_ck@d00ìti,omap3-dpll-core-clock—""“ @ 0æclock@1140 ti,clksel“@ìclock-dpll3-m3ìti,divider-clock ùdpll3_m3_ck— juæ,clock-dpll4-m6ìti,divider-clock ùdpll4_m6_ck—  j?uæ>clock-emu-src-muxì ti,mux-clockùemu_src_mux_ck—"'()ævclock-pclk-fckìti,divider-clock ùpclk_fck—* juclock-pclkx2-fckìti,divider-clock ùpclkx2_fck—* juclock-atclk-fckìti,divider-clock ùatclk_fck—* juclock-traceclk-src-fckì ti,mux-clockùtraceclk_src_fck—"'() æ+clock-traceclk-fckìti,divider-clock ùtraceclk_fck—+ judpll3_m3x2_mul_ckìfixed-factor-clock—,Œ—æ-dpll3_m3x2_ck@d00ìti,hsdiv-gate-clock—- “ ¡æ.emu_core_alwon_ckìfixed-factor-clock—.Œ—æ'sys_altclkì fixed-clockZæ5mcbsp_clksì fixed-clockZæcore_ckìfixed-factor-clock—Œ—æ/dpll1_fck@940ìti,divider-clock—/ j“ @uæ0dpll1_ck@904ìti,omap3-dpll-clock—"0“  $ @ 4ædpll1_x2_ckìfixed-factor-clock—Œ—æ1dpll1_x2m2_ck@944ìti,divider-clock—1j“ DuæEcm_96m_fckìfixed-factor-clock—2Œ—æ3clock@d40 ti,clksel“ @ìclock-dpll3-m2ìti,divider-clock ùdpll3_m2_ck— juæclock-omap-96m-fckì ti,mux-clock ùomap_96m_fck—3" æYclock-omap-54m-fckì ti,mux-clock ùomap_54m_fck—45 æAclock-omap-48m-fckì ti,mux-clock ùomap_48m_fck—65 æ9clock@e40 ti,clksel“@ìclock-dpll4-m3ìti,divider-clock ùdpll4_m3_ck—  j uæ7clock-dpll4-m4ìti,divider-clock ùdpll4_m4_ck— juæ:dpll4_m3x2_mul_ckìfixed-factor-clock—7Œ—æ8dpll4_m3x2_ck@d00ìti,hsdiv-gate-clock—8 “ ¡æ4cm_96m_d2_fckìfixed-factor-clock—3Œ—æ6omap_12m_fckìfixed-factor-clock—9Œ—æZdpll4_m4x2_mul_ckìti,fixed-factor-clock—:·ÅÒæ;dpll4_m4x2_ck@d00ìti,gate-clock—; “ ¡Òæ^dpll4_m5_ck@f40ìti,divider-clock— j?“@uæ<dpll4_m5x2_mul_ckìti,fixed-factor-clock—<·ÅÒæ=dpll4_m5x2_ck@d00ìti,hsdiv-gate-clock—= “ ¡Òæzdpll4_m6x2_mul_ckìfixed-factor-clock—>Œ—æ?dpll4_m6x2_ck@d00ìti,hsdiv-gate-clock—? “ ¡æ@emu_per_alwon_ckìfixed-factor-clock—@Œ—æ(clock@d70 ti,clksel“ pìclock-clkout2-src-gateì ti,composite-no-wait-gate-clockùclkout2_src_gate_ck—/ æCclock-clkout2-src-muxìti,composite-mux-clockùclkout2_src_mux_ck—/"3AæDclock-sys-clkout2ìti,divider-clock ùsys_clkout2—B j@åclkout2_src_ckìti,composite-clock—CDæBmpu_ckìfixed-factor-clock—EŒ—æFarm_fck@924ìti,divider-clock—F“ $jemu_mpu_alwon_ckìfixed-factor-clock—FŒ—æ)clock@a40 ti,clksel“ @ìclock-l3-ickìti,divider-clockùl3_ick—/juæGclock-l4-ickìti,divider-clockùl4_ick—G juæIclock-gpt10-mux-fckìti,composite-mux-clockùgpt10_mux_fck—H" æVclock-gpt11-mux-fckìti,composite-mux-clockùgpt11_mux_fck—H" æXclock-ssi-ssr-div-fck-3430es2ìti,composite-divider-clockùssi_ssr_div_fck_3430es2—# $ûæclock@c40 ti,clksel“ @ìclock-rm-ickìti,divider-clockùrm_ick—I juclock-gpt1-mux-fckìti,composite-mux-clock ùgpt1_mux_fck—H"æaclock-usim-mux-fckìti,composite-mux-clock ùusim_mux_fck(—"JKLMNOPQR uæƒclock@a00 ti,clksel“ ìclock-gpt10-gate-fckìti,composite-gate-clockùgpt10_gate_fck—" æUclock-gpt11-gate-fckìti,composite-gate-clockùgpt11_gate_fck—" æWclock-mmchs2-fckìti,wait-gate-clock ùmmchs2_fck— æ¹clock-mmchs1-fckìti,wait-gate-clock ùmmchs1_fck— æºclock-i2c3-fckìti,wait-gate-clock ùi2c3_fck— æ»clock-i2c2-fckìti,wait-gate-clock ùi2c2_fck— æ¼clock-i2c1-fckìti,wait-gate-clock ùi2c1_fck— æ½clock-mcbsp5-gate-fckìti,composite-gate-clockùmcbsp5_gate_fck— æ clock-mcbsp1-gate-fckìti,composite-gate-clockùmcbsp1_gate_fck— æ clock-mcspi4-fckìti,wait-gate-clock ùmcspi4_fck—S æ¾clock-mcspi3-fckìti,wait-gate-clock ùmcspi3_fck—S æ¿clock-mcspi2-fckìti,wait-gate-clock ùmcspi2_fck—S æÀclock-mcspi1-fckìti,wait-gate-clock ùmcspi1_fck—S æÁclock-uart2-fckìti,wait-gate-clock ùuart2_fck—S æÂclock-uart1-fckìti,wait-gate-clock ùuart1_fck—S æÃclock-hdq-fckìti,wait-gate-clockùhdq_fck—T æÄclock-modem-fckìti,omap3-interface-clock ùmodem_fck—" æàclock-mspro-fckìti,wait-gate-clock ùmspro_fck— clock-ssi-ssr-gate-fck-3430es2ì ti,composite-no-wait-gate-clockùssi_ssr_gate_fck_3430es2—# æ~clock-mmchs3-fckìti,wait-gate-clock ùmmchs3_fck— æÜgpt10_fckìti,composite-clock—UVgpt11_fckìti,composite-clock—WXcore_96m_fckìfixed-factor-clock—YŒ—æcore_48m_fckìfixed-factor-clock—9Œ—æScore_12m_fckìfixed-factor-clock—ZŒ—æTcore_l3_ickìfixed-factor-clock—GŒ—æ[clock@a10 ti,clksel“ ìclock-sdrc-ickìti,wait-gate-clock ùsdrc_ick—[ æŽclock-mmchs2-ickìti,omap3-interface-clock ùmmchs2_ick—\ æÅclock-mmchs1-ickìti,omap3-interface-clock ùmmchs1_ick—\ æÆclock-hdq-ickìti,omap3-interface-clockùhdq_ick—\ æÇclock-mcspi4-ickìti,omap3-interface-clock ùmcspi4_ick—\ æÈclock-mcspi3-ickìti,omap3-interface-clock ùmcspi3_ick—\ æÉclock-mcspi2-ickìti,omap3-interface-clock ùmcspi2_ick—\ æÊclock-mcspi1-ickìti,omap3-interface-clock ùmcspi1_ick—\ æËclock-i2c3-ickìti,omap3-interface-clock ùi2c3_ick—\ æÌclock-i2c2-ickìti,omap3-interface-clock ùi2c2_ick—\ æÍclock-i2c1-ickìti,omap3-interface-clock ùi2c1_ick—\ æÎclock-uart2-ickìti,omap3-interface-clock ùuart2_ick—\ æÏclock-uart1-ickìti,omap3-interface-clock ùuart1_ick—\ æÐclock-gpt11-ickìti,omap3-interface-clock ùgpt11_ick—\ æÑclock-gpt10-ickìti,omap3-interface-clock ùgpt10_ick—\ æÒclock-mcbsp5-ickìti,omap3-interface-clock ùmcbsp5_ick—\ æÓclock-mcbsp1-ickìti,omap3-interface-clock ùmcbsp1_ick—\ æÔclock-omapctrl-ickìti,omap3-interface-clock ùomapctrl_ick—\ æÕclock-aes2-ickìti,omap3-interface-clock ùaes2_ick—\ æclock-sha12-ickìti,omap3-interface-clock ùsha12_ick—\ æÖclock-icr-ickìti,omap3-interface-clockùicr_ick—\ clock-des2-ickìti,omap3-interface-clock ùdes2_ick—\ clock-mspro-ickìti,omap3-interface-clock ùmspro_ick—\ clock-mailboxes-ickìti,omap3-interface-clockùmailboxes_ick—\ clock-sad2d-ickìti,omap3-interface-clock ùsad2d_ick—G æáclock-hsotgusb-ick-3430es2ì"ti,omap3-hsotgusb-interface-clockùhsotgusb_ick_3430es2—[ æ�clock-ssi-ick-3430es2ìti,omap3-ssi-interface-clockùssi_ick_3430es2—] æ clock-mmchs3-ickìti,omap3-interface-clock ùmmchs3_ick—\ æÛgpmc_fckìfixed-factor-clock—[Œ—core_l4_ickìfixed-factor-clock—IŒ—æ\clock@e00 ti,clksel“ìclock-dss-tv-fckìti,gate-clock ùdss_tv_fck—A æ´clock-dss-96m-fckìti,gate-clock ùdss_96m_fck—Y æµclock-dss2-alwon-fckìti,gate-clockùdss2_alwon_fck—" æ¶clock-dss1-alwon-fck-3430es2ìti,dss-gate-clockùdss1_alwon_fck_3430es2—^ Òæ·dummy_ckì fixed-clockZclock@c00 ti,clksel“ ìclock-gpt1-gate-fckìti,composite-gate-clockùgpt1_gate_fck—" æ`clock-gpio1-dbckìti,gate-clock ùgpio1_dbck—_ æ«clock-wdt2-fckìti,wait-gate-clock ùwdt2_fck—_ æ¬clock-sr1-fckìti,wait-gate-clockùsr1_fck—" æclock-sr2-fckìti,wait-gate-clockùsr2_fck—" æ clock-usim-gate-fckìti,composite-gate-clockùusim_gate_fck—Y æ‚gpt1_fckìti,composite-clock—`aæwkup_32k_fckìfixed-factor-clock—HŒ—æ_clock@c10 ti,clksel“ ìclock-wdt2-ickìti,omap3-interface-clock ùwdt2_ick—b æ­clock-wdt1-ickìti,omap3-interface-clock ùwdt1_ick—b æ®clock-gpio1-ickìti,omap3-interface-clock ùgpio1_ick—b æ¯clock-omap-32ksync-ickìti,omap3-interface-clockùomap_32ksync_ick—b æ°clock-gpt12-ickìti,omap3-interface-clock ùgpt12_ick—b æ±clock-gpt1-ickìti,omap3-interface-clock ùgpt1_ick—b æ²clock-usim-ickìti,omap3-interface-clock ùusim_ick—b æ³per_96m_fckìfixed-factor-clock—2Œ—æ per_48m_fckìfixed-factor-clock—9Œ—æcclock@1000 ti,clksel“ìclock-uart3-fckìti,wait-gate-clock ùuart3_fck—c æ�clock-gpt2-gate-fckìti,composite-gate-clockùgpt2_gate_fck—" æeclock-gpt3-gate-fckìti,composite-gate-clockùgpt3_gate_fck—" ægclock-gpt4-gate-fckìti,composite-gate-clockùgpt4_gate_fck—" æiclock-gpt5-gate-fckìti,composite-gate-clockùgpt5_gate_fck—" ækclock-gpt6-gate-fckìti,composite-gate-clockùgpt6_gate_fck—" æmclock-gpt7-gate-fckìti,composite-gate-clockùgpt7_gate_fck—" æoclock-gpt8-gate-fckìti,composite-gate-clockùgpt8_gate_fck—" æqclock-gpt9-gate-fckìti,composite-gate-clockùgpt9_gate_fck—" æsclock-gpio6-dbckìti,gate-clock ùgpio6_dbck—d æ‘clock-gpio5-dbckìti,gate-clock ùgpio5_dbck—d æ’clock-gpio4-dbckìti,gate-clock ùgpio4_dbck—d æ“clock-gpio3-dbckìti,gate-clock ùgpio3_dbck—d æ”clock-gpio2-dbckìti,gate-clock ùgpio2_dbck—d æ•clock-wdt3-fckìti,wait-gate-clock ùwdt3_fck—d æ–clock-mcbsp2-gate-fckìti,composite-gate-clockùmcbsp2_gate_fck— æclock-mcbsp3-gate-fckìti,composite-gate-clockùmcbsp3_gate_fck— æclock-mcbsp4-gate-fckìti,composite-gate-clockùmcbsp4_gate_fck— æclock-uart4-fckìti,wait-gate-clock ùuart4_fck—c æªclock@1040 ti,clksel“@ìclock-gpt2-mux-fckìti,composite-mux-clock ùgpt2_mux_fck—H"æfclock-gpt3-mux-fckìti,composite-mux-clock ùgpt3_mux_fck—H" æhclock-gpt4-mux-fckìti,composite-mux-clock ùgpt4_mux_fck—H" æjclock-gpt5-mux-fckìti,composite-mux-clock ùgpt5_mux_fck—H" ælclock-gpt6-mux-fckìti,composite-mux-clock ùgpt6_mux_fck—H" ænclock-gpt7-mux-fckìti,composite-mux-clock ùgpt7_mux_fck—H" æpclock-gpt8-mux-fckìti,composite-mux-clock ùgpt8_mux_fck—H" ærclock-gpt9-mux-fckìti,composite-mux-clock ùgpt9_mux_fck—H" ætgpt2_fckìti,composite-clock—efægpt3_fckìti,composite-clock—ghgpt4_fckìti,composite-clock—ijgpt5_fckìti,composite-clock—klgpt6_fckìti,composite-clock—mngpt7_fckìti,composite-clock—opgpt8_fckìti,composite-clock—qrgpt9_fckìti,composite-clock—stper_32k_alwon_fckìfixed-factor-clock—HŒ—ædper_l4_ickìfixed-factor-clock—IŒ—æuclock@1010 ti,clksel“ìclock-gpio6-ickìti,omap3-interface-clock ùgpio6_ick—u æ—clock-gpio5-ickìti,omap3-interface-clock ùgpio5_ick—u æ˜clock-gpio4-ickìti,omap3-interface-clock ùgpio4_ick—u æ™clock-gpio3-ickìti,omap3-interface-clock ùgpio3_ick—u æšclock-gpio2-ickìti,omap3-interface-clock ùgpio2_ick—u æ›clock-wdt3-ickìti,omap3-interface-clock ùwdt3_ick—u æœclock-uart3-ickìti,omap3-interface-clock ùuart3_ick—u æ�clock-uart4-ickìti,omap3-interface-clock ùuart4_ick—u æžclock-gpt9-ickìti,omap3-interface-clock ùgpt9_ick—u æŸclock-gpt8-ickìti,omap3-interface-clock ùgpt8_ick—u æ clock-gpt7-ickìti,omap3-interface-clock ùgpt7_ick—u æ¡clock-gpt6-ickìti,omap3-interface-clock ùgpt6_ick—u æ¢clock-gpt5-ickìti,omap3-interface-clock ùgpt5_ick—u æ£clock-gpt4-ickìti,omap3-interface-clock ùgpt4_ick—u æ¤clock-gpt3-ickìti,omap3-interface-clock ùgpt3_ick—u æ¥clock-gpt2-ickìti,omap3-interface-clock ùgpt2_ick—u æ¦clock-mcbsp2-ickìti,omap3-interface-clock ùmcbsp2_ick—u æ§clock-mcbsp3-ickìti,omap3-interface-clock ùmcbsp3_ick—u æ¨clock-mcbsp4-ickìti,omap3-interface-clock ùmcbsp4_ick—u æ©emu_src_ckìti,clkdm-gate-clock—væ*secure_32k_fckì fixed-clockZ€æwgpt12_fckìfixed-factor-clock—wŒ—æwdt1_fckìfixed-factor-clock—wŒ—security_l4_ick2ìfixed-factor-clock—IŒ—æxclock@a14 ti,clksel“ ìclock-aes1-ickìti,omap3-interface-clock ùaes1_ick—x æclock-rng-ickìti,omap3-interface-clockùrng_ick—x æüclock-sha11-ickìti,omap3-interface-clock ùsha11_ick—x clock-des1-ickìti,omap3-interface-clock ùdes1_ick—x clock-pka-ickìti,omap3-interface-clockùpka_ick—y clock@f00 ti,clksel“ìclock-cam-mclkìti,gate-clock ùcam_mclk—z Òclock-csi2-96m-fckìti,gate-clock ùcsi2_96m_fck— æÞcam_ick@f10ì!ti,omap3-no-wait-interface-clock—I“ æÝsecurity_l3_ickìfixed-factor-clock—GŒ—æyssi_l4_ickìfixed-factor-clock—IŒ—æ]sr_l4_ickìfixed-factor-clock—IŒ—dpll2_fck@40ìti,divider-clock—/ j“@uæ{dpll2_ck@4ìti,omap3-dpll-clock—"{“$@4!æ|dpll2_m2_ck@44ìti,divider-clock—|j“Duæ}iva2_ck@0ìti,wait-gate-clock—}“ æßclock@a18 ti,clksel“ ìclock-mad2d-ickìti,omap3-interface-clock ùmad2d_ick—G æâclock-usbtll-ickìti,omap3-interface-clock ùusbtll_ick—\ æÚssi_ssr_fck_3430es2ìti,composite-clock—~æ€ssi_sst_fck_3430es2ìfixed-factor-clock—€Œ—æ sys_d2_ckìfixed-factor-clock—"Œ—æJomap_96m_d2_fckìfixed-factor-clock—YŒ—æKomap_96m_d4_fckìfixed-factor-clock—YŒ—æLomap_96m_d8_fckìfixed-factor-clock—YŒ—æMomap_96m_d10_fckìfixed-factor-clock—YŒ— æNdpll5_m2_d4_ckìfixed-factor-clock—�Œ—æOdpll5_m2_d8_ckìfixed-factor-clock—�Œ—æPdpll5_m2_d16_ckìfixed-factor-clock—�Œ—æQdpll5_m2_d20_ckìfixed-factor-clock—�Œ—æRusim_fckìti,composite-clock—‚ƒdpll5_ck@d04ìti,omap3-dpll-clock—""“  $ L 4æ„dpll5_m2_ck@d50ìti,divider-clock—„j“ Puæ�sgx_gate_fck@b00ìti,composite-gate-clock—/ “ æŒcore_d3_ckìfixed-factor-clock—/Œ—æ…core_d4_ckìfixed-factor-clock—/Œ—æ†core_d6_ckìfixed-factor-clock—/Œ—æ‡omap_192m_alwon_fckìfixed-factor-clock—&Œ—æˆcore_d2_ckìfixed-factor-clock—/Œ—æ‰sgx_mux_fck@b40ìti,composite-mux-clock —…†‡3ˆ‰Š‹“ @æ�sgx_fckìti,composite-clock—Œ�æsgx_ick@b10ìti,wait-gate-clock—G“  æãcpefuse_fck@a08ìti,gate-clock—"“  æ×ts_fck@a08ìti,gate-clock—H“  æØusbtll_fck@a08ìti,wait-gate-clock—�“  æÙdss_ick_3430es2@e10ìti,omap3-dss-interface-clock—I“ æ¸usbhost_120m_fck@1400ìti,gate-clock—�“ æäusbhost_48m_fck@1400ìti,dss-gate-clock—9“ æåusbhost_ick@1410ìti,omap3-dss-interface-clock—I“ ææclockdomainscore_l3_clkdmti,clockdomain—Ž�dpll3_clkdmti,clockdomain—dpll1_clkdmti,clockdomain—per_clkdmti,clockdomainl—�‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§¨©ªemu_clkdmti,clockdomain—*dpll4_clkdmti,clockdomain— wkup_clkdmti,clockdomain$—«¬­®¯°±²³dss_clkdmti,clockdomain—´µ¶·¸core_l4_clkdmti,clockdomain”—¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚÛÜcam_clkdmti,clockdomain—ÝÞiva2_clkdmti,clockdomain—ßdpll2_clkdmti,clockdomain—|d2d_clkdmti,clockdomain —àáâdpll5_clkdmti,clockdomain—„sgx_clkdmti,clockdomain—ãusbhost_clkdmti,clockdomain —äåætarget-module@48320000ti,sysc-omap2ti,sysc“H2H2 revsysc0—_°žfckick+ H2counter@0ti,omap-counter32k“ interrupt-controller@48200000ti,omap3-intc*“H ætarget-module@48056000ti,sysc-omap2ti,sysc“H`H`,H`(revsyscsyss## 5 0>—[žick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma“î CN [`ægpio@48310000ti,omap3-gpio“H1îùgpio1hzŠ*ægpio@49050000ti,omap3-gpio“Iîùgpio2zŠ*ægpio@49052000ti,omap3-gpio“I îùgpio3zŠ*gpio@49054000ti,omap3-gpio“I@î ùgpio4zŠ*gpio@49056000ti,omap3-gpio“I`î!ùgpio5zŠ*æégpio@49058000ti,omap3-gpio“I€î"ùgpio6zŠ*æserial@4806a000ti,omap3-uart“H  –HK12Ptxrxùuart1ZÜlzdefaultˆçserial@4806c000ti,omap3-uart“HÀ–IK34Ptxrxùuart2ZÜlzdefaultˆèbluetooth ti,wl1835-st ªé ·“àserial@49020000ti,omap3-uart“I–JK56Ptxrxùuart3ZÜlzdefaultˆêi2c@48070000 ti,omap3-i2c“H€î8+ùi2c1zdefaultˆëZ'¬@twl@48“Hî  ti,twl4030*zdefaultˆìíaudioti,twl4030-audiocodecrtcti,twl4030-rtcî bciti,twl4030-bciî ÁîÏï Ûvacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1¼ 'ÀÔ regulator-vdacti,twl4030-vdac¼w@Ôw@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1¼:�Ô0°æõregulator-vmmc2ti,twl4030-vmmc2¼:�Ô0°regulator-vusb1v5ti,twl4030-vusb1v5æðregulator-vusb1v8ti,twl4030-vusb1v8æñregulator-vusb3v1ti,twl4030-vusb3v1æîregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2¼w@Ôw@regulator-vsimti,twl4030-vsim¼w@Ô-ÆÀæögpioti,twl4030-gpiozŠ*ìæ÷twl4030-usbti,twl4030-usbî øðñî"+æpwmti,twl4030-pwm6pwmledti,twl4030-pwmled6pwrbuttonti,twl4030-pwrbuttonîkeypadti,twl4030-keypadîAQmadcti,twl4030-madcîdæïi2c@48072000 ti,omap3-i2c“H €î9+ùi2c2 vdisabledi2c@48060000 ti,omap3-i2c“H€î=+ùi2c3zdefaultˆòmailbox@48094000ti,omap3-mailboxùmailbox“H @î}‰›mbox-dsp ­ ¸spi@48098000ti,omap2-mcspi“H €îA+ùmcspi1Ã@K#$%&'()* Ptx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspi“H  îB+ùmcspi2à K+,-.Ptx0rx0tx1rx1spi@480b8000ti,omap2-mcspi“H €î[+ùmcspi3à KPtx0rx0tx1rx1spi@480ba000ti,omap2-mcspi“H  î0+ùmcspi4ÃKFGPtx0rx01w@480b2000 ti,omap3-1w“H î:ùhdq1wmmc@4809c000ti,omap3-hsmmc“H ÀîSùmmc1ÑK=>PtxrxÞózdefaultˆôëõ÷ö ÷mmc@480b4000ti,omap3-hsmmc“H @îVùmmc2K/0Ptxrxzdefaultˆøùëú+wlcore@2 ti,wl1835“ éîmmc@480ad000ti,omap3-hsmmc“H Ðî^ùmmc3KMNPtxrx vdisabledmmu@480bd400(ti,omap2-iommu“H Ô€îùmmu_isp5æ mmu@5d000000(ti,omap2-iommu“]€îùmmu_iva vdisabledwdt@48314000 ti,omap3-wdt“H1@€ ùwd_timer2mcbsp@48074000ti,omap3-mcbsp“H@ÿmpu î;< EcommontxrxU€ùmcbsp1K Ptxrx—ûžfck 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timer@0ti,omap3430-timer“î&timer@49034000ti,omap3430-timer“I@î'ùtimer3timer@49036000ti,omap3430-timer“I`î(ùtimer4timer@49038000ti,omap3430-timer“I€î)ùtimer5Êtimer@4903a000ti,omap3430-timer“I î*ùtimer6Êtimer@4903c000ti,omap3430-timer“IÀî+ùtimer7Êtimer@4903e000ti,omap3430-timer“Iàî,ùtimer8×Êtimer@49040000ti,omap3430-timer“Iî-ùtimer9×timer@48086000ti,omap3430-timer“H`î.ùtimer10×timer@48088000ti,omap3430-timer“H€î/ùtimer11×target-module@48304000ti,sysc-omap2-timerti,sysc“H0@H0@H0@revsyscsyss#' 0>—±žfckick+ H0@timer@0ti,omap3430-timer“î_”äusbhstll@48062000 ti,usbhs-tll“H îN ùusb_tll_hsusbhshost@48064000ti,usbhs-host“H@ ùusb_host_hs+ ôehci-phyohci@48064400ti,ohci-omap3“HDîLÿehci@48064800 ti,ehci-omap“HHîMgpmc@6e000000ti,omap3430-gpmcùgpmc“nÐîKPrxtx(+*zŠzdefaultˆ0ænand@0,0ti,omap2-nand “ î:micron,mt29c4g96mazIXjbch8z‹™,«,½Ì"ß,ò(6@R0RA(S+vokayonenand@0,0ti,omap2-onenand “kzŠœ¬¼XÍ‹™`«`½Ì ß ß`íò`r0rZû ,F^SAZz.à+ vdisabledusb_otg_hs@480ab000ti,omap3-musb“H °î\]Emcdma ùusb_otg_hsu€ˆ ‘  ¨usb2-phy&²2dss@48050000 ti,omap3-dss“H vdisabled ùdss_core—·žfck+dispc@48050400ti,omap3-dispc“Hî ùdss_dispc—·žfckencoder@4804fc00 ti,omap3-dsi“HüHþ@Hÿ protophypllî vdisabled ùdss_dsi1—·¶ žfcksys_clk+encoder@48050800ti,omap3-rfbi“H vdisabled ùdss_rfbi—·¸žfckickencoder@48050c00ti,omap3-venc“H  vdisabled ùdss_venc—´µžfcktv_dac_clkssi-controller@48058000 ti,omap3-ssiùssivokay“H€H�sysgddîGEgdd_mpu+ —€   žssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-port“H H¨txrxîCDssi-port@4805b000ti,omap3-ssi-port“H°H¸txrxîEFserial@49042000ti,omap3-uart“I îPKQRPtxrxùuart4ZÜlregulator-abb-mpu ti,abb-v1 ­abb_mpu_iva+“H0rðH0hbase-addressint-address¸—"Ñâ`òsO€7Èûæpinmux@480025a0 ti,omap3-padconfpinctrl-single“H% \+ *?]ÿzdefaultˆ pinmux_hsusb2_core2_pins0’PRT V X Z æ pinmux_leds_core2_pins’@æisp@480bc000 ti,omap3-isp“H ÀüH Øîþ ¦ð ìports+bandgap@48002524“H%$ti,omap36xx-bandgap ætarget-module@480cb000ti,sysc-omap3630-srti,syscùsmartreflex_core“H °8sysc# 0— žfck+ H °smartreflex@0ti,omap3-smartreflex-core“îtarget-module@480c9000ti,sysc-omap3630-srti,syscùsmartreflex_mpu_iva“H �8sysc# 0—žfck+ H �smartreflex@480c9000ti,omap3-smartreflex-mpu-iva“îtarget-module@50000000ti,sysc-omap4ti,sysc“PþPþ revsysc 5 0—ãžfckick+ Popp-tableoperating-points-v2-ti-cpu¦æopp50-300000000 'ᣠ.ssssss <ÿÿÿÿ Mopp100-600000000 '#ÃF .O€O€O€O€O€O€ <ÿÿÿÿopp130-800000000 '/¯ .7È7È7È7È7È7È <ÿÿÿÿopp1g-1000000000 ';šÊ .ûûûûûû <ÿÿÿÿopp_supplyti,omap-opp-supply Yûthermal-zonescpu-thermal tú Šè ˜N  ¥tripscpu_alert µ8€ ÁÐŽpassiveæcpu_crit µ_� ÁÐ Žcriticalcooling-mapsmap0 Ì Ñÿÿÿÿÿÿÿÿmemory@80000000‡memory“€ soundti,omap-twl4030 àigep2 éregulator-vdd33regulator-fixed­vdd33 ògpio_leds gpio-ledszdefaultˆuser0 omap3:red:user0 ±÷ offuser1 omap3:green:user1 ±÷ offuser2 omap3:red:user1 ± offboot omap3:green:boot ± onhsusb2_phyusb-nop-xceiv +æregulator-lbep5clwmc-wlenregulator-fixed­regulator-lbep5clwmc-wlen¼2Z Ô2Z  &é  +æú compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellsphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypassti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedenable-gpiosmax-speedbci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthcd-gpiosnon-removable#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,sync-readgpmc,sync-writegpmc,burst-lengthgpmc,burst-wrapgpmc,burst-readgpmc,burst-writegpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-deviceti,modelti,mcbspregulator-always-onlabeldefault-statereset-gpiosgpioenable-active-high