Ð þíw8 t(  <5isee,omap3-igep0020ti,omap3630ti,omap36xxti,omap3 +!7IGEPv2 Rev. C (TI OMAP AM/DM37x)chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8‡cpu“—žcpuª“à¸Ì׿pmu@54000000arm,cortex-a8-pmu“T€îùdebugsssocti,omap-inframpu ti,omap3-mpuùmpuiva ti,iva2.2ùivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus“hî +ùl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus“ +  pinmux@30 ti,omap3-padconfpinctrl-single“08+ *?]ÿzdefaultˆpinmux_gpmc_pins’Žæ pinmux_uart1_pins’RLæèpinmux_uart3_pins’npæêpinmux_mcbsp2_pins ’ æpinmux_mmc1_pins0’æôpinmux_mmc2_pins0’(*,.02æúpinmux_i2c1_pins’ŠŒæëpinmux_i2c3_pins’’”æòpinmux_twl4030_pins’°Aæìpinmux_tfp410_pins’–æpinmux_dss_dpi_pinsà’¤¦¨ª¬®°²´¶¸º¼¾ÀÂÄÆÈÊÌÎÐÒÔÖØÚæpinmux_uart2_pins ’DFHJæépinmux_smsc9221_pins’¢æ pinmux_lbee1usjyc_pins’68:æûscm_conf@270sysconsimple-bus“p0+ p0æpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap“°¦pbias_mmc_omap2430­pbias_mmc_omap2430¼w@Ô-ÆÀæóclocks+clock@68 ti,clksel“hìclock-mcbsp5-mux-fckìti,composite-mux-clockùmcbsp5_mux_fck—  æ clock-mcbsp3-mux-fckìti,composite-mux-clockùmcbsp3_mux_fck— æclock-mcbsp4-mux-fckìti,composite-mux-clockùmcbsp4_mux_fck—  æmcbsp5_fckìti,composite-clock— æclock@4 ti,clksel“ìclock-mcbsp1-mux-fckìti,composite-mux-clockùmcbsp1_mux_fck—  æclock-mcbsp2-mux-fckìti,composite-mux-clockùmcbsp2_mux_fck—  æmcbsp1_fckìti,composite-clock— æþmcbsp2_fckìti,composite-clock—æmcbsp3_fckìti,composite-clock—æmcbsp4_fckìti,composite-clock—æclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single“ \+ *?]ÿpinmux_twl4030_vpins ’æítarget-module@480a6000ti,sysc-omap2ti,sysc“H `DH `HH `Lrevsyscsyss# 0>—žick+ H ` aes1@0 ti,omap3-aes“PîK  Ptxrxtarget-module@480c5000ti,sysc-omap2ti,sysc“H PDH PHH PLrevsyscsyss# 0>—žick+ H P aes2@0 ti,omap3-aes“PîKABPtxrxprm@48306000 ti,omap3-prm“H0`@î clocks+virt_16_8m_ckì fixed-clockZYæosc_sys_ck@d40ì ti,mux-clock—“ @æsys_ck@1270ìti,divider-clock— j“puæ#sys_clkout1@d70ìti,gate-clock—“ p dpll3_x2_ckìfixed-factor-clock—Œ—dpll3_m2x2_ckìfixed-factor-clock— Œ—æ"dpll4_x2_ckìfixed-factor-clock—!Œ—corex2_fckìfixed-factor-clock—"Œ—æ$wkup_l4_ickìfixed-factor-clock—#Œ—æccorex2_d3_fckìfixed-factor-clock—$Œ—æ‹corex2_d5_fckìfixed-factor-clock—$Œ—æŒclockdomainscm@48004000 ti,omap3-cm“H@@clocks+dummy_apb_pclkì fixed-clockZomap_32k_fckì fixed-clockZ€æIvirt_12m_ckì fixed-clockZ·ævirt_13m_ckì fixed-clockZÆ]@ævirt_19200000_ckì fixed-clockZ$øævirt_26000000_ckì fixed-clockZŒº€ævirt_38_4m_ckì fixed-clockZIðædpll4_ck@d00ìti,omap3-dpll-per-j-type-clock—##“ D 0æ!dpll4_m2_ck@d48ìti,divider-clock—!j?“ Huæ%dpll4_m2x2_mul_ckìfixed-factor-clock—%Œ—æ&dpll4_m2x2_ck@d00ìti,hsdiv-gate-clock—& “ ¡æ'omap_96m_alwon_fckìfixed-factor-clock—'Œ—æ3dpll3_ck@d00ìti,omap3-dpll-core-clock—##“ @ 0æclock@1140 ti,clksel“@ìclock-dpll3-m3ìti,divider-clock ùdpll3_m3_ck— juæ-clock-dpll4-m6ìti,divider-clock ùdpll4_m6_ck—! j?uæ?clock-emu-src-muxì ti,mux-clockùemu_src_mux_ck—#()*æwclock-pclk-fckìti,divider-clock ùpclk_fck—+ juclock-pclkx2-fckìti,divider-clock ùpclkx2_fck—+ juclock-atclk-fckìti,divider-clock ùatclk_fck—+ juclock-traceclk-src-fckì ti,mux-clockùtraceclk_src_fck—#()* æ,clock-traceclk-fckìti,divider-clock ùtraceclk_fck—, judpll3_m3x2_mul_ckìfixed-factor-clock—-Œ—æ.dpll3_m3x2_ck@d00ìti,hsdiv-gate-clock—. “ ¡æ/emu_core_alwon_ckìfixed-factor-clock—/Œ—æ(sys_altclkì fixed-clockZæ6mcbsp_clksì fixed-clockZæ core_ckìfixed-factor-clock— Œ—æ0dpll1_fck@940ìti,divider-clock—0 j“ @uæ1dpll1_ck@904ìti,omap3-dpll-clock—#1“  $ @ 4ædpll1_x2_ckìfixed-factor-clock—Œ—æ2dpll1_x2m2_ck@944ìti,divider-clock—2j“ DuæFcm_96m_fckìfixed-factor-clock—3Œ—æ4clock@d40 ti,clksel“ @ìclock-dpll3-m2ìti,divider-clock ùdpll3_m2_ck— juæ clock-omap-96m-fckì ti,mux-clock ùomap_96m_fck—4# æZclock-omap-54m-fckì ti,mux-clock ùomap_54m_fck—56 æBclock-omap-48m-fckì ti,mux-clock ùomap_48m_fck—76 æ:clock@e40 ti,clksel“@ìclock-dpll4-m3ìti,divider-clock ùdpll4_m3_ck—! j uæ8clock-dpll4-m4ìti,divider-clock ùdpll4_m4_ck—!juæ;dpll4_m3x2_mul_ckìfixed-factor-clock—8Œ—æ9dpll4_m3x2_ck@d00ìti,hsdiv-gate-clock—9 “ ¡æ5cm_96m_d2_fckìfixed-factor-clock—4Œ—æ7omap_12m_fckìfixed-factor-clock—:Œ—æ[dpll4_m4x2_mul_ckìti,fixed-factor-clock—;·ÅÒæ<dpll4_m4x2_ck@d00ìti,gate-clock—< “ ¡Òæ_dpll4_m5_ck@f40ìti,divider-clock—!j?“@uæ=dpll4_m5x2_mul_ckìti,fixed-factor-clock—=·ÅÒæ>dpll4_m5x2_ck@d00ìti,hsdiv-gate-clock—> “ ¡Òæ{dpll4_m6x2_mul_ckìfixed-factor-clock—?Œ—æ@dpll4_m6x2_ck@d00ìti,hsdiv-gate-clock—@ “ ¡æAemu_per_alwon_ckìfixed-factor-clock—AŒ—æ)clock@d70 ti,clksel“ pìclock-clkout2-src-gateì ti,composite-no-wait-gate-clockùclkout2_src_gate_ck—0 æDclock-clkout2-src-muxìti,composite-mux-clockùclkout2_src_mux_ck—0#4BæEclock-sys-clkout2ìti,divider-clock ùsys_clkout2—C j@åclkout2_src_ckìti,composite-clock—DEæCmpu_ckìfixed-factor-clock—FŒ—æGarm_fck@924ìti,divider-clock—G“ $jemu_mpu_alwon_ckìfixed-factor-clock—GŒ—æ*clock@a40 ti,clksel“ @ìclock-l3-ickìti,divider-clockùl3_ick—0juæHclock-l4-ickìti,divider-clockùl4_ick—H juæJclock-gpt10-mux-fckìti,composite-mux-clockùgpt10_mux_fck—I# æWclock-gpt11-mux-fckìti,composite-mux-clockùgpt11_mux_fck—I# æYclock-ssi-ssr-div-fck-3430es2ìti,composite-divider-clockùssi_ssr_div_fck_3430es2—$ $ûæ€clock@c40 ti,clksel“ @ìclock-rm-ickìti,divider-clockùrm_ick—J juclock-gpt1-mux-fckìti,composite-mux-clock ùgpt1_mux_fck—I#æbclock-usim-mux-fckìti,composite-mux-clock ùusim_mux_fck(—#KLMNOPQRS uæ„clock@a00 ti,clksel“ ìclock-gpt10-gate-fckìti,composite-gate-clockùgpt10_gate_fck—# æVclock-gpt11-gate-fckìti,composite-gate-clockùgpt11_gate_fck—# æXclock-mmchs2-fckìti,wait-gate-clock ùmmchs2_fck— æºclock-mmchs1-fckìti,wait-gate-clock ùmmchs1_fck— æ»clock-i2c3-fckìti,wait-gate-clock ùi2c3_fck— æ¼clock-i2c2-fckìti,wait-gate-clock ùi2c2_fck— æ½clock-i2c1-fckìti,wait-gate-clock ùi2c1_fck— æ¾clock-mcbsp5-gate-fckìti,composite-gate-clockùmcbsp5_gate_fck—  æ clock-mcbsp1-gate-fckìti,composite-gate-clockùmcbsp1_gate_fck—  æ clock-mcspi4-fckìti,wait-gate-clock ùmcspi4_fck—T æ¿clock-mcspi3-fckìti,wait-gate-clock ùmcspi3_fck—T æÀclock-mcspi2-fckìti,wait-gate-clock ùmcspi2_fck—T æÁclock-mcspi1-fckìti,wait-gate-clock ùmcspi1_fck—T æÂclock-uart2-fckìti,wait-gate-clock ùuart2_fck—T æÃclock-uart1-fckìti,wait-gate-clock ùuart1_fck—T æÄclock-hdq-fckìti,wait-gate-clockùhdq_fck—U æÅclock-modem-fckìti,omap3-interface-clock ùmodem_fck—# æáclock-mspro-fckìti,wait-gate-clock ùmspro_fck— clock-ssi-ssr-gate-fck-3430es2ì ti,composite-no-wait-gate-clockùssi_ssr_gate_fck_3430es2—$ æclock-mmchs3-fckìti,wait-gate-clock ùmmchs3_fck— æÝgpt10_fckìti,composite-clock—VWgpt11_fckìti,composite-clock—XYcore_96m_fckìfixed-factor-clock—ZŒ—æcore_48m_fckìfixed-factor-clock—:Œ—æTcore_12m_fckìfixed-factor-clock—[Œ—æUcore_l3_ickìfixed-factor-clock—HŒ—æ\clock@a10 ti,clksel“ ìclock-sdrc-ickìti,wait-gate-clock ùsdrc_ick—\ æ�clock-mmchs2-ickìti,omap3-interface-clock ùmmchs2_ick—] æÆclock-mmchs1-ickìti,omap3-interface-clock ùmmchs1_ick—] æÇclock-hdq-ickìti,omap3-interface-clockùhdq_ick—] æÈclock-mcspi4-ickìti,omap3-interface-clock ùmcspi4_ick—] æÉclock-mcspi3-ickìti,omap3-interface-clock ùmcspi3_ick—] æÊclock-mcspi2-ickìti,omap3-interface-clock ùmcspi2_ick—] æËclock-mcspi1-ickìti,omap3-interface-clock ùmcspi1_ick—] æÌclock-i2c3-ickìti,omap3-interface-clock ùi2c3_ick—] æÍclock-i2c2-ickìti,omap3-interface-clock ùi2c2_ick—] æÎclock-i2c1-ickìti,omap3-interface-clock ùi2c1_ick—] æÏclock-uart2-ickìti,omap3-interface-clock ùuart2_ick—] æÐclock-uart1-ickìti,omap3-interface-clock ùuart1_ick—] æÑclock-gpt11-ickìti,omap3-interface-clock ùgpt11_ick—] æÒclock-gpt10-ickìti,omap3-interface-clock ùgpt10_ick—] æÓclock-mcbsp5-ickìti,omap3-interface-clock ùmcbsp5_ick—] æÔclock-mcbsp1-ickìti,omap3-interface-clock ùmcbsp1_ick—] æÕclock-omapctrl-ickìti,omap3-interface-clock ùomapctrl_ick—] æÖclock-aes2-ickìti,omap3-interface-clock ùaes2_ick—] æclock-sha12-ickìti,omap3-interface-clock ùsha12_ick—] æ×clock-icr-ickìti,omap3-interface-clockùicr_ick—] clock-des2-ickìti,omap3-interface-clock ùdes2_ick—] clock-mspro-ickìti,omap3-interface-clock ùmspro_ick—] clock-mailboxes-ickìti,omap3-interface-clockùmailboxes_ick—] clock-sad2d-ickìti,omap3-interface-clock ùsad2d_ick—H æâclock-hsotgusb-ick-3430es2ì"ti,omap3-hsotgusb-interface-clockùhsotgusb_ick_3430es2—\ æ�clock-ssi-ick-3430es2ìti,omap3-ssi-interface-clockùssi_ick_3430es2—^ æclock-mmchs3-ickìti,omap3-interface-clock ùmmchs3_ick—] æÜgpmc_fckìfixed-factor-clock—\Œ—core_l4_ickìfixed-factor-clock—JŒ—æ]clock@e00 ti,clksel“ìclock-dss-tv-fckìti,gate-clock ùdss_tv_fck—B æµclock-dss-96m-fckìti,gate-clock ùdss_96m_fck—Z æ¶clock-dss2-alwon-fckìti,gate-clockùdss2_alwon_fck—# æ·clock-dss1-alwon-fck-3430es2ìti,dss-gate-clockùdss1_alwon_fck_3430es2—_ Òæ¸dummy_ckì fixed-clockZclock@c00 ti,clksel“ ìclock-gpt1-gate-fckìti,composite-gate-clockùgpt1_gate_fck—# æaclock-gpio1-dbckìti,gate-clock ùgpio1_dbck—` æ¬clock-wdt2-fckìti,wait-gate-clock ùwdt2_fck—` æ­clock-sr1-fckìti,wait-gate-clockùsr1_fck—# æclock-sr2-fckìti,wait-gate-clockùsr2_fck—# æclock-usim-gate-fckìti,composite-gate-clockùusim_gate_fck—Z æƒgpt1_fckìti,composite-clock—abæwkup_32k_fckìfixed-factor-clock—IŒ—æ`clock@c10 ti,clksel“ ìclock-wdt2-ickìti,omap3-interface-clock ùwdt2_ick—c æ®clock-wdt1-ickìti,omap3-interface-clock ùwdt1_ick—c æ¯clock-gpio1-ickìti,omap3-interface-clock ùgpio1_ick—c æ°clock-omap-32ksync-ickìti,omap3-interface-clockùomap_32ksync_ick—c æ±clock-gpt12-ickìti,omap3-interface-clock ùgpt12_ick—c æ²clock-gpt1-ickìti,omap3-interface-clock ùgpt1_ick—c æ³clock-usim-ickìti,omap3-interface-clock ùusim_ick—c æ´per_96m_fckìfixed-factor-clock—3Œ—æ per_48m_fckìfixed-factor-clock—:Œ—ædclock@1000 ti,clksel“ìclock-uart3-fckìti,wait-gate-clock ùuart3_fck—d æ‘clock-gpt2-gate-fckìti,composite-gate-clockùgpt2_gate_fck—# æfclock-gpt3-gate-fckìti,composite-gate-clockùgpt3_gate_fck—# æhclock-gpt4-gate-fckìti,composite-gate-clockùgpt4_gate_fck—# æjclock-gpt5-gate-fckìti,composite-gate-clockùgpt5_gate_fck—# ælclock-gpt6-gate-fckìti,composite-gate-clockùgpt6_gate_fck—# ænclock-gpt7-gate-fckìti,composite-gate-clockùgpt7_gate_fck—# æpclock-gpt8-gate-fckìti,composite-gate-clockùgpt8_gate_fck—# ærclock-gpt9-gate-fckìti,composite-gate-clockùgpt9_gate_fck—# ætclock-gpio6-dbckìti,gate-clock ùgpio6_dbck—e æ’clock-gpio5-dbckìti,gate-clock ùgpio5_dbck—e æ“clock-gpio4-dbckìti,gate-clock ùgpio4_dbck—e æ”clock-gpio3-dbckìti,gate-clock ùgpio3_dbck—e æ•clock-gpio2-dbckìti,gate-clock ùgpio2_dbck—e æ–clock-wdt3-fckìti,wait-gate-clock ùwdt3_fck—e æ—clock-mcbsp2-gate-fckìti,composite-gate-clockùmcbsp2_gate_fck—  æclock-mcbsp3-gate-fckìti,composite-gate-clockùmcbsp3_gate_fck—  æclock-mcbsp4-gate-fckìti,composite-gate-clockùmcbsp4_gate_fck—  æclock-uart4-fckìti,wait-gate-clock ùuart4_fck—d æ«clock@1040 ti,clksel“@ìclock-gpt2-mux-fckìti,composite-mux-clock ùgpt2_mux_fck—I#ægclock-gpt3-mux-fckìti,composite-mux-clock ùgpt3_mux_fck—I# æiclock-gpt4-mux-fckìti,composite-mux-clock ùgpt4_mux_fck—I# ækclock-gpt5-mux-fckìti,composite-mux-clock ùgpt5_mux_fck—I# æmclock-gpt6-mux-fckìti,composite-mux-clock ùgpt6_mux_fck—I# æoclock-gpt7-mux-fckìti,composite-mux-clock ùgpt7_mux_fck—I# æqclock-gpt8-mux-fckìti,composite-mux-clock ùgpt8_mux_fck—I# æsclock-gpt9-mux-fckìti,composite-mux-clock ùgpt9_mux_fck—I# æugpt2_fckìti,composite-clock—fgægpt3_fckìti,composite-clock—higpt4_fckìti,composite-clock—jkgpt5_fckìti,composite-clock—lmgpt6_fckìti,composite-clock—nogpt7_fckìti,composite-clock—pqgpt8_fckìti,composite-clock—rsgpt9_fckìti,composite-clock—tuper_32k_alwon_fckìfixed-factor-clock—IŒ—æeper_l4_ickìfixed-factor-clock—JŒ—ævclock@1010 ti,clksel“ìclock-gpio6-ickìti,omap3-interface-clock ùgpio6_ick—v æ˜clock-gpio5-ickìti,omap3-interface-clock ùgpio5_ick—v æ™clock-gpio4-ickìti,omap3-interface-clock ùgpio4_ick—v æšclock-gpio3-ickìti,omap3-interface-clock ùgpio3_ick—v æ›clock-gpio2-ickìti,omap3-interface-clock ùgpio2_ick—v æœclock-wdt3-ickìti,omap3-interface-clock ùwdt3_ick—v æ�clock-uart3-ickìti,omap3-interface-clock ùuart3_ick—v æžclock-uart4-ickìti,omap3-interface-clock ùuart4_ick—v æŸclock-gpt9-ickìti,omap3-interface-clock ùgpt9_ick—v æ clock-gpt8-ickìti,omap3-interface-clock ùgpt8_ick—v æ¡clock-gpt7-ickìti,omap3-interface-clock ùgpt7_ick—v æ¢clock-gpt6-ickìti,omap3-interface-clock ùgpt6_ick—v æ£clock-gpt5-ickìti,omap3-interface-clock ùgpt5_ick—v æ¤clock-gpt4-ickìti,omap3-interface-clock ùgpt4_ick—v æ¥clock-gpt3-ickìti,omap3-interface-clock ùgpt3_ick—v æ¦clock-gpt2-ickìti,omap3-interface-clock ùgpt2_ick—v æ§clock-mcbsp2-ickìti,omap3-interface-clock ùmcbsp2_ick—v æ¨clock-mcbsp3-ickìti,omap3-interface-clock ùmcbsp3_ick—v æ©clock-mcbsp4-ickìti,omap3-interface-clock ùmcbsp4_ick—v æªemu_src_ckìti,clkdm-gate-clock—wæ+secure_32k_fckì fixed-clockZ€æxgpt12_fckìfixed-factor-clock—xŒ—æwdt1_fckìfixed-factor-clock—xŒ—security_l4_ick2ìfixed-factor-clock—JŒ—æyclock@a14 ti,clksel“ ìclock-aes1-ickìti,omap3-interface-clock ùaes1_ick—y æclock-rng-ickìti,omap3-interface-clockùrng_ick—y æÿclock-sha11-ickìti,omap3-interface-clock ùsha11_ick—y clock-des1-ickìti,omap3-interface-clock ùdes1_ick—y clock-pka-ickìti,omap3-interface-clockùpka_ick—z clock@f00 ti,clksel“ìclock-cam-mclkìti,gate-clock ùcam_mclk—{ Òclock-csi2-96m-fckìti,gate-clock ùcsi2_96m_fck— æßcam_ick@f10ì!ti,omap3-no-wait-interface-clock—J“ æÞsecurity_l3_ickìfixed-factor-clock—HŒ—æzssi_l4_ickìfixed-factor-clock—JŒ—æ^sr_l4_ickìfixed-factor-clock—JŒ—dpll2_fck@40ìti,divider-clock—0 j“@uæ|dpll2_ck@4ìti,omap3-dpll-clock—#|“$@4!æ}dpll2_m2_ck@44ìti,divider-clock—}j“Duæ~iva2_ck@0ìti,wait-gate-clock—~“ æàclock@a18 ti,clksel“ ìclock-mad2d-ickìti,omap3-interface-clock ùmad2d_ick—H æãclock-usbtll-ickìti,omap3-interface-clock ùusbtll_ick—] æÛssi_ssr_fck_3430es2ìti,composite-clock—€æ�ssi_sst_fck_3430es2ìfixed-factor-clock—�Œ—æsys_d2_ckìfixed-factor-clock—#Œ—æKomap_96m_d2_fckìfixed-factor-clock—ZŒ—æLomap_96m_d4_fckìfixed-factor-clock—ZŒ—æMomap_96m_d8_fckìfixed-factor-clock—ZŒ—æNomap_96m_d10_fckìfixed-factor-clock—ZŒ— æOdpll5_m2_d4_ckìfixed-factor-clock—‚Œ—æPdpll5_m2_d8_ckìfixed-factor-clock—‚Œ—æQdpll5_m2_d16_ckìfixed-factor-clock—‚Œ—æRdpll5_m2_d20_ckìfixed-factor-clock—‚Œ—æSusim_fckìti,composite-clock—ƒ„dpll5_ck@d04ìti,omap3-dpll-clock—##“  $ L 4æ…dpll5_m2_ck@d50ìti,divider-clock—…j“ Puæ‚sgx_gate_fck@b00ìti,composite-gate-clock—0 “ æ�core_d3_ckìfixed-factor-clock—0Œ—æ†core_d4_ckìfixed-factor-clock—0Œ—æ‡core_d6_ckìfixed-factor-clock—0Œ—æˆomap_192m_alwon_fckìfixed-factor-clock—'Œ—æ‰core_d2_ckìfixed-factor-clock—0Œ—æŠsgx_mux_fck@b40ìti,composite-mux-clock —†‡ˆ4‰Š‹Œ“ @æŽsgx_fckìti,composite-clock—�Žæsgx_ick@b10ìti,wait-gate-clock—H“  æäcpefuse_fck@a08ìti,gate-clock—#“  æØts_fck@a08ìti,gate-clock—I“  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disabledsham@480c3000ti,omap3-shamùsham“H 0dî1KEPrxtarget-module@48318000ti,sysc-omap2-timerti,sysc“H1€H1€H1€revsyscsyss#' 0>—³žfckick+ H1€r†timer@0ti,omap3430-timer“€—žfckî%‘ °Itarget-module@49032000ti,sysc-omap2-timerti,sysc“I I I revsyscsyss#' 0>—§žfckick+ I timer@0ti,omap3430-timer“î&timer@49034000ti,omap3430-timer“I@î'ùtimer3timer@49036000ti,omap3430-timer“I`î(ùtimer4timer@49038000ti,omap3430-timer“I€î)ùtimer5Çtimer@4903a000ti,omap3430-timer“I î*ùtimer6Çtimer@4903c000ti,omap3430-timer“IÀî+ùtimer7Çtimer@4903e000ti,omap3430-timer“Iàî,ùtimer8ÔÇtimer@49040000ti,omap3430-timer“Iî-ùtimer9Ôtimer@48086000ti,omap3430-timer“H`î.ùtimer10Ôtimer@48088000ti,omap3430-timer“H€î/ùtimer11Ôtarget-module@48304000ti,sysc-omap2-timerti,sysc“H0@H0@H0@revsyscsyss#' 0>—²žfckick+ H0@timer@0ti,omap3430-timer“î_‘áusbhstll@48062000 ti,usbhs-tll“H îN ùusb_tll_hsusbhshost@48064000ti,usbhs-host“H@ ùusb_host_hs+ ñehci-phyohci@48064400ti,ohci-omap3“HDîLüehci@48064800 ti,ehci-omap“HHîMgpmc@6e000000ti,omap3430-gpmcùgpmc“nÐîKPrxtx%+*zŠzdefaultˆ  0,æ nand@0,0ti,omap2-nand “  î7micron,mt29c4g96mazFUgbch8wˆ–,¨,ºÉ"Ü,ï(þ6 @R-R>(P+okayonenand@0,0ti,omap2-onenand “hw‡™©¹Uʈ–`¨`ºÉ Ü Üþ`êï`r-r Zø )C[P>Zw.à+ disabledethernet@gpmcsmsc,lan9221smsc,lan9115rʈ–*¨$ºÉ Ü Üþ*êï$<-6 $ø)P>*}—± Á ÏÜzdefaultˆ  “ÿ îusb_otg_hs@480ab000ti,omap3-musb“H °î\]Bmcdma ùusb_otg_hsòý     %usb2-phy /2dss@48050000 ti,omap3-dss“Hokay ùdss_core—¸žfck+dispc@48050400ti,omap3-dispc“Hî ùdss_dispc—¸žfckencoder@4804fc00 ti,omap3-dsi“HüHþ@Hÿ protophypllî disabled ùdss_dsi1—¸· žfcksys_clk+encoder@48050800ti,omap3-rfbi“H disabled ùdss_rfbi—¸¹žfckickencoder@48050c00ti,omap3-venc“H  disabled ùdss_venc—µ¶žfcktv_dac_clkportendpoint 5 Eæssi-controller@48058000 ti,omap3-ssiùssiokay“H€H�sysgddîGBgdd_mpu+ —� žssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-port“H H¨txrxîCDssi-port@4805b000ti,omap3-ssi-port“H°H¸txrxîEFserial@49042000ti,omap3-uart“I îPKQRPtxrxùuart4ZÜlregulator-abb-mpu ti,abb-v1 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compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellsphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypassti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthcd-gpioswp-gpiosmmc-pwrseqnon-removablestatus#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,sync-readgpmc,sync-writegpmc,burst-lengthgpmc,burst-wrapgpmc,burst-readgpmc,burst-writegpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerremote-endpointdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-deviceti,modelti,mcbspregulator-always-onlabeldefault-stategpiostartup-delay-usreset-gpiosvcc-supplypowerdown-gpiosdigitalddc-i2c-bus