Ð þíï8Œ( cT,timll,omap3-devkit8000ti,omap3430ti,omap3 +,7TimLL OMAP3 Devkit8000 with 4.3'' LCD panelchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000 s/display |/connector0 …/connector1cpus+cpu@0arm,cortex-a8Žcpušž¥cpu±“à¿Óâpmu@54000000arm,cortex-a8-pmušT€êõdebugsssocti,omap-inframpu ti,omap3-mpuõmpuiva ti,iva2.2õivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busšhê +ÿõl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ ÿHscm@2000ti,omap3-scmsimple-busš + ÿ pinmux@30 ti,omap3-padconfpinctrl-singleš08+&;Yÿpinmux_twl4030_pinsv°Aâäpinmux_dss_dpi_pinsàv¤¦¨ª¬®°²´¶¸º¼¾ÀÂÄÆÈÊÌÎÐÒÔÖØÚâùscm_conf@270sysconsimple-busšp0+ ÿp0âpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapš°Špbias_mmc_omap2430‘pbias_mmc_omap2430 w@¸-ÆÀâìclocks+clock@68 ti,clkselšhÐclock-mcbsp5-mux-fckÐti,composite-mux-clockÝmcbsp5_mux_fckžðâ clock-mcbsp3-mux-fckÐti,composite-mux-clockÝmcbsp3_mux_fckžâclock-mcbsp4-mux-fckÐti,composite-mux-clockÝmcbsp4_mux_fckžðâmcbsp5_fckÐti,composite-clockž âôclock@4 ti,clkselšÐclock-mcbsp1-mux-fckÐti,composite-mux-clockÝmcbsp1_mux_fckžðâ clock-mcbsp2-mux-fckÐti,composite-mux-clockÝmcbsp2_mux_fckžðâ mcbsp1_fckÐti,composite-clockž âïmcbsp2_fckÐti,composite-clockž âñmcbsp3_fckÐti,composite-clockžâòmcbsp4_fckÐti,composite-clockžâóclockdomainspinmux@a00 ti,omap3-padconfpinctrl-singleš \+&;Yÿpinmux_twl4030_vpins vâåtarget-module@480a6000ti,sysc-omap2ti,syscšH `DH `HH `Lýrevsyscsyss "ž¥ick+ ÿH ` aes1@0 ti,omap3-aesšPê/  4txrxtarget-module@480c5000ti,sysc-omap2ti,syscšH PDH PHH PLýrevsyscsyss "ž¥ick+ ÿH P aes2@0 ti,omap3-aesšPê/AB4txrxprm@48306000 ti,omap3-prmšH0`@ê clocks+virt_16_8m_ckÐ fixed-clock>Yâosc_sys_ck@d40Ð ti,mux-clockžš @âsys_ck@1270Ðti,divider-clockžðNšpYâ sys_clkout1@d70Ðti,gate-clockžš pðdpll3_x2_ckÐfixed-factor-clockžp{dpll3_m2x2_ckÐfixed-factor-clockžp{âdpll4_x2_ckÐfixed-factor-clockžp{corex2_fckÐfixed-factor-clockžp{â!wkup_l4_ickÐfixed-factor-clockž p{â`corex2_d3_fckÐfixed-factor-clockž!p{âˆcorex2_d5_fckÐfixed-factor-clockž!p{â‰clockdomainscm@48004000 ti,omap3-cmšH@@clocks+dummy_apb_pclkÐ fixed-clock>omap_32k_fckÐ fixed-clock>€âFvirt_12m_ckÐ fixed-clock>·âvirt_13m_ckÐ fixed-clock>Æ]@âvirt_19200000_ckÐ fixed-clock>$øâvirt_26000000_ckÐ fixed-clock>Œº€âvirt_38_4m_ckÐ fixed-clock>Iðâdpll4_ck@d00Ðti,omap3-dpll-per-clockž š D 0âdpll4_m2_ck@d48Ðti,divider-clockžN?š HYâ"dpll4_m2x2_mul_ckÐfixed-factor-clockž"p{â#dpll4_m2x2_ck@d00Ðti,gate-clockž#ðš …â$omap_96m_alwon_fckÐfixed-factor-clockž$p{â0dpll3_ck@d00Ðti,omap3-dpll-core-clockž š @ 0âclock@1140 ti,clkselš@Ðclock-dpll3-m3Ðti,divider-clock Ýdpll3_m3_ckžðNYâ*clock-dpll4-m6Ðti,divider-clock Ýdpll4_m6_ckžðN?Yâ<clock-emu-src-muxÐ ti,mux-clockÝemu_src_mux_ckž %&'âtclock-pclk-fckÐti,divider-clock Ýpclk_fckž(ðNYclock-pclkx2-fckÐti,divider-clock Ýpclkx2_fckž(ðNYclock-atclk-fckÐti,divider-clock Ýatclk_fckž(ðNYclock-traceclk-src-fckÐ ti,mux-clockÝtraceclk_src_fckž %&'ðâ)clock-traceclk-fckÐti,divider-clock Ýtraceclk_fckž)ð NYdpll3_m3x2_mul_ckÐfixed-factor-clockž*p{â+dpll3_m3x2_ck@d00Ðti,gate-clockž+ð š …â,emu_core_alwon_ckÐfixed-factor-clockž,p{â%sys_altclkÐ fixed-clock>â3mcbsp_clksÐ fixed-clock>âcore_ckÐfixed-factor-clockžp{â-dpll1_fck@940Ðti,divider-clockž-ðNš @Yâ.dpll1_ck@904Ðti,omap3-dpll-clockž .š  $ @ 4âdpll1_x2_ckÐfixed-factor-clockžp{â/dpll1_x2m2_ck@944Ðti,divider-clockž/Nš DYâCcm_96m_fckÐfixed-factor-clockž0p{â1clock@d40 ti,clkselš @Ðclock-dpll3-m2Ðti,divider-clock Ýdpll3_m2_ckžðNYâclock-omap-96m-fckÐ ti,mux-clock Ýomap_96m_fckž1 ðâWclock-omap-54m-fckÐ ti,mux-clock Ýomap_54m_fckž23ðâ?clock-omap-48m-fckÐ ti,mux-clock Ýomap_48m_fckž43ðâ7clock@e40 ti,clkselš@Ðclock-dpll4-m3Ðti,divider-clock Ýdpll4_m3_ckžðN Yâ5clock-dpll4-m4Ðti,divider-clock Ýdpll4_m4_ckžNYâ8dpll4_m3x2_mul_ckÐfixed-factor-clockž5p{â6dpll4_m3x2_ck@d00Ðti,gate-clockž6ðš …â2cm_96m_d2_fckÐfixed-factor-clockž1p{â4omap_12m_fckÐfixed-factor-clockž7p{âXdpll4_m4x2_mul_ckÐti,fixed-factor-clockž8›©¶â9dpll4_m4x2_ck@d00Ðti,gate-clockž9ðš …¶â\dpll4_m5_ck@f40Ðti,divider-clockžN?š@Yâ:dpll4_m5x2_mul_ckÐti,fixed-factor-clockž:›©¶â;dpll4_m5x2_ck@d00Ðti,gate-clockž;ðš …¶âxdpll4_m6x2_mul_ckÐfixed-factor-clockž<p{â=dpll4_m6x2_ck@d00Ðti,gate-clockž=ðš …â>emu_per_alwon_ckÐfixed-factor-clockž>p{â&clock@d70 ti,clkselš pÐclock-clkout2-src-gateÐ ti,composite-no-wait-gate-clockÝclkout2_src_gate_ckž-ðâAclock-clkout2-src-muxÐti,composite-mux-clockÝclkout2_src_mux_ckž- 1?âBclock-sys-clkout2Ðti,divider-clock Ýsys_clkout2ž@ðN@Éclkout2_src_ckÐti,composite-clockžABâ@mpu_ckÐfixed-factor-clockžCp{âDarm_fck@924Ðti,divider-clockžDš $Nemu_mpu_alwon_ckÐfixed-factor-clockžDp{â'clock@a40 ti,clkselš @Ðclock-l3-ickÐti,divider-clockÝl3_ickž-NYâEclock-l4-ickÐti,divider-clockÝl4_ickžEðNYâGclock-gpt10-mux-fckÐti,composite-mux-clockÝgpt10_mux_fckžF ðâTclock-gpt11-mux-fckÐti,composite-mux-clockÝgpt11_mux_fckžF ðâVclock-ssi-ssr-div-fck-3430es2Ðti,composite-divider-clockÝssi_ssr_div_fck_3430es2ž!ð$ßâ}clock@c40 ti,clkselš @Ðclock-rm-ickÐti,divider-clockÝrm_ickžGðNYclock-gpt1-mux-fckÐti,composite-mux-clock Ýgpt1_mux_fckžF â_clock-usim-mux-fckÐti,composite-mux-clock Ýusim_mux_fck(ž HIJKLMNOPðYâ�clock@a00 ti,clkselš Ðclock-gpt10-gate-fckÐti,composite-gate-clockÝgpt10_gate_fckž ð âSclock-gpt11-gate-fckÐti,composite-gate-clockÝgpt11_gate_fckž ð âUclock-mmchs2-fckÐti,wait-gate-clock Ýmmchs2_fckžðâ¶clock-mmchs1-fckÐti,wait-gate-clock Ýmmchs1_fckžðâ·clock-i2c3-fckÐti,wait-gate-clock Ýi2c3_fckžðâ¸clock-i2c2-fckÐti,wait-gate-clock Ýi2c2_fckžðâ¹clock-i2c1-fckÐti,wait-gate-clock Ýi2c1_fckžðâºclock-mcbsp5-gate-fckÐti,composite-gate-clockÝmcbsp5_gate_fckžð âclock-mcbsp1-gate-fckÐti,composite-gate-clockÝmcbsp1_gate_fckžð â clock-mcspi4-fckÐti,wait-gate-clock Ýmcspi4_fckžQðâ»clock-mcspi3-fckÐti,wait-gate-clock Ýmcspi3_fckžQðâ¼clock-mcspi2-fckÐti,wait-gate-clock Ýmcspi2_fckžQðâ½clock-mcspi1-fckÐti,wait-gate-clock Ýmcspi1_fckžQðâ¾clock-uart2-fckÐti,wait-gate-clock Ýuart2_fckžQðâ¿clock-uart1-fckÐti,wait-gate-clock Ýuart1_fckžQð âÀclock-hdq-fckÐti,wait-gate-clockÝhdq_fckžRðâÁclock-modem-fckÐti,omap3-interface-clock Ýmodem_fckž ðâÝclock-mspro-fckÐti,wait-gate-clock Ýmspro_fckžðclock-ssi-ssr-gate-fck-3430es2Ð ti,composite-no-wait-gate-clockÝssi_ssr_gate_fck_3430es2ž!ðâ|clock-mmchs3-fckÐti,wait-gate-clock Ýmmchs3_fckžðâÙgpt10_fckÐti,composite-clockžSTgpt11_fckÐti,composite-clockžUVcore_96m_fckÐfixed-factor-clockžWp{âcore_48m_fckÐfixed-factor-clockž7p{âQcore_12m_fckÐfixed-factor-clockžXp{âRcore_l3_ickÐfixed-factor-clockžEp{âYclock@a10 ti,clkselš Ðclock-sdrc-ickÐti,wait-gate-clock Ýsdrc_ickžYðâŒclock-mmchs2-ickÐti,omap3-interface-clock Ýmmchs2_ickžZðâÂclock-mmchs1-ickÐti,omap3-interface-clock Ýmmchs1_ickžZðâÃclock-hdq-ickÐti,omap3-interface-clockÝhdq_ickžZðâÄclock-mcspi4-ickÐti,omap3-interface-clock Ýmcspi4_ickžZðâÅclock-mcspi3-ickÐti,omap3-interface-clock Ýmcspi3_ickžZðâÆclock-mcspi2-ickÐti,omap3-interface-clock Ýmcspi2_ickžZðâÇclock-mcspi1-ickÐti,omap3-interface-clock Ýmcspi1_ickžZðâÈclock-i2c3-ickÐti,omap3-interface-clock Ýi2c3_ickžZðâÉclock-i2c2-ickÐti,omap3-interface-clock Ýi2c2_ickžZðâÊclock-i2c1-ickÐti,omap3-interface-clock Ýi2c1_ickžZðâËclock-uart2-ickÐti,omap3-interface-clock Ýuart2_ickžZðâÌclock-uart1-ickÐti,omap3-interface-clock Ýuart1_ickžZð âÍclock-gpt11-ickÐti,omap3-interface-clock Ýgpt11_ickžZð âÎclock-gpt10-ickÐti,omap3-interface-clock Ýgpt10_ickžZð âÏclock-mcbsp5-ickÐti,omap3-interface-clock Ýmcbsp5_ickžZð âÐclock-mcbsp1-ickÐti,omap3-interface-clock Ýmcbsp1_ickžZð âÑclock-omapctrl-ickÐti,omap3-interface-clock Ýomapctrl_ickžZðâÒclock-aes2-ickÐti,omap3-interface-clock Ýaes2_ickžZðâclock-sha12-ickÐti,omap3-interface-clock Ýsha12_ickžZðâÓclock-icr-ickÐti,omap3-interface-clockÝicr_ickžZðclock-des2-ickÐti,omap3-interface-clock Ýdes2_ickžZðclock-mspro-ickÐti,omap3-interface-clock Ýmspro_ickžZðclock-mailboxes-ickÐti,omap3-interface-clockÝmailboxes_ickžZðclock-sad2d-ickÐti,omap3-interface-clock Ýsad2d_ickžEðâÞclock-hsotgusb-ick-3430es2Ð"ti,omap3-hsotgusb-interface-clockÝhsotgusb_ick_3430es2žYðâ�clock-ssi-ick-3430es2Ðti,omap3-ssi-interface-clockÝssi_ick_3430es2ž[ðâclock-mmchs3-ickÐti,omap3-interface-clock Ýmmchs3_ickžZðâØgpmc_fckÐfixed-factor-clockžYp{core_l4_ickÐfixed-factor-clockžGp{âZclock@e00 ti,clkselšÐclock-dss-tv-fckÐti,gate-clock Ýdss_tv_fckž?ðâ±clock-dss-96m-fckÐti,gate-clock Ýdss_96m_fckžWðâ²clock-dss2-alwon-fckÐti,gate-clockÝdss2_alwon_fckž ðâ³clock-dss1-alwon-fck-3430es2Ðti,dss-gate-clockÝdss1_alwon_fck_3430es2ž\ð¶â´dummy_ckÐ fixed-clock>clock@c00 ti,clkselš Ðclock-gpt1-gate-fckÐti,composite-gate-clockÝgpt1_gate_fckž ðâ^clock-gpio1-dbckÐti,gate-clock Ýgpio1_dbckž]ðâ¨clock-wdt2-fckÐti,wait-gate-clock Ýwdt2_fckž]ðâ©clock-sr1-fckÐti,wait-gate-clockÝsr1_fckž ðâclock-sr2-fckÐti,wait-gate-clockÝsr2_fckž ðâclock-usim-gate-fckÐti,composite-gate-clockÝusim_gate_fckžWð â€gpt1_fckÐti,composite-clockž^_âõwkup_32k_fckÐfixed-factor-clockžFp{â]clock@c10 ti,clkselš Ðclock-wdt2-ickÐti,omap3-interface-clock Ýwdt2_ickž`ðâªclock-wdt1-ickÐti,omap3-interface-clock Ýwdt1_ickž`ðâ«clock-gpio1-ickÐti,omap3-interface-clock Ýgpio1_ickž`ðâ¬clock-omap-32ksync-ickÐti,omap3-interface-clockÝomap_32ksync_ickž`ðâ­clock-gpt12-ickÐti,omap3-interface-clock Ýgpt12_ickž`ðâ®clock-gpt1-ickÐti,omap3-interface-clock Ýgpt1_ickž`ðâ¯clock-usim-ickÐti,omap3-interface-clock Ýusim_ickž`ð â°per_96m_fckÐfixed-factor-clockž0p{âper_48m_fckÐfixed-factor-clockž7p{âaclock@1000 ti,clkselšÐclock-uart3-fckÐti,wait-gate-clock Ýuart3_fckžað âŽclock-gpt2-gate-fckÐti,composite-gate-clockÝgpt2_gate_fckž ðâcclock-gpt3-gate-fckÐti,composite-gate-clockÝgpt3_gate_fckž ðâeclock-gpt4-gate-fckÐti,composite-gate-clockÝgpt4_gate_fckž ðâgclock-gpt5-gate-fckÐti,composite-gate-clockÝgpt5_gate_fckž ðâiclock-gpt6-gate-fckÐti,composite-gate-clockÝgpt6_gate_fckž ðâkclock-gpt7-gate-fckÐti,composite-gate-clockÝgpt7_gate_fckž ðâmclock-gpt8-gate-fckÐti,composite-gate-clockÝgpt8_gate_fckž ð âoclock-gpt9-gate-fckÐti,composite-gate-clockÝgpt9_gate_fckž ð âqclock-gpio6-dbckÐti,gate-clock Ýgpio6_dbckžbðâ�clock-gpio5-dbckÐti,gate-clock Ýgpio5_dbckžbðâ�clock-gpio4-dbckÐti,gate-clock Ýgpio4_dbckžbðâ‘clock-gpio3-dbckÐti,gate-clock Ýgpio3_dbckžbðâ’clock-gpio2-dbckÐti,gate-clock Ýgpio2_dbckžbð â“clock-wdt3-fckÐti,wait-gate-clock Ýwdt3_fckžbð â”clock-mcbsp2-gate-fckÐti,composite-gate-clockÝmcbsp2_gate_fckžðâ clock-mcbsp3-gate-fckÐti,composite-gate-clockÝmcbsp3_gate_fckžðâclock-mcbsp4-gate-fckÐti,composite-gate-clockÝmcbsp4_gate_fckžðâclock@1040 ti,clkselš@Ðclock-gpt2-mux-fckÐti,composite-mux-clock Ýgpt2_mux_fckžF âdclock-gpt3-mux-fckÐti,composite-mux-clock Ýgpt3_mux_fckžF ðâfclock-gpt4-mux-fckÐti,composite-mux-clock Ýgpt4_mux_fckžF ðâhclock-gpt5-mux-fckÐti,composite-mux-clock Ýgpt5_mux_fckžF ðâjclock-gpt6-mux-fckÐti,composite-mux-clock Ýgpt6_mux_fckžF ðâlclock-gpt7-mux-fckÐti,composite-mux-clock Ýgpt7_mux_fckžF ðânclock-gpt8-mux-fckÐti,composite-mux-clock Ýgpt8_mux_fckžF ðâpclock-gpt9-mux-fckÐti,composite-mux-clock Ýgpt9_mux_fckžF ðârgpt2_fckÐti,composite-clockžcdâögpt3_fckÐti,composite-clockžefgpt4_fckÐti,composite-clockžghgpt5_fckÐti,composite-clockžijgpt6_fckÐti,composite-clockžklgpt7_fckÐti,composite-clockžmngpt8_fckÐti,composite-clockžopgpt9_fckÐti,composite-clockžqrper_32k_alwon_fckÐfixed-factor-clockžFp{âbper_l4_ickÐfixed-factor-clockžGp{âsclock@1010 ti,clkselšÐclock-gpio6-ickÐti,omap3-interface-clock Ýgpio6_ickžsðâ•clock-gpio5-ickÐti,omap3-interface-clock Ýgpio5_ickžsðâ–clock-gpio4-ickÐti,omap3-interface-clock Ýgpio4_ickžsðâ—clock-gpio3-ickÐti,omap3-interface-clock Ýgpio3_ickžsðâ˜clock-gpio2-ickÐti,omap3-interface-clock Ýgpio2_ickžsð â™clock-wdt3-ickÐti,omap3-interface-clock Ýwdt3_ickžsð âšclock-uart3-ickÐti,omap3-interface-clock Ýuart3_ickžsð â›clock-uart4-ickÐti,omap3-interface-clock Ýuart4_ickžsðâœclock-gpt9-ickÐti,omap3-interface-clock Ýgpt9_ickžsð â�clock-gpt8-ickÐti,omap3-interface-clock Ýgpt8_ickžsð âžclock-gpt7-ickÐti,omap3-interface-clock Ýgpt7_ickžsðâŸclock-gpt6-ickÐti,omap3-interface-clock Ýgpt6_ickžsðâ clock-gpt5-ickÐti,omap3-interface-clock Ýgpt5_ickžsðâ¡clock-gpt4-ickÐti,omap3-interface-clock Ýgpt4_ickžsðâ¢clock-gpt3-ickÐti,omap3-interface-clock Ýgpt3_ickžsðâ£clock-gpt2-ickÐti,omap3-interface-clock Ýgpt2_ickžsðâ¤clock-mcbsp2-ickÐti,omap3-interface-clock Ýmcbsp2_ickžsðâ¥clock-mcbsp3-ickÐti,omap3-interface-clock Ýmcbsp3_ickžsðâ¦clock-mcbsp4-ickÐti,omap3-interface-clock Ýmcbsp4_ickžsðâ§emu_src_ckÐti,clkdm-gate-clockžtâ(secure_32k_fckÐ fixed-clock>€âugpt12_fckÐfixed-factor-clockžup{â÷wdt1_fckÐfixed-factor-clockžup{security_l4_ick2Ðfixed-factor-clockžGp{âvclock@a14 ti,clkselš Ðclock-aes1-ickÐti,omap3-interface-clock Ýaes1_ickžvðâclock-rng-ickÐti,omap3-interface-clockÝrng_ickžvðâðclock-sha11-ickÐti,omap3-interface-clock Ýsha11_ickžvðclock-des1-ickÐti,omap3-interface-clock Ýdes1_ickžvðclock-pka-ickÐti,omap3-interface-clockÝpka_ickžwðclock@f00 ti,clkselšÐclock-cam-mclkÐti,gate-clock Ýcam_mclkžxð¶clock-csi2-96m-fckÐti,gate-clock Ýcsi2_96m_fckžðâÛcam_ick@f10Ð!ti,omap3-no-wait-interface-clockžGšðâÚsecurity_l3_ickÐfixed-factor-clockžEp{âwssi_l4_ickÐfixed-factor-clockžGp{â[sr_l4_ickÐfixed-factor-clockžGp{dpll2_fck@40Ðti,divider-clockž-ðNš@Yâydpll2_ck@4Ðti,omap3-dpll-clockž yš$@4ëýâzdpll2_m2_ck@44Ðti,divider-clockžzNšDYâ{iva2_ck@0Ðti,wait-gate-clockž{šðâÜclock@a18 ti,clkselš Ðclock-mad2d-ickÐti,omap3-interface-clock Ýmad2d_ickžEðâßclock-usbtll-ickÐti,omap3-interface-clock Ýusbtll_ickžZðâ×ssi_ssr_fck_3430es2Ðti,composite-clockž|}â~ssi_sst_fck_3430es2Ðfixed-factor-clockž~p{âÿsys_d2_ckÐfixed-factor-clockž p{âHomap_96m_d2_fckÐfixed-factor-clockžWp{âIomap_96m_d4_fckÐfixed-factor-clockžWp{âJomap_96m_d8_fckÐfixed-factor-clockžWp{âKomap_96m_d10_fckÐfixed-factor-clockžWp{ âLdpll5_m2_d4_ckÐfixed-factor-clockžp{âMdpll5_m2_d8_ckÐfixed-factor-clockžp{âNdpll5_m2_d16_ckÐfixed-factor-clockžp{âOdpll5_m2_d20_ckÐfixed-factor-clockžp{âPusim_fckÐti,composite-clockž€�dpll5_ck@d04Ðti,omap3-dpll-clockž š  $ L 4ëýâ‚dpll5_m2_ck@d50Ðti,divider-clockž‚Nš PYâsgx_gate_fck@b00Ðti,composite-gate-clockž-ðš âŠcore_d3_ckÐfixed-factor-clockž-p{âƒcore_d4_ckÐfixed-factor-clockž-p{â„core_d6_ckÐfixed-factor-clockž-p{â…omap_192m_alwon_fckÐfixed-factor-clockž$p{â†core_d2_ckÐfixed-factor-clockž-p{â‡sgx_mux_fck@b40Ðti,composite-mux-clock žƒ„…1†‡ˆ‰š @â‹sgx_fckÐti,composite-clockžŠ‹âsgx_ick@b10Ðti,wait-gate-clockžEš ðâàcpefuse_fck@a08Ðti,gate-clockž š ðâÔts_fck@a08Ðti,gate-clockžFš ðâÕusbtll_fck@a08Ðti,wait-gate-clockžš ðâÖdss_ick_3430es2@e10Ðti,omap3-dss-interface-clockžGšðâµusbhost_120m_fck@1400Ðti,gate-clockžšðâáusbhost_48m_fck@1400Ðti,dss-gate-clockž7šðââusbhost_ick@1410Ðti,omap3-dss-interface-clockžGšðâãclockdomainscore_l3_clkdmti,clockdomainžŒ�dpll3_clkdmti,clockdomainždpll1_clkdmti,clockdomainžper_clkdmti,clockdomainhžŽ��‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§emu_clkdmti,clockdomainž(dpll4_clkdmti,clockdomainžwkup_clkdmti,clockdomain$ž¨©ª«¬­®¯°dss_clkdmti,clockdomainž±²³´µcore_l4_clkdmti,clockdomain”ž¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙcam_clkdmti,clockdomainžÚÛiva2_clkdmti,clockdomainžÜdpll2_clkdmti,clockdomainžzd2d_clkdmti,clockdomain žÝÞßdpll5_clkdmti,clockdomainž‚sgx_clkdmti,clockdomainžàusbhost_clkdmti,clockdomain žáâãtarget-module@48320000ti,sysc-omap2ti,syscšH2H2 ýrevsyscž]­¥fckick+ ÿH2counter@0ti,omap-counter32kš interrupt-controller@48200000ti,omap3-intc&šH âtarget-module@48056000ti,sysc-omap2ti,syscšH`H`,H`(ýrevsyscsyss#  "žY¥ick+ ÿH`dma-controller@0ti,omap3430-sdmati,omap-sdmašê '2 ?`âgpio@48310000ti,omap3-gpiošH1êõgpio1L^n&âëgpio@49050000ti,omap3-gpiošIêõgpio2^n&gpio@49052000ti,omap3-gpiošI êõgpio3^n&gpio@49054000ti,omap3-gpiošI@ê õgpio4^n&gpio@49056000ti,omap3-gpiošI`ê!õgpio5^n&gpio@49058000ti,omap3-gpiošI€ê"õgpio6^n&âserial@4806a000ti,omap3-uartšH  zH/124txrxõuart1>Ülserial@4806c000ti,omap3-uartšHÀzI/344txrxõuart2>Ülserial@49020000ti,omap3-uartšIzJ/564txrxõuart3>Üli2c@48070000 ti,omap3-i2cšH€ê8+õi2c1>'¬@twl@48šHê ti,twl4030&Ždefaultœäåaudioti,twl4030-audiocodecrtcti,twl4030-rtcê bciti,twl4030-bciê ¦æ´ç Àvacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1  'À¸ regulator-vdacti,twl4030-vdac w@¸w@âûregulator-vioti,twl4030-vio w@¸w@âêregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1 :�¸0°âíregulator-vmmc2ti,twl4030-vmmc2 :�¸0°regulator-vusb1v5ti,twl4030-vusb1v5âèregulator-vusb1v8ti,twl4030-vusb1v8âéregulator-vusb3v1ti,twl4030-vusb3v1âæregulator-vpll1ti,twl4030-vpll1 ‘vdds_dsi w@¸w@âúregulator-vpll2ti,twl4030-vpll2 w@¸w@regulator-vsimti,twl4030-vsim w@¸-ÆÀâîgpioti,twl4030-gpio^n&ÑÝ¡Æâ twl4030-usbti,twl4030-usbê êèøéæpwmti,twl4030-pwm(pwmledti,twl4030-pwmled(pwrbuttonti,twl4030-pwrbuttonêkeypadti,twl4030-keypadê3CDV?  @A Bsrmadcti,twl4030-madcêcâçi2c@48072000 ti,omap3-i2cšH €ê9+õi2c2>€â i2c@48060000 ti,omap3-i2cšH€ê=+õi2c3 udisabledmailbox@48094000ti,omap3-mailboxõmailboxšH @ê|ˆšmbox-dsp ¬ ·spi@48098000ti,omap2-mcspišH €êA+õmcspi1Â@/#$%&'()* 4tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspišH  êB+õmcspi2 /+,-.4tx0rx0tx1rx1ads7846@0 ti,ads7846ÐêšÛã` ëê íëúÿ ÿ´.ÿ> N^n~–“spi@480b8000ti,omap2-mcspišH €ê[+õmcspi3 /4tx0rx0tx1rx1spi@480ba000ti,omap2-mcspišH  ê0+õmcspi4Â/FG4tx0rx01w@480b2000 ti,omap3-1wšH ê:õhdq1wmmc@4809c000ti,omap3-hsmmcšH ÀêSõmmc1¡/=>4txrx®ì»íÇîÔmmc@480b4000ti,omap3-hsmmcšH @êVõmmc2//04txrx udisabledmmc@480ad000ti,omap3-hsmmcšH Ðê^õmmc3/MN4txrx udisabledmmu@480bd400Þti,omap2-iommušH Ô€êõmmu_ispëâmmu@5d000000Þti,omap2-iommuš]€êõmmu_iva udisabledwdt@48314000 ti,omap3-wdtšH1@€ õwd_timer2 udisabledmcbsp@48074000ti,omap3-mcbspšH@ÿýmpu ê;< ûcommontxrx €õmcbsp1/ 4txrxžï¥fck udisabledtarget-module@480a0000ti,sysc-omap2ti,syscšH <H @H Dýrevsyscsyss"žð¥ick+ ÿH rng@0 ti,omap2-rngš ê4mcbsp@49022000ti,omap3-mcbspšI ÿI€ÿ ýmpusidetoneê>?ûcommontxrxsidetone õmcbsp2mcbsp2_sidetone/!"4txrxžñ¥¥fckickuokayâ mcbsp@49024000ti,omap3-mcbspšI@ÿI ÿ ýmpusidetoneêYZûcommontxrxsidetone €õmcbsp3mcbsp3_sidetone/4txrxžò¦¥fckick udisabledmcbsp@49026000ti,omap3-mcbspšI`ÿýmpu ê67 ûcommontxrx €õmcbsp4/4txrxžó¥fck udisabledmcbsp@48096000ti,omap3-mcbspšH `ÿýmpu êQR ûcommontxrx €õmcbsp5/4txrxžô¥fck udisabledsham@480c3000ti,omap3-shamõshamšH 0dê1/E4rxtarget-module@48318000ti,sysc-omap2-timerti,syscšH1€H1€H1€ýrevsyscsyss' "žõ¯¥fckick+ ÿH1€timer@0ti,omap3430-timerš€žõ¥fckê%+õ;Ftarget-module@49032000ti,sysc-omap2-timerti,syscšI I I ýrevsyscsyss' "žö¤¥fckick+ ÿI timer@0ti,omap3430-timeršê&timer@49034000ti,omap3430-timeršI@ê'õtimer3timer@49036000ti,omap3430-timeršI`ê(õtimer4timer@49038000ti,omap3430-timeršI€ê)õtimer5Rtimer@4903a000ti,omap3430-timeršI ê*õtimer6Rtimer@4903c000ti,omap3430-timeršIÀê+õtimer7Rtimer@4903e000ti,omap3430-timeršIàê,õtimer8_Rtimer@49040000ti,omap3430-timeršIê-õtimer9_timer@48086000ti,omap3430-timeršH`ê.õtimer10_timer@48088000ti,omap3430-timeršH€ê/õtimer11_target-module@48304000ti,sysc-omap2-timerti,syscšH0@H0@H0@ýrevsyscsyss' "ž÷®¥fckick+ ÿH0@l€timer@0ti,omap3430-timeršê_‹šusbhstll@48062000 ti,usbhs-tllšH êN õusb_tll_hsusbhshost@48064000ti,usbhs-hostšH@ õusb_host_hs+ÿohci@48064400ti,ohci-omap3šHDêLªehci@48064800 ti,ehci-omapšHHêMgpmc@6e000000ti,omap3430-gpmcõgpmcšnÐê/4rxtxÂÎ+&^n ÿ0,âønand@0,0ti,omap2-nand š øêàïsw"0,B,Tc"v,‰(˜6§@¶RÇRØ(ê+x-loader@0 X-Loaderšbootloaders@80000U-Bootšbootloaders_env@260000 U-Boot Envš&kernel@280000Kernelš(@filesystem@680000 File Systemšh˜ethernet@6,0davicom,dm9000š ëê%ï7E_"0´B´Tcv0y6˜¨‡6‰¨¶ºǺ§�•¯ZÆZàøêØusb_otg_hs@480ab000ti,omap3-musbšH °ê\]ûmcdma õusb_otg_hs   " dss@48050000 ti,omap3-dssšHuokay õdss_corež´¥fck+ÿŽdefaultœù +ú ;ûdispc@48050400ti,omap3-dispcšHê õdss_dispcž´¥fckencoder@4804fc00 ti,omap3-dsišHüHþ@Hÿ ýprotophypllê udisabled õdss_dsi1ž´³ ¥fcksys_clk+encoder@48050800ti,omap3-rfbišH udisabled õdss_rfbiž´µ¥fckickencoder@48050c00ti,omap3-vencšH uokay õdss_vencž±¥fck Kûportendpoint Wü gâport+endpoint@0š Wý sâ endpoint@1š Wþ sâssi-controller@48058000 ti,omap3-ssiõssiuokayšH€H�ýsysgddêGûgdd_mpu+ÿ ž~ÿ ¥ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portšH H¨ýtxrxêCDssi-port@4805b000ti,omap3-ssi-portšH°H¸ýtxrxêEFpinmux@480025d8 ti,omap3-padconfpinctrl-singlešH%Ø$+&;Yÿisp@480bc000 ti,omap3-ispšH ÀüH Ø|ê ~Šl …Ðports+bandgap@48002524šH%$ti,omap34xx-bandgap ‘âtarget-module@480cb000ti,sysc-omap3430-srti,syscõsmartreflex_corešH °$ýsyscž¥fck+ ÿH °smartreflex@0ti,omap3-smartreflex-corešêtarget-module@480c9000ti,sysc-omap3430-srti,syscõsmartreflex_mpu_ivašH �$ýsyscž¥fck+ ÿH �smartreflex@480c9000ti,omap3-smartreflex-mpu-ivašêtarget-module@50000000ti,sysc-omap2ti,syscšPýrevžà¥fckick+ ÿP@opp-tableoperating-points-v2-ti-cpuŠâopp1-125000000 §sY@ ®à˜à˜à˜ ¼ÿÿÿÿopp2-250000000 §æ²€ ®g8g8g8 ¼ÿÿÿÿ Íopp3-500000000 §Íe ®O€O€O€ ¼ÿÿÿÿopp4-550000000 § ÈU€ ®txtxtx ¼ÿÿÿÿopp5-600000000 §#ÃF ®™p™p™p ¼ÿÿÿÿopp6-720000000 §*êT ®™p™p™p ¼ÿÿÿÿ Ùthermal-zonescpu-thermal äú úè N  tripscpu_alert %8€ 1Еpassiveâcpu_crit %_� 1Ð •criticalcooling-mapsmap0 < Aÿÿÿÿÿÿÿÿmemory@80000000Žmemoryš€leds gpio-ledsheartbeatdevkit8000::led1 P Von dheartbeatmmcdevkit8000::led2 P Von dnoneusrdevkit8000::led3 P Von dusrpmu_statdevkit8000::pmu_stat P soundti,omap-twl4030 zdevkit8000 ƒ I ŒExt SpkPREDRIVELExt SpkPREDRIVERMAINMICMain MicMain MicMic Bias 1gpio_keys gpio-keysuseruser Pë �“encoder0 ti,tfp410 ¨ ports+port@0šendpoint W âýport@1šendpoint W âconnector0dvi-connectordvi ¸ À portendpoint Wâ connector1svideo-connectortvportendpoint Wâüdisplay panel-dpilcd Ì portendpoint Wâþpanel-timing>›á Ùà á é ö )   %  / < I S compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2display0display1display2device_typeregclocksclock-namesclock-latencyoperating-points-v2#cooling-cellsphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypassti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesti,use-ledsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repti,keep-vref-onti,settle-delay-usecwakeup-sourceti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-width#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,no-reset-on-initti,no-idleti,timer-alwonti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthdavicom,no-eepromgpmc,mux-add-datagpmc,wait-pingpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsvdds_dsi-supplyvdda_dac-supplyvdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicegpiosdefault-statelinux,default-triggerti,modelti,mcbspti,audio-routinglinux,codepowerdown-gpiosdigitalddc-i2c-busenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-active