Ð þí"W8<( 3logicpd,dm3730-torpedo-devkitti,omap3630ti,omap3 +77LogicPD Zoom DM3730 Torpedo + Wireless Development Kitchosen=/ocp@68000000/serial@4806a000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000/ocp@68000000/serial@49042000 ‡/displaycpus+cpu@0arm,cortex-a8�cpuœ §cpu³“àÁÕàïû"pmu@54000000arm,cortex-a8-pmuœT€debugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busœh +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-busœ +  pinmux@30 ti,omap3-padconfpinctrl-singleœ08+.?Trÿûçpinmux_mcbsp2_pins � ûpinmux_uart2_pins(�DFHJhûèpinmux_mcspi1_pins �˜šœžûúpinmux_hsusb_otg_pins`�rtvxz|~€‚„†ˆûpinmux_i2c1_pins�ŠŒûêpinmux_i2c2_pins�Ž�ûòpinmux_i2c3_pins�’”ûöpinmux_twl4030_pins�°Aûìpinmux_gpio_key_pins�¦¬û%hdq_pins�–ûûpinmux_pwm_pins�ˆû)pinmux_led_pins�¨ªû#pinmux_mmc1_pins0�ûýpinmux_tsc2004_pins�Vûøpinmux_backlight_pins�Xû.pinmux_isp_pins`�ÜÞàâæèêìîðòôûpinmux_panel_pwr_pins�Zû+pinmux_dss_dpi_pins1°�¤¦¨ª¸º¼¾ÀÂÄÆÈÊÌÎÐ Ò Ô Ö Ø Ú ûpinmux_mm3_pins0�468:T^ûscm_conf@270sysconsimple-busœp0+ p0ûpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapœ°£pbias_mmc_omap2430ªpbias_mmc_omap2430¹w@Ñ-ÆÀûüclocks+clock@68 ti,clkselœhéclock-mcbsp5-mux-fckéti,composite-mux-clockömcbsp5_mux_fck  û clock-mcbsp3-mux-fckéti,composite-mux-clockömcbsp3_mux_fck  ûclock-mcbsp4-mux-fckéti,composite-mux-clockömcbsp4_mux_fck   ûmcbsp5_fckéti,composite-clock  û clock@4 ti,clkselœéclock-mcbsp1-mux-fckéti,composite-mux-clockömcbsp1_mux_fck  û clock-mcbsp2-mux-fckéti,composite-mux-clockömcbsp2_mux_fck   ûmcbsp1_fckéti,composite-clock  ûmcbsp2_fckéti,composite-clock ûmcbsp3_fckéti,composite-clock ûmcbsp4_fckéti,composite-clock û clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singleœ \+.?Trÿpinmux_twl4030_vpins �ûípinmux_gpio_key_pins_wkup� û&pinmux_lan9221_pins�Zûpinmux_mmc1_cd�Tûþpinmux_isp1763_pins�Xûtarget-module@480a6000ti,sysc-omap2ti,syscœH `DH `HH `Lrevsyscsyss  -; §ick+ H ` aes1@0 ti,omap3-aesœPH  Mtxrxtarget-module@480c5000ti,sysc-omap2ti,syscœH PDH PHH PLrevsyscsyss  -; §ick+ H P aes2@0 ti,omap3-aesœPHABMtxrxprm@48306000 ti,omap3-prmœH0`@ clocks+virt_16_8m_cké fixed-clockWYûosc_sys_ck@d40é ti,mux-clock œ @ûsys_ck@1270éti,divider-clock  gœprû"sys_clkout1@d70éti,gate-clock œ p dpll3_x2_ckéfixed-factor-clock ‰”dpll3_m2x2_ckéfixed-factor-clock ‰”û!dpll4_x2_ckéfixed-factor-clock  ‰”corex2_fckéfixed-factor-clock !‰”û#wkup_l4_ickéfixed-factor-clock "‰”ûbcorex2_d3_fckéfixed-factor-clock #‰”ûŠcorex2_d5_fckéfixed-factor-clock #‰”û‹clockdomainscm@48004000 ti,omap3-cmœH@@clocks+dummy_apb_pclké fixed-clockWomap_32k_fcké fixed-clockW€ûHvirt_12m_cké fixed-clockW·ûvirt_13m_cké fixed-clockWÆ]@ûvirt_19200000_cké fixed-clockW$øûvirt_26000000_cké fixed-clockWŒº€ûvirt_38_4m_cké fixed-clockWIðûdpll4_ck@d00éti,omap3-dpll-per-j-type-clock ""œ D 0û dpll4_m2_ck@d48éti,divider-clock  g?œ Hrû$dpll4_m2x2_mul_ckéfixed-factor-clock $‰”û%dpll4_m2x2_ck@d00éti,hsdiv-gate-clock % œ žû&omap_96m_alwon_fckéfixed-factor-clock &‰”û2dpll3_ck@d00éti,omap3-dpll-core-clock ""œ @ 0ûclock@1140 ti,clkselœ@éclock-dpll3-m3éti,divider-clock ödpll3_m3_ck  grû,clock-dpll4-m6éti,divider-clock ödpll4_m6_ck   g?rû>clock-emu-src-muxé ti,mux-clocköemu_src_mux_ck "'()ûvclock-pclk-fckéti,divider-clock öpclk_fck * grclock-pclkx2-fckéti,divider-clock öpclkx2_fck * grclock-atclk-fckéti,divider-clock öatclk_fck * grclock-traceclk-src-fcké ti,mux-clockötraceclk_src_fck "'() û+clock-traceclk-fckéti,divider-clock ötraceclk_fck + grdpll3_m3x2_mul_ckéfixed-factor-clock ,‰”û-dpll3_m3x2_ck@d00éti,hsdiv-gate-clock - œ žû.emu_core_alwon_ckéfixed-factor-clock .‰”û'sys_altclké fixed-clockWû5mcbsp_clksé fixed-clockWûcore_ckéfixed-factor-clock ‰”û/dpll1_fck@940éti,divider-clock / gœ @rû0dpll1_ck@904éti,omap3-dpll-clock "0œ  $ @ 4ûdpll1_x2_ckéfixed-factor-clock ‰”û1dpll1_x2m2_ck@944éti,divider-clock 1gœ DrûEcm_96m_fckéfixed-factor-clock 2‰”û3clock@d40 ti,clkselœ @éclock-dpll3-m2éti,divider-clock ödpll3_m2_ck  grûclock-omap-96m-fcké ti,mux-clock öomap_96m_fck 3" ûYclock-omap-54m-fcké ti,mux-clock öomap_54m_fck 45 ûAclock-omap-48m-fcké ti,mux-clock öomap_48m_fck 65 û9clock@e40 ti,clkselœ@éclock-dpll4-m3éti,divider-clock ödpll4_m3_ck   g rû7clock-dpll4-m4éti,divider-clock ödpll4_m4_ck  grû:dpll4_m3x2_mul_ckéfixed-factor-clock 7‰”û8dpll4_m3x2_ck@d00éti,hsdiv-gate-clock 8 œ žû4cm_96m_d2_fckéfixed-factor-clock 3‰”û6omap_12m_fckéfixed-factor-clock 9‰”ûZdpll4_m4x2_mul_ckéti,fixed-factor-clock :´ÂÏû;dpll4_m4x2_ck@d00éti,gate-clock ; œ žÏû^dpll4_m5_ck@f40éti,divider-clock  g?œ@rû<dpll4_m5x2_mul_ckéti,fixed-factor-clock <´ÂÏû=dpll4_m5x2_ck@d00éti,hsdiv-gate-clock = œ žÏûzdpll4_m6x2_mul_ckéfixed-factor-clock >‰”û?dpll4_m6x2_ck@d00éti,hsdiv-gate-clock ? œ žû@emu_per_alwon_ckéfixed-factor-clock @‰”û(clock@d70 ti,clkselœ péclock-clkout2-src-gateé ti,composite-no-wait-gate-clocköclkout2_src_gate_ck / ûCclock-clkout2-src-muxéti,composite-mux-clocköclkout2_src_mux_ck /"3AûDclock-sys-clkout2éti,divider-clock ösys_clkout2 B g@âclkout2_src_ckéti,composite-clock CDûBmpu_ckéfixed-factor-clock E‰”ûFarm_fck@924éti,divider-clock Fœ $gemu_mpu_alwon_ckéfixed-factor-clock F‰”û)clock@a40 ti,clkselœ @éclock-l3-ickéti,divider-clocköl3_ick /grûGclock-l4-ickéti,divider-clocköl4_ick G grûIclock-gpt10-mux-fckéti,composite-mux-clockögpt10_mux_fck H" ûVclock-gpt11-mux-fckéti,composite-mux-clockögpt11_mux_fck H" ûXclock-ssi-ssr-div-fck-3430es2éti,composite-divider-clockössi_ssr_div_fck_3430es2 # $øûclock@c40 ti,clkselœ @éclock-rm-ickéti,divider-clockörm_ick I grclock-gpt1-mux-fckéti,composite-mux-clock ögpt1_mux_fck H"ûaclock-usim-mux-fckéti,composite-mux-clock öusim_mux_fck( "JKLMNOPQR rûƒclock@a00 ti,clkselœ éclock-gpt10-gate-fckéti,composite-gate-clockögpt10_gate_fck " ûUclock-gpt11-gate-fckéti,composite-gate-clockögpt11_gate_fck " ûWclock-mmchs2-fckéti,wait-gate-clock ömmchs2_fck  û¹clock-mmchs1-fckéti,wait-gate-clock ömmchs1_fck  ûºclock-i2c3-fckéti,wait-gate-clock öi2c3_fck  û»clock-i2c2-fckéti,wait-gate-clock öi2c2_fck  û¼clock-i2c1-fckéti,wait-gate-clock öi2c1_fck  û½clock-mcbsp5-gate-fckéti,composite-gate-clockömcbsp5_gate_fck  û clock-mcbsp1-gate-fckéti,composite-gate-clockömcbsp1_gate_fck  û clock-mcspi4-fckéti,wait-gate-clock ömcspi4_fck S û¾clock-mcspi3-fckéti,wait-gate-clock ömcspi3_fck S û¿clock-mcspi2-fckéti,wait-gate-clock ömcspi2_fck S ûÀclock-mcspi1-fckéti,wait-gate-clock ömcspi1_fck S ûÁclock-uart2-fckéti,wait-gate-clock öuart2_fck S ûÂclock-uart1-fckéti,wait-gate-clock öuart1_fck S ûÃclock-hdq-fckéti,wait-gate-clocköhdq_fck T ûÄclock-modem-fckéti,omap3-interface-clock ömodem_fck " ûàclock-mspro-fckéti,wait-gate-clock ömspro_fck  clock-ssi-ssr-gate-fck-3430es2é ti,composite-no-wait-gate-clockössi_ssr_gate_fck_3430es2 # û~clock-mmchs3-fckéti,wait-gate-clock ömmchs3_fck  ûÜgpt10_fckéti,composite-clock UVgpt11_fckéti,composite-clock WXcore_96m_fckéfixed-factor-clock Y‰”ûcore_48m_fckéfixed-factor-clock 9‰”ûScore_12m_fckéfixed-factor-clock Z‰”ûTcore_l3_ickéfixed-factor-clock G‰”û[clock@a10 ti,clkselœ éclock-sdrc-ickéti,wait-gate-clock ösdrc_ick [ ûŽclock-mmchs2-ickéti,omap3-interface-clock ömmchs2_ick \ ûÅclock-mmchs1-ickéti,omap3-interface-clock ömmchs1_ick \ ûÆclock-hdq-ickéti,omap3-interface-clocköhdq_ick \ ûÇclock-mcspi4-ickéti,omap3-interface-clock ömcspi4_ick \ ûÈclock-mcspi3-ickéti,omap3-interface-clock ömcspi3_ick \ ûÉclock-mcspi2-ickéti,omap3-interface-clock ömcspi2_ick \ ûÊclock-mcspi1-ickéti,omap3-interface-clock ömcspi1_ick \ ûËclock-i2c3-ickéti,omap3-interface-clock öi2c3_ick \ ûÌclock-i2c2-ickéti,omap3-interface-clock öi2c2_ick \ ûÍclock-i2c1-ickéti,omap3-interface-clock öi2c1_ick \ ûÎclock-uart2-ickéti,omap3-interface-clock öuart2_ick \ ûÏclock-uart1-ickéti,omap3-interface-clock öuart1_ick \ ûÐclock-gpt11-ickéti,omap3-interface-clock ögpt11_ick \ ûÑclock-gpt10-ickéti,omap3-interface-clock ögpt10_ick \ ûÒclock-mcbsp5-ickéti,omap3-interface-clock ömcbsp5_ick \ ûÓclock-mcbsp1-ickéti,omap3-interface-clock ömcbsp1_ick \ ûÔclock-omapctrl-ickéti,omap3-interface-clock öomapctrl_ick \ ûÕclock-aes2-ickéti,omap3-interface-clock öaes2_ick \ ûclock-sha12-ickéti,omap3-interface-clock ösha12_ick \ ûÖclock-icr-ickéti,omap3-interface-clocköicr_ick \ clock-des2-ickéti,omap3-interface-clock ödes2_ick \ clock-mspro-ickéti,omap3-interface-clock ömspro_ick \ clock-mailboxes-ickéti,omap3-interface-clockömailboxes_ick \ clock-sad2d-ickéti,omap3-interface-clock ösad2d_ick G ûáclock-hsotgusb-ick-3430es2é"ti,omap3-hsotgusb-interface-clocköhsotgusb_ick_3430es2 [ û�clock-ssi-ick-3430es2éti,omap3-ssi-interface-clockössi_ick_3430es2 ] ûclock-mmchs3-ickéti,omap3-interface-clock ömmchs3_ick \ ûÛgpmc_fckéfixed-factor-clock [‰”core_l4_ickéfixed-factor-clock I‰”û\clock@e00 ti,clkselœéclock-dss-tv-fckéti,gate-clock ödss_tv_fck A û´clock-dss-96m-fckéti,gate-clock ödss_96m_fck Y ûµclock-dss2-alwon-fckéti,gate-clocködss2_alwon_fck " û¶clock-dss1-alwon-fck-3430es2éti,dss-gate-clocködss1_alwon_fck_3430es2 ^ Ïû·dummy_cké fixed-clockWclock@c00 ti,clkselœ éclock-gpt1-gate-fckéti,composite-gate-clockögpt1_gate_fck " û`clock-gpio1-dbckéti,gate-clock ögpio1_dbck _ û«clock-wdt2-fckéti,wait-gate-clock öwdt2_fck _ û¬clock-sr1-fckéti,wait-gate-clockösr1_fck " ûclock-sr2-fckéti,wait-gate-clockösr2_fck " ûclock-usim-gate-fckéti,composite-gate-clocköusim_gate_fck Y û‚gpt1_fckéti,composite-clock `aû wkup_32k_fckéfixed-factor-clock H‰”û_clock@c10 ti,clkselœ éclock-wdt2-ickéti,omap3-interface-clock öwdt2_ick b û­clock-wdt1-ickéti,omap3-interface-clock öwdt1_ick b û®clock-gpio1-ickéti,omap3-interface-clock ögpio1_ick b û¯clock-omap-32ksync-ickéti,omap3-interface-clocköomap_32ksync_ick b û°clock-gpt12-ickéti,omap3-interface-clock ögpt12_ick b û±clock-gpt1-ickéti,omap3-interface-clock ögpt1_ick b û²clock-usim-ickéti,omap3-interface-clock öusim_ick b û³per_96m_fckéfixed-factor-clock 2‰”û per_48m_fckéfixed-factor-clock 9‰”ûcclock@1000 ti,clkselœéclock-uart3-fckéti,wait-gate-clock öuart3_fck c û�clock-gpt2-gate-fckéti,composite-gate-clockögpt2_gate_fck " ûeclock-gpt3-gate-fckéti,composite-gate-clockögpt3_gate_fck " ûgclock-gpt4-gate-fckéti,composite-gate-clockögpt4_gate_fck " ûiclock-gpt5-gate-fckéti,composite-gate-clockögpt5_gate_fck " ûkclock-gpt6-gate-fckéti,composite-gate-clockögpt6_gate_fck " ûmclock-gpt7-gate-fckéti,composite-gate-clockögpt7_gate_fck " ûoclock-gpt8-gate-fckéti,composite-gate-clockögpt8_gate_fck " ûqclock-gpt9-gate-fckéti,composite-gate-clockögpt9_gate_fck " ûsclock-gpio6-dbckéti,gate-clock ögpio6_dbck d û‘clock-gpio5-dbckéti,gate-clock ögpio5_dbck d û’clock-gpio4-dbckéti,gate-clock ögpio4_dbck d û“clock-gpio3-dbckéti,gate-clock ögpio3_dbck d û”clock-gpio2-dbckéti,gate-clock ögpio2_dbck d û•clock-wdt3-fckéti,wait-gate-clock öwdt3_fck d û–clock-mcbsp2-gate-fckéti,composite-gate-clockömcbsp2_gate_fck  ûclock-mcbsp3-gate-fckéti,composite-gate-clockömcbsp3_gate_fck  ûclock-mcbsp4-gate-fckéti,composite-gate-clockömcbsp4_gate_fck  ûclock-uart4-fckéti,wait-gate-clock öuart4_fck c ûªclock@1040 ti,clkselœ@éclock-gpt2-mux-fckéti,composite-mux-clock ögpt2_mux_fck H"ûfclock-gpt3-mux-fckéti,composite-mux-clock ögpt3_mux_fck H" ûhclock-gpt4-mux-fckéti,composite-mux-clock ögpt4_mux_fck H" ûjclock-gpt5-mux-fckéti,composite-mux-clock ögpt5_mux_fck H" ûlclock-gpt6-mux-fckéti,composite-mux-clock ögpt6_mux_fck H" ûnclock-gpt7-mux-fckéti,composite-mux-clock ögpt7_mux_fck H" ûpclock-gpt8-mux-fckéti,composite-mux-clock ögpt8_mux_fck H" ûrclock-gpt9-mux-fckéti,composite-mux-clock ögpt9_mux_fck H" ûtgpt2_fckéti,composite-clock efû gpt3_fckéti,composite-clock ghgpt4_fckéti,composite-clock ijgpt5_fckéti,composite-clock klgpt6_fckéti,composite-clock mngpt7_fckéti,composite-clock opgpt8_fckéti,composite-clock qrgpt9_fckéti,composite-clock stper_32k_alwon_fckéfixed-factor-clock H‰”ûdper_l4_ickéfixed-factor-clock I‰”ûuclock@1010 ti,clkselœéclock-gpio6-ickéti,omap3-interface-clock ögpio6_ick u û—clock-gpio5-ickéti,omap3-interface-clock ögpio5_ick u û˜clock-gpio4-ickéti,omap3-interface-clock ögpio4_ick u û™clock-gpio3-ickéti,omap3-interface-clock ögpio3_ick u ûšclock-gpio2-ickéti,omap3-interface-clock ögpio2_ick u û›clock-wdt3-ickéti,omap3-interface-clock öwdt3_ick u ûœclock-uart3-ickéti,omap3-interface-clock öuart3_ick u û�clock-uart4-ickéti,omap3-interface-clock öuart4_ick u ûžclock-gpt9-ickéti,omap3-interface-clock ögpt9_ick u ûŸclock-gpt8-ickéti,omap3-interface-clock ögpt8_ick u û clock-gpt7-ickéti,omap3-interface-clock ögpt7_ick u û¡clock-gpt6-ickéti,omap3-interface-clock ögpt6_ick u û¢clock-gpt5-ickéti,omap3-interface-clock ögpt5_ick u û£clock-gpt4-ickéti,omap3-interface-clock ögpt4_ick u û¤clock-gpt3-ickéti,omap3-interface-clock ögpt3_ick u û¥clock-gpt2-ickéti,omap3-interface-clock ögpt2_ick u û¦clock-mcbsp2-ickéti,omap3-interface-clock ömcbsp2_ick u û§clock-mcbsp3-ickéti,omap3-interface-clock ömcbsp3_ick u û¨clock-mcbsp4-ickéti,omap3-interface-clock ömcbsp4_ick u û©emu_src_ckéti,clkdm-gate-clock vû*secure_32k_fcké fixed-clockW€ûwgpt12_fckéfixed-factor-clock w‰”û wdt1_fckéfixed-factor-clock w‰”security_l4_ick2éfixed-factor-clock I‰”ûxclock@a14 ti,clkselœ éclock-aes1-ickéti,omap3-interface-clock öaes1_ick x ûclock-rng-ickéti,omap3-interface-clockörng_ick x ûclock-sha11-ickéti,omap3-interface-clock ösha11_ick x clock-des1-ickéti,omap3-interface-clock ödes1_ick x clock-pka-ickéti,omap3-interface-clocköpka_ick y clock@f00 ti,clkselœéclock-cam-mclkéti,gate-clock öcam_mclk z Ïclock-csi2-96m-fckéti,gate-clock öcsi2_96m_fck  ûÞcam_ick@f10é!ti,omap3-no-wait-interface-clock Iœ ûÝsecurity_l3_ickéfixed-factor-clock G‰”ûyssi_l4_ickéfixed-factor-clock I‰”û]sr_l4_ickéfixed-factor-clock I‰”dpll2_fck@40éti,divider-clock / gœ@rû{dpll2_ck@4éti,omap3-dpll-clock "{œ$@4û|dpll2_m2_ck@44éti,divider-clock |gœDrû}iva2_ck@0éti,wait-gate-clock }œ ûßclock@a18 ti,clkselœ éclock-mad2d-ickéti,omap3-interface-clock ömad2d_ick G ûâclock-usbtll-ickéti,omap3-interface-clock öusbtll_ick \ ûÚssi_ssr_fck_3430es2éti,composite-clock ~û€ssi_sst_fck_3430es2éfixed-factor-clock €‰”ûsys_d2_ckéfixed-factor-clock "‰”ûJomap_96m_d2_fckéfixed-factor-clock Y‰”ûKomap_96m_d4_fckéfixed-factor-clock Y‰”ûLomap_96m_d8_fckéfixed-factor-clock Y‰”ûMomap_96m_d10_fckéfixed-factor-clock Y‰” ûNdpll5_m2_d4_ckéfixed-factor-clock �‰”ûOdpll5_m2_d8_ckéfixed-factor-clock �‰”ûPdpll5_m2_d16_ckéfixed-factor-clock �‰”ûQdpll5_m2_d20_ckéfixed-factor-clock �‰”ûRusim_fckéti,composite-clock ‚ƒdpll5_ck@d04éti,omap3-dpll-clock ""œ  $ L 4û„dpll5_m2_ck@d50éti,divider-clock „gœ Prû�sgx_gate_fck@b00éti,composite-gate-clock / œ ûŒcore_d3_ckéfixed-factor-clock /‰”û…core_d4_ckéfixed-factor-clock /‰”û†core_d6_ckéfixed-factor-clock /‰”û‡omap_192m_alwon_fckéfixed-factor-clock &‰”ûˆcore_d2_ckéfixed-factor-clock /‰”û‰sgx_mux_fck@b40éti,composite-mux-clock  …†‡3ˆ‰Š‹œ @û�sgx_fckéti,composite-clock Œ�ûsgx_ick@b10éti,wait-gate-clock Gœ  ûãcpefuse_fck@a08éti,gate-clock "œ  û×ts_fck@a08éti,gate-clock Hœ  ûØusbtll_fck@a08éti,wait-gate-clock �œ  ûÙdss_ick_3430es2@e10éti,omap3-dss-interface-clock Iœ û¸usbhost_120m_fck@1400éti,gate-clock �œ ûäusbhost_48m_fck@1400éti,dss-gate-clock 9œ ûåusbhost_ick@1410éti,omap3-dss-interface-clock Iœ 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