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#address-cells#size-cellsmodelcompatiblestdout-pathethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usb0usb1usb2usb3usbphy0usbphy1ipu1spi4led0led1nand#clock-cellsclock-frequencygprstatusclocksclock-namesregremote-endpointphandleinterrupt-parentinterrupts#phy-cellsrangesinterrupt-names#dma-cellsdma-channelsreg-namesdmasdma-namespinctrl-namespinctrl-0ddc-i2c-buspower-domains#cooling-cells#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridedevice_typebus-rangenum-lanesinterrupt-map-maskinterrupt-mapreset-gpio#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsfsl,stop-modegpio-controller#gpio-cellsgpio-rangesfsl,ext-reset-outputregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonnvmem-cellsnvmem-cell-names#thermal-sensor-cellsfsl,anatopregmapvaluelinux,keycodewakeup-source#reset-cells#power-domain-cellspower-supply#mux-control-cellsmux-reg-masksmux-controlsbus-widthfsl,pinsfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_modephy_type#index-cellspinctrl-1pinctrl-2cd-gpiosgw,modelabelpagesizest,drdy-int-pinlltc,fb-voltage-dividerregulator-ramp-delayregulator-boot-onpowerdown-gpiosfsl,weim-cs-gprnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplypu-supplysoc-supplyportslinux,codedefault-statelinux,default-triggerenable-active-high