Ð þíü­8ò(( …ñð!ti,am3517-evmti,am3517ti,omap3 +&7TI AM3517 EVM (AM3517/05 TMDSEVM3517)chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000/ocp@68000000/serial@4809e000‡/ocp@68000000/can@5c050000 ‹/display@0cpus+cpu@0arm,cortex-a8”cpu ¤«cpu·“àÅÙpmu@54000000arm,cortex-a8-pmu T€åðdebugsssocti,omap-inframpu ti,omap3-mpuðmpuiva ti,iva2.2ðiva údisableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus hå +ðl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus  +  pinmux@30 ti,omap3-padconfpinctrl-single 08+(=[ÿpinmux_i2c1_pinsxŠŒŒÑpinmux_wl12xx_buffer_pinsx&Œðpinmux_mmc2_pinsXx(*,.02468:–ŒÜpinmux_rtc_pinsx†ŒÒpinmux_tsc2004_pinsx¢ŒÔpinmux_uart2_pins(xDFHJˆŒÏpinmux_mcbsp1_pins x`bfhŒàpinmux_mcbsp2_pins x Œâpinmux_ethernet_pinsPxÎÐÒÔÖØÚÜÞàŒípinmux_i2c2_pinsxŽ�ŒÖpinmux_i2c3_pinsx’”Œ×pinmux_mmc1_pins@x "ŒÙpinmux_pwm_pinsx¬Œpinmux_backlight_pinsx®Œpinmux_dss_dpi_pins¨x¢¤¦¨ª¬®°²´¶¸º¼¾ÀÂÄÆÈÊŒëpinmux_hsusb1_rst_pinsxŠŒscm_conf@270sysconsimple-bus p0+ p0Œpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap °”pbias_mmc_omap2430›pbias_mmc_omap2430ªw@Â-ÆÀŒØclocks+clock@68 ti,clksel hÚclock-mcbsp5-mux-fckÚti,composite-mux-clockçmcbsp5_mux_fck¤úŒ clock-mcbsp3-mux-fckÚti,composite-mux-clockçmcbsp3_mux_fck¤Œclock-mcbsp4-mux-fckÚti,composite-mux-clockçmcbsp4_mux_fck¤úŒmcbsp5_fckÚti,composite-clock¤ Œåclock@4 ti,clksel Úclock-mcbsp1-mux-fckÚti,composite-mux-clockçmcbsp1_mux_fck¤úŒ clock-mcbsp2-mux-fckÚti,composite-mux-clockçmcbsp2_mux_fck¤úŒmcbsp1_fckÚti,composite-clock¤ Œßmcbsp2_fckÚti,composite-clock¤ Œámcbsp3_fckÚti,composite-clock¤Œãmcbsp4_fckÚti,composite-clock¤Œäemac_ick@32cÚti,am35xx-gate-clock¤ ,úŒyemac_fck@32cÚti,gate-clock¤ ,ú Œîvpfe_ick@32cÚti,am35xx-gate-clock¤ ,úŒzvpfe_fck@32cÚti,gate-clock¤ ,ú hsotgusb_ick_am35xx@32cÚti,am35xx-gate-clock¤ ,úŒ{hsotgusb_fck_am35xx@32cÚti,gate-clock¤ ,úŒ|hecc_ck@32cÚti,am35xx-gate-clock¤ ,úŒ}clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single  \+(=[ÿpinmux_wl12xx_wkup_pinsx Œópinmux_leds_pinsx$&Œþprm@48306000 ti,omap3-prm H0`@å clocks+virt_16_8m_ckÚ fixed-clockYŒosc_sys_ck@d40Ú ti,mux-clock¤  @Œsys_ck@1270Úti,divider-clock¤ú p"Œsys_clkout1@d70Úti,gate-clock¤  púdpll3_x2_ckÚfixed-factor-clock¤9Ddpll3_m2x2_ckÚfixed-factor-clock¤9DŒ!dpll4_x2_ckÚfixed-factor-clock¤ 9Dcorex2_fckÚfixed-factor-clock¤!9DŒ"wkup_l4_ickÚfixed-factor-clock¤9DŒWcorex2_d3_fckÚfixed-factor-clock¤"9DŒscorex2_d5_fckÚfixed-factor-clock¤"9DŒtclockdomainscm@48004000 ti,omap3-cm H@@clocks+dummy_apb_pclkÚ fixed-clockomap_32k_fckÚ fixed-clock€ŒGvirt_12m_ckÚ fixed-clock·Œvirt_13m_ckÚ fixed-clockÆ]@Œvirt_19200000_ckÚ fixed-clock$øŒvirt_26000000_ckÚ fixed-clockŒº€Œvirt_38_4m_ckÚ fixed-clockIðŒdpll4_ck@d00Úti,omap3-dpll-per-clock¤  D 0Œ dpll4_m2_ck@d48Úti,divider-clock¤ ?  H"Œ#dpll4_m2x2_mul_ckÚfixed-factor-clock¤#9DŒ$dpll4_m2x2_ck@d00Úti,gate-clock¤$ú  NŒ%omap_96m_alwon_fckÚfixed-factor-clock¤%9DŒ1dpll3_ck@d00Úti,omap3-dpll-core-clock¤  @ 0Œclock@1140 ti,clksel @Úclock-dpll3-m3Úti,divider-clock çdpll3_m3_ck¤ú"Œ+clock-dpll4-m6Úti,divider-clock çdpll4_m6_ck¤ ú?"Œ=clock-emu-src-muxÚ ti,mux-clockçemu_src_mux_ck¤&'(Œkclock-pclk-fckÚti,divider-clock çpclk_fck¤)ú"clock-pclkx2-fckÚti,divider-clock çpclkx2_fck¤)ú"clock-atclk-fckÚti,divider-clock çatclk_fck¤)ú"clock-traceclk-src-fckÚ ti,mux-clockçtraceclk_src_fck¤&'(úŒ*clock-traceclk-fckÚti,divider-clock çtraceclk_fck¤*ú "dpll3_m3x2_mul_ckÚfixed-factor-clock¤+9DŒ,dpll3_m3x2_ck@d00Úti,gate-clock¤,ú   NŒ-emu_core_alwon_ckÚfixed-factor-clock¤-9DŒ&sys_altclkÚ fixed-clockŒ4mcbsp_clksÚ fixed-clockŒcore_ckÚfixed-factor-clock¤9DŒ.dpll1_fck@940Úti,divider-clock¤.ú  @"Œ/dpll1_ck@904Úti,omap3-dpll-clock¤/   $ @ 4Œdpll1_x2_ckÚfixed-factor-clock¤9DŒ0dpll1_x2m2_ck@944Úti,divider-clock¤0  D"ŒDcm_96m_fckÚfixed-factor-clock¤19DŒ2clock@d40 ti,clksel  @Úclock-dpll3-m2Úti,divider-clock çdpll3_m2_ck¤ú"Œclock-omap-96m-fckÚ ti,mux-clock çomap_96m_fck¤2úŒOclock-omap-54m-fckÚ ti,mux-clock çomap_54m_fck¤34úŒ@clock-omap-48m-fckÚ ti,mux-clock çomap_48m_fck¤54úŒ8clock@e40 ti,clksel @Úclock-dpll4-m3Úti,divider-clock çdpll4_m3_ck¤ ú "Œ6clock-dpll4-m4Úti,divider-clock çdpll4_m4_ck¤ "Œ9dpll4_m3x2_mul_ckÚfixed-factor-clock¤69DŒ7dpll4_m3x2_ck@d00Úti,gate-clock¤7ú  NŒ3cm_96m_d2_fckÚfixed-factor-clock¤29DŒ5omap_12m_fckÚfixed-factor-clock¤89DŒPdpll4_m4x2_mul_ckÚti,fixed-factor-clock¤9drŒ:dpll4_m4x2_ck@d00Úti,gate-clock¤:ú  NŒSdpll4_m5_ck@f40Úti,divider-clock¤ ? @"Œ;dpll4_m5x2_mul_ckÚti,fixed-factor-clock¤;drŒ<dpll4_m5x2_ck@d00Úti,gate-clock¤<ú  Ndpll4_m6x2_mul_ckÚfixed-factor-clock¤=9DŒ>dpll4_m6x2_ck@d00Úti,gate-clock¤>ú  NŒ?emu_per_alwon_ckÚfixed-factor-clock¤?9DŒ'clock@d70 ti,clksel  pÚclock-clkout2-src-gateÚ ti,composite-no-wait-gate-clockçclkout2_src_gate_ck¤.úŒBclock-clkout2-src-muxÚti,composite-mux-clockçclkout2_src_mux_ck¤.2@ŒCclock-sys-clkout2Úti,divider-clock çsys_clkout2¤Aú@’clkout2_src_ckÚti,composite-clock¤BCŒAmpu_ckÚfixed-factor-clock¤D9DŒEarm_fck@924Úti,divider-clock¤E  $emu_mpu_alwon_ckÚfixed-factor-clock¤E9DŒ(clock@a40 ti,clksel  @Úclock-l3-ickÚti,divider-clockçl3_ick¤."ŒFclock-l4-ickÚti,divider-clockçl4_ick¤Fú"ŒHclock-gpt10-mux-fckÚti,composite-mux-clockçgpt10_mux_fck¤GúŒLclock-gpt11-mux-fckÚti,composite-mux-clockçgpt11_mux_fck¤GúŒNclock@c40 ti,clksel  @Úclock-rm-ickÚti,divider-clockçrm_ick¤Hú"clock-gpt1-mux-fckÚti,composite-mux-clock çgpt1_mux_fck¤GŒVclock@a00 ti,clksel  Úclock-gpt10-gate-fckÚti,composite-gate-clockçgpt10_gate_fck¤ú ŒKclock-gpt11-gate-fckÚti,composite-gate-clockçgpt11_gate_fck¤ú ŒMclock-mmchs2-fckÚti,wait-gate-clock çmmchs2_fck¤úŒ¥clock-mmchs1-fckÚti,wait-gate-clock çmmchs1_fck¤úŒ¦clock-i2c3-fckÚti,wait-gate-clock çi2c3_fck¤úŒ§clock-i2c2-fckÚti,wait-gate-clock çi2c2_fck¤úŒ¨clock-i2c1-fckÚti,wait-gate-clock çi2c1_fck¤úŒ©clock-mcbsp5-gate-fckÚti,composite-gate-clockçmcbsp5_gate_fck¤ú Œ clock-mcbsp1-gate-fckÚti,composite-gate-clockçmcbsp1_gate_fck¤ú Œ clock-mcspi4-fckÚti,wait-gate-clock çmcspi4_fck¤IúŒªclock-mcspi3-fckÚti,wait-gate-clock çmcspi3_fck¤IúŒ«clock-mcspi2-fckÚti,wait-gate-clock çmcspi2_fck¤IúŒ¬clock-mcspi1-fckÚti,wait-gate-clock çmcspi1_fck¤IúŒ­clock-uart2-fckÚti,wait-gate-clock çuart2_fck¤IúŒ®clock-uart1-fckÚti,wait-gate-clock çuart1_fck¤Iú Œ¯clock-hdq-fckÚti,wait-gate-clockçhdq_fck¤JúŒ°clock-uart4-fck-am35xxÚti,wait-gate-clockçuart4_fck_am35xx¤Iúclock-mmchs3-fckÚti,wait-gate-clock çmmchs3_fck¤úŒÉgpt10_fckÚti,composite-clock¤KLgpt11_fckÚti,composite-clock¤MNcore_96m_fckÚfixed-factor-clock¤O9DŒcore_48m_fckÚfixed-factor-clock¤89DŒIcore_12m_fckÚfixed-factor-clock¤P9DŒJcore_l3_ickÚfixed-factor-clock¤F9DŒQclock@a10 ti,clksel  Úclock-sdrc-ickÚti,wait-gate-clock çsdrc_ick¤QúŒxclock-mmchs2-ickÚti,omap3-interface-clock çmmchs2_ick¤RúŒ±clock-mmchs1-ickÚti,omap3-interface-clock çmmchs1_ick¤RúŒ²clock-hdq-ickÚti,omap3-interface-clockçhdq_ick¤RúŒ³clock-mcspi4-ickÚti,omap3-interface-clock çmcspi4_ick¤RúŒ´clock-mcspi3-ickÚti,omap3-interface-clock çmcspi3_ick¤RúŒµclock-mcspi2-ickÚti,omap3-interface-clock çmcspi2_ick¤RúŒ¶clock-mcspi1-ickÚti,omap3-interface-clock çmcspi1_ick¤RúŒ·clock-i2c3-ickÚti,omap3-interface-clock çi2c3_ick¤RúŒ¸clock-i2c2-ickÚti,omap3-interface-clock çi2c2_ick¤RúŒ¹clock-i2c1-ickÚti,omap3-interface-clock çi2c1_ick¤RúŒºclock-uart2-ickÚti,omap3-interface-clock çuart2_ick¤RúŒ»clock-uart1-ickÚti,omap3-interface-clock çuart1_ick¤Rú Œ¼clock-gpt11-ickÚti,omap3-interface-clock çgpt11_ick¤Rú Œ½clock-gpt10-ickÚti,omap3-interface-clock çgpt10_ick¤Rú Œ¾clock-mcbsp5-ickÚti,omap3-interface-clock çmcbsp5_ick¤Rú Œ¿clock-mcbsp1-ickÚti,omap3-interface-clock çmcbsp1_ick¤Rú ŒÀclock-omapctrl-ickÚti,omap3-interface-clock çomapctrl_ick¤RúŒÁclock-aes2-ickÚti,omap3-interface-clock çaes2_ick¤RúŒÂclock-sha12-ickÚti,omap3-interface-clock çsha12_ick¤RúŒÃclock-ipss-ickÚti,am35xx-interface-clock çipss_ick¤QúŒclock-uart4-ick-am35xxÚti,omap3-interface-clockçuart4_ick_am35xx¤Rúclock-mmchs3-ickÚti,omap3-interface-clock çmmchs3_ick¤RúŒÈgpmc_fckÚfixed-factor-clock¤Q9Dcore_l4_ickÚfixed-factor-clock¤H9DŒRclock@e00 ti,clksel Úclock-dss-tv-fckÚti,gate-clock çdss_tv_fck¤@úŒ clock-dss-96m-fckÚti,gate-clock çdss_96m_fck¤OúŒ¡clock-dss2-alwon-fckÚti,gate-clockçdss2_alwon_fck¤úŒ¢clock-dss1-alwon-fck-3430es2Úti,dss-gate-clockçdss1_alwon_fck_3430es2¤SúŒ£dummy_ckÚ fixed-clockclock@c00 ti,clksel  Úclock-gpt1-gate-fckÚti,composite-gate-clockçgpt1_gate_fck¤úŒUclock-gpio1-dbckÚti,gate-clock çgpio1_dbck¤TúŒ˜clock-wdt2-fckÚti,wait-gate-clock çwdt2_fck¤TúŒ™gpt1_fckÚti,composite-clock¤UVŒæwkup_32k_fckÚfixed-factor-clock¤G9DŒTclock@c10 ti,clksel  Úclock-wdt2-ickÚti,omap3-interface-clock çwdt2_ick¤WúŒšclock-wdt1-ickÚti,omap3-interface-clock çwdt1_ick¤WúŒ›clock-gpio1-ickÚti,omap3-interface-clock çgpio1_ick¤WúŒœclock-omap-32ksync-ickÚti,omap3-interface-clockçomap_32ksync_ick¤WúŒ�clock-gpt12-ickÚti,omap3-interface-clock çgpt12_ick¤WúŒžclock-gpt1-ickÚti,omap3-interface-clock çgpt1_ick¤WúŒŸper_96m_fckÚfixed-factor-clock¤19DŒper_48m_fckÚfixed-factor-clock¤89DŒXclock@1000 ti,clksel Úclock-uart3-fckÚti,wait-gate-clock çuart3_fck¤Xú Œ~clock-gpt2-gate-fckÚti,composite-gate-clockçgpt2_gate_fck¤úŒZclock-gpt3-gate-fckÚti,composite-gate-clockçgpt3_gate_fck¤úŒ\clock-gpt4-gate-fckÚti,composite-gate-clockçgpt4_gate_fck¤úŒ^clock-gpt5-gate-fckÚti,composite-gate-clockçgpt5_gate_fck¤úŒ`clock-gpt6-gate-fckÚti,composite-gate-clockçgpt6_gate_fck¤úŒbclock-gpt7-gate-fckÚti,composite-gate-clockçgpt7_gate_fck¤úŒdclock-gpt8-gate-fckÚti,composite-gate-clockçgpt8_gate_fck¤ú Œfclock-gpt9-gate-fckÚti,composite-gate-clockçgpt9_gate_fck¤ú Œhclock-gpio6-dbckÚti,gate-clock çgpio6_dbck¤YúŒclock-gpio5-dbckÚti,gate-clock çgpio5_dbck¤YúŒ€clock-gpio4-dbckÚti,gate-clock çgpio4_dbck¤YúŒ�clock-gpio3-dbckÚti,gate-clock çgpio3_dbck¤YúŒ‚clock-gpio2-dbckÚti,gate-clock çgpio2_dbck¤Yú Œƒclock-wdt3-fckÚti,wait-gate-clock çwdt3_fck¤Yú Œ„clock-mcbsp2-gate-fckÚti,composite-gate-clockçmcbsp2_gate_fck¤úŒ clock-mcbsp3-gate-fckÚti,composite-gate-clockçmcbsp3_gate_fck¤úŒclock-mcbsp4-gate-fckÚti,composite-gate-clockçmcbsp4_gate_fck¤úŒclock@1040 ti,clksel @Úclock-gpt2-mux-fckÚti,composite-mux-clock çgpt2_mux_fck¤GŒ[clock-gpt3-mux-fckÚti,composite-mux-clock çgpt3_mux_fck¤GúŒ]clock-gpt4-mux-fckÚti,composite-mux-clock çgpt4_mux_fck¤GúŒ_clock-gpt5-mux-fckÚti,composite-mux-clock çgpt5_mux_fck¤GúŒaclock-gpt6-mux-fckÚti,composite-mux-clock çgpt6_mux_fck¤GúŒcclock-gpt7-mux-fckÚti,composite-mux-clock çgpt7_mux_fck¤GúŒeclock-gpt8-mux-fckÚti,composite-mux-clock çgpt8_mux_fck¤GúŒgclock-gpt9-mux-fckÚti,composite-mux-clock çgpt9_mux_fck¤GúŒigpt2_fckÚti,composite-clock¤Z[Œçgpt3_fckÚti,composite-clock¤\]gpt4_fckÚti,composite-clock¤^_gpt5_fckÚti,composite-clock¤`agpt6_fckÚti,composite-clock¤bcgpt7_fckÚti,composite-clock¤degpt8_fckÚti,composite-clock¤fggpt9_fckÚti,composite-clock¤hiper_32k_alwon_fckÚfixed-factor-clock¤G9DŒYper_l4_ickÚfixed-factor-clock¤H9DŒjclock@1010 ti,clksel Úclock-gpio6-ickÚti,omap3-interface-clock çgpio6_ick¤júŒ…clock-gpio5-ickÚti,omap3-interface-clock çgpio5_ick¤júŒ†clock-gpio4-ickÚti,omap3-interface-clock çgpio4_ick¤júŒ‡clock-gpio3-ickÚti,omap3-interface-clock çgpio3_ick¤júŒˆclock-gpio2-ickÚti,omap3-interface-clock çgpio2_ick¤jú Œ‰clock-wdt3-ickÚti,omap3-interface-clock çwdt3_ick¤jú ŒŠclock-uart3-ickÚti,omap3-interface-clock çuart3_ick¤jú Œ‹clock-uart4-ickÚti,omap3-interface-clock çuart4_ick¤júŒŒclock-gpt9-ickÚti,omap3-interface-clock çgpt9_ick¤jú Œ�clock-gpt8-ickÚti,omap3-interface-clock çgpt8_ick¤jú ŒŽclock-gpt7-ickÚti,omap3-interface-clock çgpt7_ick¤júŒ�clock-gpt6-ickÚti,omap3-interface-clock çgpt6_ick¤júŒ�clock-gpt5-ickÚti,omap3-interface-clock çgpt5_ick¤júŒ‘clock-gpt4-ickÚti,omap3-interface-clock çgpt4_ick¤júŒ’clock-gpt3-ickÚti,omap3-interface-clock çgpt3_ick¤júŒ“clock-gpt2-ickÚti,omap3-interface-clock çgpt2_ick¤júŒ”clock-mcbsp2-ickÚti,omap3-interface-clock çmcbsp2_ick¤júŒ•clock-mcbsp3-ickÚti,omap3-interface-clock çmcbsp3_ick¤júŒ–clock-mcbsp4-ickÚti,omap3-interface-clock çmcbsp4_ick¤júŒ—emu_src_ckÚti,clkdm-gate-clock¤kŒ)secure_32k_fckÚ fixed-clock€Œlgpt12_fckÚfixed-factor-clock¤l9DŒèwdt1_fckÚfixed-factor-clock¤l9Drmii_ckÚ fixed-clockúð€Œpclk_ckÚ fixed-clock›üÀŒdpll5_ck@d04Úti,omap3-dpll-clock¤   $ L 4¨ºŒmdpll5_m2_ck@d50Úti,divider-clock¤m  P"Œwsgx_gate_fck@b00Úti,composite-gate-clock¤.ú  Œucore_d3_ckÚfixed-factor-clock¤.9DŒncore_d4_ckÚfixed-factor-clock¤.9DŒocore_d6_ckÚfixed-factor-clock¤.9DŒpomap_192m_alwon_fckÚfixed-factor-clock¤%9DŒqcore_d2_ckÚfixed-factor-clock¤.9DŒrsgx_mux_fck@b40Úti,composite-mux-clock ¤nop2qrst  @Œvsgx_fckÚti,composite-clock¤uvŒïsgx_ick@b10Úti,wait-gate-clock¤F  úŒÊcpefuse_fck@a08Úti,gate-clock¤  úŒÄts_fck@a08Úti,gate-clock¤G  úŒÅusbtll_fck@a08Úti,wait-gate-clock¤w  úŒÆclock@a18 ti,clksel  Úclock-usbtll-ickÚti,omap3-interface-clock çusbtll_ick¤RúŒÇdss_ick_3430es2@e10Úti,omap3-dss-interface-clock¤H úŒ¤usbhost_120m_fck@1400Úti,gate-clock¤w úŒËusbhost_48m_fck@1400Úti,dss-gate-clock¤8 úŒÌusbhost_ick@1410Úti,omap3-dss-interface-clock¤H úŒÍclockdomainscore_l3_clkdmti,clockdomain¤xyz{|}dpll3_clkdmti,clockdomain¤dpll1_clkdmti,clockdomain¤per_clkdmti,clockdomainh¤~€�‚ƒ„…†‡ˆ‰Š‹Œ�Ž��‘’“”•–—emu_clkdmti,clockdomain¤)dpll4_clkdmti,clockdomain¤ wkup_clkdmti,clockdomain ¤˜™š›œ�žŸdss_clkdmti,clockdomain¤ ¡¢£¤core_l4_clkdmti,clockdomain”¤¥¦§¨©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉdpll5_clkdmti,clockdomain¤msgx_clkdmti,clockdomain¤Êusbhost_clkdmti,clockdomain ¤ËÌÍtarget-module@48320000ti,sysc-omap2ti,sysc H2H2 Ârevsysc̤T�«fckick+ H2counter@0ti,omap-counter32k  interrupt-controller@48200000ti,omap3-intc( H Œtarget-module@48056000ti,sysc-omap2ti,sysc H`H`,H`(ÂrevsyscsyssÚ# ç Ìõ¤Q«ick+ H`dma-controller@0ti,omap3430-sdmati,omap-sdma å  `ŒÎgpio@48310000ti,omap3-gpio H1åðgpio1'9I(Œôgpio@49050000ti,omap3-gpio Iåðgpio29I(ŒÐgpio@49052000ti,omap3-gpio I åðgpio39I(ŒÕgpio@49054000ti,omap3-gpio I@å ðgpio49I(ŒÛgpio@49056000ti,omap3-gpio I`å!ðgpio59I(Œñgpio@49058000ti,omap3-gpio I€å"ðgpio69I(ŒÞserial@4806a000ti,omap3-uart H  UHiÎ1Î2ntxrxðuart1Ülserial@4806c000ti,omap3-uart HÀUIiÎ3Î4ntxrxðuart2Ülxdefault†Ïbluetooth ti,wl1271-st �Ð�-ÆÀserial@49020000ti,omap3-uart IUJiÎ5Î6ntxrxðuart3Üli2c@48070000 ti,omap3-i2c H€å8+ði2c1xdefault†Ñ€s35390a@30 sii,s35390a 0xdefault†Ò UÐtps65023@48 ti,tps65023 HregulatorsVDCDC1 ›vdd_core§ªO€ÂO€ŒVDCDC2›vdd_io§ª2Z Â2Z ŒÓVDCDC3›vdd_1v8§ªw@Âw@ŒòLDO1 ›vdd_usb18§ªw@Âw@LDO2 ›vdd_usb33§ª2Z Â2Z tsc2004@4b ti,tsc2004 K»Óxdefault†Ô UÕÆÙìà,EU@i2c@48072000 ti,omap3-i2c H €å9+ði2c2xdefault†Ö€codec@1ati,tlv320aic23 púokayŒøcodec@1bti,tlv320aic23 púokayŒûgpio@21 ti,tca6416 !9I�ÓŒýi2c@48060000 ti,omap3-i2c H€å=+ði2c3xdefault†×€codec@1ati,tlv320aic23 púokaygpio@20 ti,tca6416  9I�ÓŒügpio@21 ti,tca6416 !9I�Ótvp5146@5c ti,tvp5146m2 \mailbox@48094000ti,omap3-mailboxðmailbox H @匘ª údisabledmbox-dsp ¼ Çspi@48098000ti,omap2-mcspi H €åA+ðmcspi1Ò@iÎ#Î$Î%Î&Î'Î(Î)Î* ntx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspi H  åB+ðmcspi2Ò iÎ+Î,Î-Î.ntx0rx0tx1rx1spi@480b8000ti,omap2-mcspi H €å[+ðmcspi3Ò iÎÎÎÎntx0rx0tx1rx1spi@480ba000ti,omap2-mcspi H  å0+ðmcspi4ÒiÎFÎGntx0rx01w@480b2000 ti,omap3-1w H å:ðhdq1wmmc@4809c000ti,omap3-hsmmc H ÀåSðmmc1àiÎ=Î>ntxrxíØúokayxdefault†ÙúÚ Û Ûmmc@480b4000ti,omap3-hsmmc H @åVðmmc2iÎ/Î0ntxrxUVúokayxdefault†ÜúÝ"0+wlcore@2 ti,wl1271  Þå CŒº€WŒº€mmc@480ad000ti,omap3-hsmmc H Ðå^ðmmc3iÎMÎNntxrx údisabledmmu@480bd400lti,omap2-iommu H Ô€åðmmu_ispy údisabledmmu@5d000000lti,omap2-iommu ]€åðmmu_iva údisabledwdt@48314000 ti,omap3-wdt H1@€ ðwd_timer2mcbsp@48074000ti,omap3-mcbsp H@ÿÂmpu å;< ‰commontxrx™€ðmcbsp1iÎÎ ntxrx¤ß«fckúokaypxdefault†àŒ÷target-module@480a0000ti,sysc-omap2ti,sysc H <H @H DÂrevsyscsyssÚÌõ«ick+ H  údisabledrng@0 ti,omap2-rng  å4mcbsp@49022000ti,omap3-mcbsp I ÿI€ÿ Âmpusidetoneå>?‰commontxrxsidetone™ðmcbsp2mcbsp2_sidetoneiÎ!Î"ntxrx¤á•«fckickúokaypxdefault†âŒúmcbsp@49024000ti,omap3-mcbsp I@ÿI ÿ ÂmpusidetoneåYZ‰commontxrxsidetone™€ðmcbsp3mcbsp3_sidetoneiÎÎntxrx¤ã–«fckick údisabledmcbsp@49026000ti,omap3-mcbsp I`ÿÂmpu å67 ‰commontxrx™€ðmcbsp4iÎÎntxrx¤ä«fckp údisabledmcbsp@48096000ti,omap3-mcbsp H `ÿÂmpu åQR ‰commontxrx™€ðmcbsp5iÎÎntxrx¤å«fck údisabledsham@480c3000ti,omap3-shamðsham H 0då1iÎEnrxtarget-module@48318000ti,sysc-omap2-timerti,sysc H1€H1€H1€ÂrevsyscsyssÚ' Ìõ¤æŸ«fckick+ H1€¨¼timer@0ti,omap3430-timer €¤æ«fckå%ÇÖæætarget-module@49032000ti,sysc-omap2-timerti,sysc I I I ÂrevsyscsyssÚ' Ìõ¤ç”«fckick+ I ¨¼timer@0ti,omap3430-timer å&Öçætimer@49034000ti,omap3430-timer I@å'ðtimer3timer@49036000ti,omap3430-timer I`å(ðtimer4timer@49038000ti,omap3430-timer I€å)ðtimer5ýtimer@4903a000ti,omap3430-timer I å*ðtimer6ýtimer@4903c000ti,omap3430-timer IÀå+ðtimer7ýtimer@4903e000ti,omap3430-timer Iàå,ðtimer8 ýtimer@49040000ti,omap3430-timer Iå-ðtimer9 timer@48086000ti,omap3430-timer H`å.ðtimer10 timer@48088000ti,omap3430-timer H€å/ðtimer11 Œtarget-module@48304000ti,sysc-omap2-timerti,sysc H0@H0@H0@ÂrevsyscsyssÚ' Ìõ¤èž«fckick+ H0@timer@0ti,omap3430-timer å_Çusbhstll@48062000 ti,usbhs-tll H åN ðusb_tll_hsusbhshost@48064000ti,usbhs-host H@ ðusb_host_hs+xdefault†é 'ehci-phyohci@48064400ti,ohci-omap3 HDåL2ehci@48064800 ti,ehci-omap HHåMJêgpmc@6e000000ti,omap3430-gpmcðgpmc nÐåiÎnrxtxO[+(9I0nand@0,0ti,omap2-nandmmicron,mt29f4g16abchch  |‹bch8›¬º,Ì,Þí",("61@@RQRb(tŒ+usb_otg_hs@480ab000ti,omap3-musb H °å\]‰mcdma ðusb_otg_hsž©±  údisableddss@48050000 ti,omap3-dss Húokay ðdss_core¤£«fck+xdefault†ëºÓÊÓdispc@48050400ti,omap3-dispc Hå ðdss_dispc¤£«fckencoder@4804fc00 ti,omap3-dsi HüHþ@Hÿ Âprotophypllå údisabled ðdss_dsi1¤£¢ «fcksys_clk+encoder@48050800ti,omap3-rfbi H údisabled ðdss_rfbi¤£¤«fckickencoder@48050c00ti,omap3-venc H  údisabled ðdss_venc¤ «fckportendpointÜììŒssi-controller@48058000 ti,omap3-ssiðssi údisabled H€H�ÂsysgddåG‰gdd_mpu+ssi-port@4805a000ti,omap3-ssi-port H H¨ÂtxrxåCDssi-port@4805b000ti,omap3-ssi-port H°H¸ÂtxrxåEFam35x_otg_hs@5c040000ti,omap3-musb ðam35x_otg_hs údisabled \åG‰mcethernet@5c000000ti,am3517-emac ðdavinci_emacúokay \åCDEF”÷1L ex¤y«ickxdefault†ímdio@5c030000ti,davinci_mdio ðdavinci_mdioúokay \ŠB@+¤î«fckserial@4809e000ti,omap3-uartðuart4 údisabled H àåTiÎ7Î6ntxrxÜlpinmux@480025d8 ti,omap3-padconfpinctrl-single H%Ø$+(=[ÿpinmux_hsusb1_pins`x  Œécan@5c050000ti,am3517-hecc údisabled \€\0€\ Âhecchecc-rammbxå¤}target-module@50000000ti,sysc-omap2ti,sysc PÂrev¤ïÊ«fckick+ P@opp-tableoperating-points-v2-ti-cpu”Œopp50-300000000“ᣚO€¨ÿÿÿÿÿÿÿÿ¹opp100-600000000“#ÃFšO€¨ÿÿÿÿÿÿÿÿwl12xx_bufregulator-fixed ›wl1271_bufªw@Âw@xdefault†ð Åñ§ÊòŒõwl12xx_vmmc2regulator-fixed›vwl1271ªw@Âw@xdefault†ó ÅôÕpæ§ÊõŒÝcodec1simple-audio-cardùtlv320aic23-hifi- MicrophoneMic InLineLine InLineLine OutI *Line OutLOUTLine OutROUTLLINEINLine InRLINEINLine InMICINMic In Di2s ]ö ösimple-audio-card,cpu ž÷simple-audio-card,codec žø ¨·Œöcodec2simple-audio-cardùtlv320aic23-hifi- MicrophoneMic InLineLine InLineLine OutI *Line OutLOUTLine OutROUTLLINEINLine InRLINEINLine InMICINMic In Di2s ]ù ùsimple-audio-card,cpu žúsimple-audio-card,codec žû ¨·Œùexpander-keysgpio-keys-polled ¿dkey-record ÍRecord —ükey-play ÍPlay ÓÏ —ükey-stop ÍStop Ó€ —ü key-fwd ÍFWD ÓÐ —ü key-rwd ÍRWD Ó¨ —ü key-shift ÍShift Ó* —ü key-mode ÍMode Ó< —ü key-menu ÍMenu Ó‹ —ükey-up ÍUp Óg —ükey-down ÍDown Ól —ümemory@80000000”memory €vmmcregulator-fixed ›vmmc_fixedª2Z Â2Z ŒÚgpio-keysgpio-keys-polled ¿dbutton-user ÍUser Push Button Ó —ýswitch-1 ÍUser Switch 1 Ó —ýswitch-2 ÍUser Switch 2 Ó —ý switch-3 ÍUser Switch 3 Ó —ý switch-4 ÍUser Switch 4 Ó —ý switch-5 ÍUser Switch 5 Ó —ý switch-6 ÍUser Switch 6 Ó —ý switch-7 ÍUser Switch 7 Ó —ýswitch-8 ÍUser Switch 8 Ó —ýgpio-leds gpio-ledsxdefault†þuser_led_1 Íam3517evm:green:user_led_1 —ý Þonuser_led_2 Íam3517evm:green:user_led_2 —ý Þonuser_led_3 Íam3517evm:green:user_led_3 —ô  ìmmc0user_led_4 Íam3517evm:green:user_led_4 —ô ìheartbeatdisplay@0newhaven,nhd-4.3-480272ef-atxl Í15 ÿ �Þ�ÓportendpointÜŒìbacklightpwm-backlightxdefault Ó† LK@,  (2<FPZd 0 �ÞŒÿpwm-11ti,omap-dmtimer-pwmxdefault† I S ^Œhsusb1_phyxdefault†usb-nop-xceiv nÐ zŒê compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3candisplay0device_typeregclocksclock-namesclock-latencyoperating-points-v2cpu0-supplyinterruptsti,hwmodsstatusranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesti,bit-shiftclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockreg-namesti,sysc-sidleti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendeddmasdma-namespinctrl-namespinctrl-0enable-gpiosmax-speedregulator-always-onvio-supplytouchscreen-fuzz-xtouchscreen-fuzz-ytouchscreen-fuzz-pressuretouchscreen-size-xtouchscreen-size-ytouchscreen-max-pressureti,x-plate-ohmsti,esd-recovery-timeout-ms#sound-dai-cellsvcc-supply#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthwp-gpioscd-gpiosnon-removablecap-power-off-cardref-clock-frequencytcxo-clock-frequency#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-sizeti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthmultipointnum-epsram-bitsvdds_dsi-supplyvdda_video-supplyremote-endpointdata-linesti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqopp-hzopp-microvoltopp-supported-hwopp-suspendgpiovin-supplystartup-delay-usenable-active-highsimple-audio-card,namesimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersound-daisystem-clock-frequencypoll-intervallabellinux,codedefault-statelinux,default-triggerbacklightpower-supplypwmsbrightness-levelsdefault-brightness-levelti,timers#pwm-cellsti,clock-sourcereset-gpios#phy-cells