Ð þíÏ8(»Ü!sophgo,huashan-pisophgo,cv1812h &Huashan Picpus,}x@cpu@0thead,c906riscv?cpuKO@bo|@�€œ€ ©riscv,sv39 ²rv64imafdc¼rv64i(Ëimafdczicntrzicsrzifenceizihpminterrupt-controllerriscv,cpu-intcàõoscillator fixed-clockosc_25m!.}x@soc simple-bus>O_clock-controller@3002000K f!sophgo,cv1810-clkgpio@3020000snps,dw-apb-gpioKgpio-controller@0snps,dw-apb-gpio-portm}‰ Kàõ�<gpio@3021000snps,dw-apb-gpioKgpio-controller@0snps,dw-apb-gpio-portm}‰ Kàõ�=gpio@3022000snps,dw-apb-gpioK gpio-controller@0snps,dw-apb-gpio-portm}‰ Kàõ�>gpio@3023000snps,dw-apb-gpioK0gpio-controller@0snps,dw-apb-gpio-portm}‰ Kàõ�?i2c@4000000snps,designware-i2cKf35 ›refpclk�1 §disabledi2c@4010000snps,designware-i2cKf36 ›refpclk�2 §disabledi2c@4020000snps,designware-i2cKf37 ›refpclk�3 §disabledi2c@4030000snps,designware-i2cKf38 ›refpclk�4 §disabledi2c@4040000snps,designware-i2cKf39 ›refpclk�5 §disabledserial@4140000snps,dw-apb-uartK�,fMN›baudclkapb_pclk®¸§okayserial@4150000snps,dw-apb-uartK�-fOP›baudclkapb_pclk®¸ §disabledserial@4160000snps,dw-apb-uartK�.fQR›baudclkapb_pclk®¸ §disabledserial@4170000snps,dw-apb-uartK�/fST›baudclkapb_pclk®¸ §disabledspi@4180000snps,dw-apb-ssiKf=> ›ssi_clkpclk�6 §disabledspi@4190000snps,dw-apb-ssiKf=? ›ssi_clkpclk�7 §disabledspi@41a0000snps,dw-apb-ssiKf=@ ›ssi_clkpclk�8 §disabledspi@41b0000snps,dw-apb-ssiKf=A ›ssi_clkpclk�9 §disabledserial@41c0000snps,dw-apb-uartK�0fUV›baudclkapb_pclk®¸ §disabledmmc@4310000sophgo,cv1800b-dwcmshcK1�$f ›corebus§okayÅÏØßçdma-controller@4330000snps,axi-dma-1.01aK3�f..›core-clkcfgr-clkòý   (9 §disabledinterrupt-controller@70000000KpI  àõ]e$sophgo,cv1812h-plicthead,c900-plictimer@74000000KtI&sophgo,cv1812h-clintthead,c900-clintmemory@80000000?memoryK€aliasesh/soc/gpio@3020000n/soc/gpio@3021000t/soc/gpio@3022000z/soc/gpio@3023000€/soc/serial@4140000ˆ/soc/serial@4150000�/soc/serial@4160000˜/soc/serial@4170000 /soc/serial@41c0000chosen¨serial0:115200n8reserved-memory_region@8fe00000K�à ´ #address-cells#size-cellscompatiblemodeltimebase-frequencydevice_typeregd-cache-block-sized-cache-setsd-cache-sizei-cache-block-sizei-cache-setsi-cache-sizemmu-typeriscv,isariscv,isa-baseriscv,isa-extensionsinterrupt-controller#interrupt-cellsphandleclock-output-names#clock-cellsclock-frequencyinterrupt-parentdma-noncoherentrangesclocksgpio-controller#gpio-cellsngpiosinterruptsclock-namesstatusreg-shiftreg-io-widthbus-widthno-1-8-vno-mmcno-sdiodisable-wp#dma-cellsdma-channelssnps,block-sizesnps,prioritysnps,dma-masterssnps,data-widthinterrupts-extendedriscv,ndevgpio0gpio1gpio2gpio3serial0serial1serial2serial3serial4stdout-pathno-map