Ð þí$‘8!À(Ñ!ˆcanaan,kendryte-k210&Kendryte K210 genericcpus,wÀcpu@0?cpucanaan,k210riscvK Orv64imafdc Yriscv,noneb@u€‚@•€¢interrupt-controllerª»riscv,cpu-intc¢cpu@1?cpucanaan,k210riscvK Orv64imafdc Yriscv,noneb@u€‚@•€¢interrupt-controllerª»riscv,cpu-intc¢cpu-mapcluster0core0Ðcore1Ðmemory@80000000?memoryK€@€@ €` memory-controllercanaan,k210-sramÔÛsram0sram1aisramclocksoscillator fixed-clockçôŒº€¢ soc simple-bus nvmem@1000Ktimer@2000000 canaan,k210-clintsifive,clint0KÀ &interrupt-controller@c000000ª#canaan,k210-plicsifive,plic-1.0.0K » &    :A¢serial@38000000 canaan,k210-uarthssifive,uart0K8E!ÔPokayWadefaultgpio-controller@38001000ªo canaan,k210-gpiohssifive,gpio0K8»€E"#$%&'()*+,-./0123456789:;<=>?@A{‹  Pdisableddma-controller@50000000snps,axi-dma-1.01aKPE ’ÔÛcore-clkcfgr-clk�¤±ÂÐà ðbus@50200000simple-pm-bus P P Ôgpio@50200000snps,dw-apb-gpioKP €ÔÛbusdb� Pdisabledgpio-port@0oªsnps,dw-apb-gpio-portK»E{‹serial@50210000snps,dw-apb-uartKP!E ÔÛbaudclkapb_pclk�+8E Pdisabledserial@50220000snps,dw-apb-uartKP"E ÔÛbaudclkapb_pclk�+8E Pdisabledserial@50230000snps,dw-apb-uartKP#E Ô Ûbaudclkapb_pclk�+8E Pdisabledspi@50240000canaan,k210-spiQKP$EÔ Ûssi_clkpclk� Pdisabledi2s@50250000$canaan,k210-i2ssnps,designware-i2sKP%EÔ Ûi2sclk�  Pdisabledi2s@50260000$canaan,k210-i2ssnps,designware-i2sKP&EÔ Ûi2sclk�  Pdisabledi2s@50270000$canaan,k210-i2ssnps,designware-i2sKP'EÔ Ûi2sclk�  Pdisabledi2c@50280000snps,designware-i2cKP(EÔ Ûrefpclk�  Pdisabledi2c@50290000snps,designware-i2cKP)E Ô Ûrefpclk� Pdisabledi2c@502a0000snps,designware-i2cKP*E Ô Ûrefpclk� Pdisabledpinmux@502b0000canaan,k210-fpioaKP+Ô! Ûrefpclk�[ lW adefaultjtag-pinmuxt¢ uarths-pinmuxt¢timer@502d0000snps,dw-apb-timerKP-EÔ Ûtimerpclk�timer@502d0014snps,dw-apb-timerKP-EÔ Ûtimerpclk�timer@502e0000snps,dw-apb-timerKP.EÔ Ûtimerpclk�timer@502e0014snps,dw-apb-timerKP.EÔ Ûtimerpclk�timer@502f0000snps,dw-apb-timerKP/EÔ Ûtimerpclk�timer@502f0014snps,dw-apb-timerKP/EÔ Ûtimerpclk�bus@50400000simple-pm-bus P@P@Ô watchdog@50400000 snps,dw-wdtKP@EÔ  Ûtclkpclk�watchdog@50410000 snps,dw-wdtKPAEÔ  Ûtclkpclk�syscon@50440000%canaan,k210-sysctlsysconsimple-mfdKPDÔ Ûpclk¢ clock-controllerçcanaan,k210-clkÔ ¢reset-controllercanaan,k210-rst{¢syscon-rebootsyscon-rebootˆ �0–›bus@52000000simple-pm-bus RRÔ spi@52000000canaan,k210-spiKREÔ  Ûssi_clkpclk�¡spi­ Pdisabledspi@53000000canaan,k210-spiKSEÔ  Ûssi_clkpclk�¡spi­ Pdisabledspi@54000000snps,dwc-ssi-1.01aKTEÔ  Ûssi_clkpclk� ¡spi­ Pdisabledaliases´/soc/serial@38000000chosen¼earlycon console=ttySIF0Åserial0:115200n8 #address-cells#size-cellscompatiblemodeltimebase-frequencydevice_typeregriscv,isammu-typei-cache-block-sizei-cache-sized-cache-block-sized-cache-sizephandle#interrupt-cellsinterrupt-controllercpuclocksclock-names#clock-cellsclock-frequencyrangesinterrupt-parentread-onlyinterrupts-extendedriscv,ndevinterruptsstatuspinctrl-0pinctrl-names#gpio-cellsgpio-controllerngpios#dma-cellsresetsdma-channelssnps,dma-masterssnps,prioritysnps,data-widthsnps,block-sizesnps,axi-max-burst-lenreg-io-widthreg-shiftdcd-overridedsr-overridects-overrideri-overridespi-slavecanaan,k210-sysctl-powerpinmux#reset-cellsregmapoffsetmaskvaluereset-namesnum-csserial0bootargsstdout-path