Ð þí7ù84X(¡4 V2P-CA9‘" arm,vexpress,v2p-ca9arm,vexpress+<Kbus@40000000 simple-bus<KW@@^o?‚            !!""##$$%%&&''(())**motherboard-bus@40000000� arm,vexpress,v2m-p1simple-bus<KPW@DHLflash@0,00000000 arm,vexpress-flashcfi-flash�”partitions arm,arm-firmware-suitepsram@2,00000000 arm,vexpress-psrammtd-ram �”ethernet@3,02000000 smsc,lan9118smsc,lan9115 �Ÿªmii³ÀÕèöusb@3,03000000 nxp,usb-isp1761 �Ÿ peripheraliofpga@7,00000000 simple-bus<KWsysreg@0 arm,vexpress-sysreg�<K Wgpio@8 arm,vexpress-sysreg,sys_led�&gpio@48 arm,vexpress-sysreg,sys_mci�H&gpio@4c arm,vexpress-sysreg,sys_flash�L&sysctl@1000 arm,sp810arm,primecell� 29refclktimclkapb_pclkE0Rtimerclken0timerclken1timerclken2timerclken3 eui2c@2000 arm,versatile-i2c� <Kpcie-switch@60 idt,89hpes32h8�`aaci@4000 arm,pl041arm,primecell�@Ÿ 2 9apb_pclkmmci@5000 arm,pl180arm,primecell�PŸ  Œ •ž·¬29mclkapb_pclkkmi@6000 arm,pl050arm,primecell�`Ÿ 29KMIREFCLKapb_pclkkmi@7000 arm,pl050arm,primecell�pŸ 29KMIREFCLKapb_pclkserial@9000 arm,pl011arm,primecell��Ÿ2 9uartclkapb_pclkserial@a000 arm,pl011arm,primecell� Ÿ2 9uartclkapb_pclkserial@b000 arm,pl011arm,primecell�°Ÿ2 9uartclkapb_pclkserial@c000 arm,pl011arm,primecell�ÀŸ2 9uartclkapb_pclkwdt@f000 arm,sp805arm,primecell�ðŸ29wdog_clkapb_pclktimer@11000 arm,sp804arm,primecell�Ÿ29timclken1timclken2apb_pclktimer@12000 arm,sp804arm,primecell� Ÿ29timclken1timclken2apb_pclki2c@16000 arm,versatile-i2c�`<Kdvi-transmitter@39 sil,sii9022-tpisil,sii9022�9ports<Kport@0�endpoint¸ port@1�endpoint¸ dvi-transmitter@60 sil,sii9022-cpisil,sii9022�`rtc@17000 arm,pl031arm,primecell�pŸ2 9apb_pclkcompact-flash@1a000 arm,vexpress-cfata-generic� ¡Èclcd@1f000 arm,pl111arm,primecell�ð ÒcombinedŸ2 9clcdclkapb_pclkâ7ù€÷ portendpoint¸  regulator-3v3 regulator-fixed3V3.2Z F2Z ^clock-24000000 fixed-clockErn6 Rv2m:clk24mhzclock-1000000 fixed-clockErB@Rv2m:refclk1mhzclock-32768 fixed-clockEr€Rv2m:refclk32khzleds gpio-ledsled-user1‚v2m:green:user1 � ˆheartbeatled-user2‚v2m:green:user2 �ˆmmc0led-user3‚v2m:green:user3 �ˆcpu0led-user4‚v2m:green:user4 �ˆcpu1led-user5‚v2m:green:user5 �ˆcpu2led-user6‚v2m:green:user6 �ˆcpu3led-user7‚v2m:green:user7 �ˆcpu4led-user8‚v2m:green:user8 �ˆcpu5mcc arm,vexpress,config-busžclock-controller-0 arm,vexpress-osc¹Ò}x@“‡E Rv2m:oscclk0clock-controller-1 arm,vexpress-osc¹ÒjepßÒ@E Rv2m:oscclk1 clock-controller-2 arm,vexpress-osc¹Òn6n6E Rv2m:oscclk2 regulator-vio arm,vexpress-volt¹VIO^‚VIOtemp-mcc arm,vexpress-temp¹‚MCCreset arm,vexpress-reset¹muxfpga arm,vexpress-muxfpga¹shutdown arm,vexpress-shutdown¹reboot arm,vexpress-reboot¹ dvimode arm,vexpress-dvimode¹ chosenEÝ/bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/serial@9000aliasesEé/bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/serial@9000Eñ/bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/serial@a000Eù/bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/serial@b000E/bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/serial@c000C /bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/i2c@16000B/bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/i2c@2000cpus<Kcpu@0cpu arm,cortex-a9�cpu@1cpu arm,cortex-a9�cpu@2cpu arm,cortex-a9�cpu@3cpu arm,cortex-a9�memory@60000000memory�`@reserved-memory<KWvram@4c000000 shared-dma-pool�L€0 clcd@10020000 arm,pl111arm,primecell� Òcombined Ÿ,29clcdclkapb_pclkâ©•Àportendpoint¸  memory-controller@100e0000 arm,pl341arm,primecell�2 9apb_pclkmemory-controller@100e1000 arm,pl354arm,primecell�Ÿ-.2 9apb_pclktimer@100e4000 arm,sp804arm,primecell�@Ÿ01 29timer0clktimer1clkapb_pclk 7disabledwatchdog@100e5000 arm,sp805arm,primecell�P Ÿ329wdog_clkapb_pclkscu@1e000000 arm,cortex-a9-scu�Xtimer@1e000600 arm,cortex-a9-twd-timer�  Ÿ watchdog@1e000620 arm,cortex-a9-twd-wdt�  Ÿinterrupt-controller@1e001000 arm,cortex-a9-gic^<>�cache-controller@1e00a000 arm,pl310-cache�  Ÿ+Sa m ~pmu arm,cortex-a9-pmu0Ÿ<=>?Ždcc arm,vexpress,config-busžclock-controller-0 arm,vexpress-osc¹ÒÉÀúð€E Rextsaxiclkclock-controller-1 arm,vexpress-osc¹Ò˜–€Ä´ERclcdclkclock-controller-2 arm,vexpress-osc¹Ò÷Š@õáE Rtcrefclkregulator-vd10 arm,vexpress-volt¹VD10^‚VD10regulator-vd10-s2 arm,vexpress-volt¹VD10_S2^‚VD10_S2regulator-vd10-s3 arm,vexpress-volt¹VD10_S3^‚VD10_S3regulator-vcc1v8 arm,vexpress-volt¹VCC1V8^‚VCC1V8regulator-ddr2vtt arm,vexpress-volt¹DDR2VTT^‚DDR2VTTregulator-vcc3v3¹ arm,vexpress-voltVCC3V3^‚VCC3V3amp-vd10-s2 arm,vexpress-amp¹‚VD10_S2amp-vd10-s3 arm,vexpress-amp¹‚VD10_S3power-vd10-s2 arm,vexpress-power¹  ‚PVD10_S2power-vd10-s3 arm,vexpress-power¹  ‚PVD10_S3hsb@e0000000 simple-bus<K Wà ^o`‚$%&' modelarm,hbiarm,vexpress,sitecompatibleinterrupt-parent#address-cells#size-cellsranges#interrupt-cellsinterrupt-map-maskinterrupt-mapregbank-widthinterruptsphy-modereg-io-widthsmsc,irq-active-highsmsc,irq-push-pullvdd33a-supplyvddvario-supplydr_modephandlegpio-controller#gpio-cellsclocksclock-names#clock-cellsclock-output-namesassigned-clocksassigned-clock-parentscd-gpioswp-gpiosmax-frequencyvmmc-supplyremote-endpointreg-shiftinterrupt-namesmax-memory-bandwidthmemory-regionarm,pl11x,tft-r0g0b0-padsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onclock-frequencylabellinux,default-triggerarm,vexpress,config-bridgearm,vexpress-sysreg,funcfreq-rangestdout-pathserial0serial1serial2serial3i2c0i2c1device_typenext-level-cacheno-mapstatusinterrupt-controllercache-unifiedcache-levelarm,data-latencyarm,tag-latencyinterrupt-affinity