Ð þíá8ä( ý¬Dgumstix,omap3-overo-palo43gumstix,omap3-overoti,omap3630ti,omap3 +/7OMAP36xx/AM37xx/DM37xx Gumstix Overo on Palo43chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000 {/displaycpus+cpu@0arm,cortex-a8„cpu�”›cpu§“àµÉÔãpmu@54000000arm,cortex-a8-pmu�T€ëödebugsssocti,omap-inframpu ti,omap3-mpuömpuiva ti,iva2.2öivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus�hë +öl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus� +  pinmux@30 ti,omap3-padconfpinctrl-single�08+'<Zÿwdefault…ãèuart2-pins �<>@Bãçi2c1-pins�ŠŒãêmmc1-pins0�ãùmmc2-pins0�(*,.02ãûw3cbw003c-pins�„lãhsusb2-pins@�¤ ¦ ¨ ª ¬ ® Ž�ãtwl4030-pins�°Aãëi2c3-pins�’”ãñuart3-pins�npãédss-dpi-pinsà�¤¦¨ª¬®°²´¶¸º¼¾ÀÂÄÆÈÊÌÎÐÒÔÖØÚã lte430-pins�Dãbacklight-pins�Fã!mcspi1-pins �˜šœžãôads7846-pins� ãõscm_conf@270sysconsimple-bus�p0+ p0ãpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap�°£pbias_mmc_omap2430ªpbias_mmc_omap2430¹w@Ñ-ÆÀãøclocks+clock@68 ti,clksel�hé+clock-mcbsp5-mux-fck@4�éti,composite-mux-clockömcbsp5_mux_fck”ã clock-mcbsp3-mux-fck@0�éti,composite-mux-clockömcbsp3_mux_fck” ãclock-mcbsp4-mux-fck@2�éti,composite-mux-clockömcbsp4_mux_fck” ãmcbsp5_fckéti,composite-clock” ãclock@4 ti,clksel�é+clock-mcbsp1-mux-fck@2�éti,composite-mux-clockömcbsp1_mux_fck”ã clock-mcbsp2-mux-fck@6�éti,composite-mux-clockömcbsp2_mux_fck” ãmcbsp1_fckéti,composite-clock” ãþmcbsp2_fckéti,composite-clock”ãmcbsp3_fckéti,composite-clock”ãmcbsp4_fckéti,composite-clock”ãclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single� \+'<Zÿtwl4030-vpins-pins �ãìtarget-module@480a6000ti,sysc-omap2ti,sysc�H `DH `HH `L revsyscsyss  .”›ick+ H ` aes1@0 ti,omap3-aes�Pë;  @txrxtarget-module@480c5000ti,sysc-omap2ti,sysc�H PDH PHH PL revsyscsyss  .”›ick+ H P aes2@0 ti,omap3-aes�Pë;AB@txrxprm@48306000 ti,omap3-prm�H0`@ë clocks+virt_16_8m_cké fixed-clockJYãosc_sys_ck@d40é ti,mux-clock”� @ãsys_ck@1270éti,divider-clock”Zg�prã"sys_clkout1@d70éti,gate-clock”� pZdpll3_x2_ckéfixed-factor-clock”‰”dpll3_m2x2_ckéfixed-factor-clock”‰”ã!dpll4_x2_ckéfixed-factor-clock” ‰”corex2_fckéfixed-factor-clock”!‰”ã#wkup_l4_ickéfixed-factor-clock”"‰”ãbcorex2_d3_fckéfixed-factor-clock”#‰”ãŠcorex2_d5_fckéfixed-factor-clock”#‰”ã‹clockdomainscm@48004000 ti,omap3-cm�H@@clocks+dummy_apb_pclké fixed-clockJomap_32k_fcké fixed-clockJ€ãHvirt_12m_cké fixed-clockJ·ãvirt_13m_cké fixed-clockJÆ]@ãvirt_19200000_cké fixed-clockJ$øãvirt_26000000_cké fixed-clockJŒº€ãvirt_38_4m_cké fixed-clockJIðãdpll4_ck@d00éti,omap3-dpll-per-j-type-clock”""� D 0ã dpll4_m2_ck@d48éti,divider-clock” g?� Hrã$dpll4_m2x2_mul_ckéfixed-factor-clock”$‰”ã%dpll4_m2x2_ck@d00éti,hsdiv-gate-clock”%Z� žã&omap_96m_alwon_fckéfixed-factor-clock”&‰”ã2dpll3_ck@d00éti,omap3-dpll-core-clock”""� @ 0ãclock@1140 ti,clksel�@é+clock-dpll3-m3@16�éti,divider-clock ödpll3_m3_ck”grã,clock-dpll4-m6@24�éti,divider-clock ödpll4_m6_ck” g?rã>clock-emu-src-mux@0�é ti,mux-clocköemu_src_mux_ck”"'()ãvclock-pclk-fck@8�éti,divider-clock öpclk_fck”*grclock-pclkx2-fck@6�éti,divider-clock öpclkx2_fck”*grclock-atclk-fck@4�éti,divider-clock öatclk_fck”*grclock-traceclk-src-fck@2�é ti,mux-clockötraceclk_src_fck”"'()ã+clock-traceclk-fck@11� éti,divider-clock ötraceclk_fck”+grdpll3_m3x2_mul_ckéfixed-factor-clock”,‰”ã-dpll3_m3x2_ck@d00éti,hsdiv-gate-clock”-Z � žã.emu_core_alwon_ckéfixed-factor-clock”.‰”ã'sys_altclké fixed-clockJã5mcbsp_clksé fixed-clockJãcore_ckéfixed-factor-clock”‰”ã/dpll1_fck@940éti,divider-clock”/Zg� @rã0dpll1_ck@904éti,omap3-dpll-clock”"0�  $ @ 4ãdpll1_x2_ckéfixed-factor-clock”‰”ã1dpll1_x2m2_ck@944éti,divider-clock”1g� DrãEcm_96m_fckéfixed-factor-clock”2‰”ã3clock@d40 ti,clksel� @é+clock-dpll3-m2@27�éti,divider-clock ödpll3_m2_ck”grãclock-omap-96m-fck@6�é ti,mux-clock öomap_96m_fck”3"ãYclock-omap-54m-fck@5�é ti,mux-clock öomap_54m_fck”45ãAclock-omap-48m-fck@3�é ti,mux-clock öomap_48m_fck”65ã9clock@e40 ti,clksel�@é+clock-dpll4-m3@8�éti,divider-clock ödpll4_m3_ck” g rã7clock-dpll4-m4@0�éti,divider-clock ödpll4_m4_ck” grã:dpll4_m3x2_mul_ckéfixed-factor-clock”7‰”ã8dpll4_m3x2_ck@d00éti,hsdiv-gate-clock”8Z� žã4cm_96m_d2_fckéfixed-factor-clock”3‰”ã6omap_12m_fckéfixed-factor-clock”9‰”ãZdpll4_m4x2_mul_ckéti,fixed-factor-clock”:´ÂÏã;dpll4_m4x2_ck@d00éti,gate-clock”;Z� žÏã^dpll4_m5_ck@f40éti,divider-clock” g?�@rã<dpll4_m5x2_mul_ckéti,fixed-factor-clock”<´ÂÏã=dpll4_m5x2_ck@d00éti,hsdiv-gate-clock”=Z� žÏãzdpll4_m6x2_mul_ckéfixed-factor-clock”>‰”ã?dpll4_m6x2_ck@d00éti,hsdiv-gate-clock”?Z� žã@emu_per_alwon_ckéfixed-factor-clock”@‰”ã(clock@d70 ti,clksel� pé+clock-clkout2-src-gate@7�é ti,composite-no-wait-gate-clocköclkout2_src_gate_ck”/ãCclock-clkout2-src-mux@0�éti,composite-mux-clocköclkout2_src_mux_ck”/"3AãDclock-sys-clkout2@3�éti,divider-clock ösys_clkout2”Bg@âclkout2_src_ckéti,composite-clock”CDãBmpu_ckéfixed-factor-clock”E‰”ãFarm_fck@924éti,divider-clock”F� $gemu_mpu_alwon_ckéfixed-factor-clock”F‰”ã)clock@a40 ti,clksel� @é+clock-l3-ick@0�éti,divider-clocköl3_ick”/grãGclock-l4-ick@2�éti,divider-clocköl4_ick”GgrãIclock-gpt10-mux-fck@6�éti,composite-mux-clockögpt10_mux_fck”H"ãVclock-gpt11-mux-fck@7�éti,composite-mux-clockögpt11_mux_fck”H"ãXclock-ssi-ssr-div-fck-3430es2@8�éti,composite-divider-clockössi_ssr_div_fck_3430es2”#$øãclock@c40 ti,clksel� @é+clock-rm-ick@1�éti,divider-clockörm_ick”Igrclock-gpt1-mux-fck@0�éti,composite-mux-clock ögpt1_mux_fck”H"ãaclock-usim-mux-fck@3�éti,composite-mux-clock öusim_mux_fck(”"JKLMNOPQRrãƒclock@a00 ti,clksel� é+clock-gpt10-gate-fck@11� éti,composite-gate-clockögpt10_gate_fck”"ãUclock-gpt11-gate-fck@12� éti,composite-gate-clockögpt11_gate_fck”"ãWclock-mmchs2-fck@25�éti,wait-gate-clock ömmchs2_fck”ã¹clock-mmchs1-fck@24�éti,wait-gate-clock ömmchs1_fck”ãºclock-i2c3-fck@17�éti,wait-gate-clock öi2c3_fck”ã»clock-i2c2-fck@16�éti,wait-gate-clock öi2c2_fck”ã¼clock-i2c1-fck@15�éti,wait-gate-clock öi2c1_fck”ã½clock-mcbsp5-gate-fck@10� éti,composite-gate-clockömcbsp5_gate_fck”ã clock-mcbsp1-gate-fck@9� éti,composite-gate-clockömcbsp1_gate_fck”ã clock-mcspi4-fck@21�éti,wait-gate-clock ömcspi4_fck”Sã¾clock-mcspi3-fck@20�éti,wait-gate-clock ömcspi3_fck”Sã¿clock-mcspi2-fck@19�éti,wait-gate-clock ömcspi2_fck”SãÀclock-mcspi1-fck@18�éti,wait-gate-clock ömcspi1_fck”SãÁclock-uart2-fck@14�éti,wait-gate-clock öuart2_fck”SãÂclock-uart1-fck@13� éti,wait-gate-clock öuart1_fck”SãÃclock-hdq-fck@22�éti,wait-gate-clocköhdq_fck”TãÄclock-modem-fck@31�éti,omap3-interface-clock ömodem_fck”"ãàclock-mspro-fck@23�éti,wait-gate-clock ömspro_fck”clock-ssi-ssr-gate-fck-3430es2@0�é ti,composite-no-wait-gate-clockössi_ssr_gate_fck_3430es2”#ã~clock-mmchs3-fck@30�éti,wait-gate-clock ömmchs3_fck”ãÜgpt10_fckéti,composite-clock”UVgpt11_fckéti,composite-clock”WXcore_96m_fckéfixed-factor-clock”Y‰”ãcore_48m_fckéfixed-factor-clock”9‰”ãScore_12m_fckéfixed-factor-clock”Z‰”ãTcore_l3_ickéfixed-factor-clock”G‰”ã[clock@a10 ti,clksel� é+clock-sdrc-ick@1�éti,wait-gate-clock ösdrc_ick”[ãŽclock-mmchs2-ick@25�éti,omap3-interface-clock ömmchs2_ick”\ãÅclock-mmchs1-ick@24�éti,omap3-interface-clock ömmchs1_ick”\ãÆclock-hdq-ick@22�éti,omap3-interface-clocköhdq_ick”\ãÇclock-mcspi4-ick@21�éti,omap3-interface-clock ömcspi4_ick”\ãÈclock-mcspi3-ick@20�éti,omap3-interface-clock ömcspi3_ick”\ãÉclock-mcspi2-ick@19�éti,omap3-interface-clock ömcspi2_ick”\ãÊclock-mcspi1-ick@18�éti,omap3-interface-clock ömcspi1_ick”\ãËclock-i2c3-ick@17�éti,omap3-interface-clock öi2c3_ick”\ãÌclock-i2c2-ick@16�éti,omap3-interface-clock öi2c2_ick”\ãÍclock-i2c1-ick@15�éti,omap3-interface-clock öi2c1_ick”\ãÎclock-uart2-ick@14�éti,omap3-interface-clock öuart2_ick”\ãÏclock-uart1-ick@13� éti,omap3-interface-clock öuart1_ick”\ãÐclock-gpt11-ick@12� éti,omap3-interface-clock ögpt11_ick”\ãÑclock-gpt10-ick@11� éti,omap3-interface-clock ögpt10_ick”\ãÒclock-mcbsp5-ick@10� éti,omap3-interface-clock ömcbsp5_ick”\ãÓclock-mcbsp1-ick@9� éti,omap3-interface-clock ömcbsp1_ick”\ãÔclock-omapctrl-ick@6�éti,omap3-interface-clock öomapctrl_ick”\ãÕclock-aes2-ick@28�éti,omap3-interface-clock öaes2_ick”\ãclock-sha12-ick@27�éti,omap3-interface-clock ösha12_ick”\ãÖclock-icr-ick@29�éti,omap3-interface-clocköicr_ick”\clock-des2-ick@26�éti,omap3-interface-clock ödes2_ick”\clock-mspro-ick@23�éti,omap3-interface-clock ömspro_ick”\clock-mailboxes-ick@7�éti,omap3-interface-clockömailboxes_ick”\clock-sad2d-ick@3�éti,omap3-interface-clock ösad2d_ick”Gãáclock-hsotgusb-ick-3430es2@4�é"ti,omap3-hsotgusb-interface-clocköhsotgusb_ick_3430es2”[ã�clock-ssi-ick-3430es2@0�éti,omap3-ssi-interface-clockössi_ick_3430es2”]ã clock-mmchs3-ick@30�éti,omap3-interface-clock ömmchs3_ick”\ãÛgpmc_fckéfixed-factor-clock”[‰”core_l4_ickéfixed-factor-clock”I‰”ã\clock@e00 ti,clksel�é+clock-dss-tv-fckéti,gate-clock ödss_tv_fck”AZã´clock-dss-96m-fckéti,gate-clock ödss_96m_fck”YZãµclock-dss2-alwon-fckéti,gate-clocködss2_alwon_fck”"Zã¶clock-dss1-alwon-fck-3430es2@0�éti,dss-gate-clocködss1_alwon_fck_3430es2”^Ïã·dummy_cké fixed-clockJclock@c00 ti,clksel� é+clock-gpt1-gate-fck@0�éti,composite-gate-clockögpt1_gate_fck”"ã`clock-gpio1-dbck@3�éti,gate-clock ögpio1_dbck”_ã«clock-wdt2-fck@5�éti,wait-gate-clock öwdt2_fck”_ã¬clock-sr1-fck@6�éti,wait-gate-clockösr1_fck”"ãclock-sr2-fck@7�éti,wait-gate-clockösr2_fck”"ãclock-usim-gate-fck@9� éti,composite-gate-clocköusim_gate_fck”Yã‚gpt1_fckéti,composite-clock”`aãwkup_32k_fckéfixed-factor-clock”H‰”ã_clock@c10 ti,clksel� é+clock-wdt2-ick@5�éti,omap3-interface-clock öwdt2_ick”bã­clock-wdt1-ick@4�éti,omap3-interface-clock öwdt1_ick”bã®clock-gpio1-ick@3�éti,omap3-interface-clock ögpio1_ick”bã¯clock-omap-32ksync-ick@2�éti,omap3-interface-clocköomap_32ksync_ick”bã°clock-gpt12-ick@1�éti,omap3-interface-clock ögpt12_ick”bã±clock-gpt1-ick@0�éti,omap3-interface-clock ögpt1_ick”bã²clock-usim-ick@9� éti,omap3-interface-clock öusim_ick”bã³per_96m_fckéfixed-factor-clock”2‰”ã per_48m_fckéfixed-factor-clock”9‰”ãcclock@1000 ti,clksel�é+clock-uart3-fck@11� éti,wait-gate-clock öuart3_fck”cã�clock-gpt2-gate-fck@3�éti,composite-gate-clockögpt2_gate_fck”"ãeclock-gpt3-gate-fck@4�éti,composite-gate-clockögpt3_gate_fck”"ãgclock-gpt4-gate-fck@5�éti,composite-gate-clockögpt4_gate_fck”"ãiclock-gpt5-gate-fck@6�éti,composite-gate-clockögpt5_gate_fck”"ãkclock-gpt6-gate-fck@7�éti,composite-gate-clockögpt6_gate_fck”"ãmclock-gpt7-gate-fck@8�éti,composite-gate-clockögpt7_gate_fck”"ãoclock-gpt8-gate-fck@9� éti,composite-gate-clockögpt8_gate_fck”"ãqclock-gpt9-gate-fck@10� éti,composite-gate-clockögpt9_gate_fck”"ãsclock-gpio6-dbck@17�éti,gate-clock ögpio6_dbck”dã‘clock-gpio5-dbck@16�éti,gate-clock ögpio5_dbck”dã’clock-gpio4-dbck@15�éti,gate-clock ögpio4_dbck”dã“clock-gpio3-dbck@14�éti,gate-clock ögpio3_dbck”dã”clock-gpio2-dbck@13� éti,gate-clock ögpio2_dbck”dã•clock-wdt3-fck@12� éti,wait-gate-clock öwdt3_fck”dã–clock-mcbsp2-gate-fck@0�éti,composite-gate-clockömcbsp2_gate_fck”ãclock-mcbsp3-gate-fck@1�éti,composite-gate-clockömcbsp3_gate_fck”ãclock-mcbsp4-gate-fck@2�éti,composite-gate-clockömcbsp4_gate_fck”ãclock-uart4-fck@18�éti,wait-gate-clock öuart4_fck”cãªclock@1040 ti,clksel�@é+clock-gpt2-mux-fck@0�éti,composite-mux-clock ögpt2_mux_fck”H"ãfclock-gpt3-mux-fck@1�éti,composite-mux-clock ögpt3_mux_fck”H"ãhclock-gpt4-mux-fck@2�éti,composite-mux-clock ögpt4_mux_fck”H"ãjclock-gpt5-mux-fck@3�éti,composite-mux-clock ögpt5_mux_fck”H"ãlclock-gpt6-mux-fck@4�éti,composite-mux-clock ögpt6_mux_fck”H"ãnclock-gpt7-mux-fck@5�éti,composite-mux-clock ögpt7_mux_fck”H"ãpclock-gpt8-mux-fck@6�éti,composite-mux-clock ögpt8_mux_fck”H"ãrclock-gpt9-mux-fck@7�éti,composite-mux-clock ögpt9_mux_fck”H"ãtgpt2_fckéti,composite-clock”efãgpt3_fckéti,composite-clock”ghgpt4_fckéti,composite-clock”ijgpt5_fckéti,composite-clock”klgpt6_fckéti,composite-clock”mngpt7_fckéti,composite-clock”opgpt8_fckéti,composite-clock”qrgpt9_fckéti,composite-clock”stper_32k_alwon_fckéfixed-factor-clock”H‰”ãdper_l4_ickéfixed-factor-clock”I‰”ãuclock@1010 ti,clksel�é+clock-gpio6-ick@17�éti,omap3-interface-clock ögpio6_ick”uã—clock-gpio5-ick@16�éti,omap3-interface-clock ögpio5_ick”uã˜clock-gpio4-ick@15�éti,omap3-interface-clock ögpio4_ick”uã™clock-gpio3-ick@14�éti,omap3-interface-clock ögpio3_ick”uãšclock-gpio2-ick@13� éti,omap3-interface-clock ögpio2_ick”uã›clock-wdt3-ick@12� éti,omap3-interface-clock öwdt3_ick”uãœclock-uart3-ick@11� éti,omap3-interface-clock öuart3_ick”uã�clock-uart4-ick@18�éti,omap3-interface-clock öuart4_ick”uãžclock-gpt9-ick@10� éti,omap3-interface-clock ögpt9_ick”uãŸclock-gpt8-ick@9� éti,omap3-interface-clock ögpt8_ick”uã clock-gpt7-ick@8�éti,omap3-interface-clock ögpt7_ick”uã¡clock-gpt6-ick@7�éti,omap3-interface-clock ögpt6_ick”uã¢clock-gpt5-ick@6�éti,omap3-interface-clock ögpt5_ick”uã£clock-gpt4-ick@5�éti,omap3-interface-clock ögpt4_ick”uã¤clock-gpt3-ick@4�éti,omap3-interface-clock ögpt3_ick”uã¥clock-gpt2-ick@3�éti,omap3-interface-clock ögpt2_ick”uã¦clock-mcbsp2-ick@0�éti,omap3-interface-clock ömcbsp2_ick”uã§clock-mcbsp3-ick@1�éti,omap3-interface-clock ömcbsp3_ick”uã¨clock-mcbsp4-ick@2�éti,omap3-interface-clock ömcbsp4_ick”uã©emu_src_ckéti,clkdm-gate-clock”vã*secure_32k_fcké fixed-clockJ€ãwgpt12_fckéfixed-factor-clock”w‰”ãwdt1_fckéfixed-factor-clock”w‰”security_l4_ick2éfixed-factor-clock”I‰”ãxclock@a14 ti,clksel� é+clock-aes1-ick@3�éti,omap3-interface-clock öaes1_ick”xãclock-rng-ick@2�éti,omap3-interface-clockörng_ick”xãÿclock-sha11-ick@1�éti,omap3-interface-clock ösha11_ick”xclock-des1-ick@0�éti,omap3-interface-clock ödes1_ick”xclock-pka-ick@4�éti,omap3-interface-clocköpka_ick”yclock@f00 ti,clksel�é+clock-cam-mclk@0�éti,gate-clock öcam_mclk”zÏclock-csi2-96m-fck@1�éti,gate-clock öcsi2_96m_fck”ãÞcam_ick@f10é!ti,omap3-no-wait-interface-clock”I�ZãÝsecurity_l3_ickéfixed-factor-clock”G‰”ãyssi_l4_ickéfixed-factor-clock”I‰”ã]sr_l4_ickéfixed-factor-clock”I‰”dpll2_fck@40éti,divider-clock”/Zg�@rã{dpll2_ck@4éti,omap3-dpll-clock”"{�$@4ã|dpll2_m2_ck@44éti,divider-clock”|g�Drã}iva2_ck@0éti,wait-gate-clock”}�Zãßclock@a18 ti,clksel� é2+clock-mad2d-ick@3�éti,omap3-interface-clock ömad2d_ick”Gãâclock-usbtll-ick@2�éti,omap3-interface-clock öusbtll_ick”\ãÚssi_ssr_fck_3430es2éti,composite-clock”~ã€ssi_sst_fck_3430es2éfixed-factor-clock”€‰”ã sys_d2_ckéfixed-factor-clock”"‰”ãJomap_96m_d2_fckéfixed-factor-clock”Y‰”ãKomap_96m_d4_fckéfixed-factor-clock”Y‰”ãLomap_96m_d8_fckéfixed-factor-clock”Y‰”ãMomap_96m_d10_fckéfixed-factor-clock”Y‰” ãNdpll5_m2_d4_ckéfixed-factor-clock”�‰”ãOdpll5_m2_d8_ckéfixed-factor-clock”�‰”ãPdpll5_m2_d16_ckéfixed-factor-clock”�‰”ãQdpll5_m2_d20_ckéfixed-factor-clock”�‰”ãRusim_fckéti,composite-clock”‚ƒdpll5_ck@d04éti,omap3-dpll-clock”""�  $ L 4ã„dpll5_m2_ck@d50éti,divider-clock”„g� Prã�sgx_gate_fck@b00éti,composite-gate-clock”/Z� ãŒcore_d3_ckéfixed-factor-clock”/‰”ã…core_d4_ckéfixed-factor-clock”/‰”ã†core_d6_ckéfixed-factor-clock”/‰”ã‡omap_192m_alwon_fckéfixed-factor-clock”&‰”ãˆcore_d2_ckéfixed-factor-clock”/‰”ã‰sgx_mux_fck@b40éti,composite-mux-clock ”…†‡3ˆ‰Š‹� @ã�sgx_fckéti,composite-clock”Œ�ãsgx_ick@b10éti,wait-gate-clock”G� Zããcpefuse_fck@a08éti,gate-clock”"� Zã×ts_fck@a08éti,gate-clock”H� ZãØusbtll_fck@a08éti,wait-gate-clock”�� ZãÙdss_ick_3430es2@e10éti,omap3-dss-interface-clock”I�Zã¸usbhost_120m_fck@1400éti,gate-clock”��Zãäusbhost_48m_fck@1400éti,dss-gate-clock”9�Zãåusbhost_ick@1410éti,omap3-dss-interface-clock”I�Zãæclockdomainscore_l3_clkdmti,clockdomain”Ž�dpll3_clkdmti,clockdomain”dpll1_clkdmti,clockdomain”per_clkdmti,clockdomainl”�‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§¨©ªemu_clkdmti,clockdomain”*dpll4_clkdmti,clockdomain” wkup_clkdmti,clockdomain$”«¬­®¯°±²³dss_clkdmti,clockdomain”´µ¶·¸core_l4_clkdmti,clockdomain””¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚÛÜcam_clkdmti,clockdomain”ÝÞiva2_clkdmti,clockdomain”ßdpll2_clkdmti,clockdomain”|d2d_clkdmti,clockdomain ”àáâdpll5_clkdmti,clockdomain”„sgx_clkdmti,clockdomain”ãusbhost_clkdmti,clockdomain ”äåætarget-module@48320000ti,sysc-omap2ti,sysc�H2H2  revsysc ”_°›fckick+ H2counter@0ti,omap-counter32k� interrupt-controller@48200000ti,omap3-intc'�H ãtarget-module@48056000ti,sysc-omap2ti,sysc�H`H`,H`( revsyscsyss# ?  .”[›ick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma�ë MX e`ãgpio@48310000ti,omap3-gpio�H1ëögpio1r„”'ãgpio@49050000ti,omap3-gpio�Iëögpio2„”'ãgpio@49052000ti,omap3-gpio�I ëögpio3„”'gpio@49054000ti,omap3-gpio�I@ë ögpio4„”'ã÷gpio@49056000ti,omap3-gpio�I`ë!ögpio5„”'ãgpio@49058000ti,omap3-gpio�I€ë"ögpio6„”'ãserial@4806a000ti,omap3-uart�H   H;12@txrxöuart1JÜlserial@4806c000ti,omap3-uart�HÀ I;34@txrxöuart2JÜlwdefault…çserial@49020000ti,omap3-uart�I Jèn;56@txrxöuart3JÜlwdefault…éi2c@48070000 ti,omap3-i2c�H€ë8+öi2c1wdefault…êJ'¬@twl@48�Hë  ti,twl4030'wdefault…ëìaudioti,twl4030-audiocodecrtcti,twl4030-rtcë bciti,twl4030-bcië ´íÂî Îvacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1¹ 'ÀÑ regulator-vdacti,twl4030-vdac¹w@Ñw@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1¹:�Ñ0°ãúregulator-vmmc2ti,twl4030-vmmc2¹:�Ñ0°regulator-vusb1v5ti,twl4030-vusb1v5ãïregulator-vusb1v8ti,twl4030-vusb1v8ãðregulator-vusb3v1ti,twl4030-vusb3v1ãíregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2¹w@Ñw@ßregulator-vsimti,twl4030-vsim¹w@Ñ-ÆÀgpioti,twl4030-gpio„”'ótwl4030-usbti,twl4030-usbë ÿï ðí)2ã pwmti,twl4030-pwm=pwmledti,twl4030-pwmled=ãpwrbuttonti,twl4030-pwrbuttonëkeypadti,twl4030-keypadëHXmadcti,twl4030-madcëkãîi2c@48072000 ti,omap3-i2c�H €ë9+öi2c2 }disabledi2c@48060000 ti,omap3-i2c�H€ë=+öi2c3wdefault…ñJ† eeprom@51 atmel,24c01�Q„lis33de@1dst,lis33dest,lis3lv02d��ò˜ó¦¸ÊÜ î   .=L[jyˆx—x¦Œµ&Ä&Óîmailbox@48094000ti,omap3-mailboxömailbox�H @ëâîmbox-dsp  spi@48098000ti,omap2-mcspi�H €ëA+ömcspi1(@;#$%&'()* @tx0rx0tx1rx1tx2rx2tx3rx3wdefault…ôads7846@0wdefault…õ ti,ads78466ö�Aã` ÷ë S÷`iÿr{ÿ„´”ÿ¤spi@4809a000ti,omap2-mcspi�H  ëB+ömcspi2( ;+,-.@tx0rx0tx1rx1spi@480b8000ti,omap2-mcspi�H €ë[+ömcspi3( ;@tx0rx0tx1rx1spi@480ba000ti,omap2-mcspi�H  ë0+ömcspi4(;FG@tx0rx01w@480b2000 ti,omap3-1w�H ë:öhdq1wmmc@4809c000ti,omap3-hsmmc�H ÀëSömmc1²;=>@txrx¿øwdefault…ùÌúØmmc@480b4000ti,omap3-hsmmc�H @ëVömmc2;/0@txrxwdefault…ûÌüâýØïümmc@480ad000ti,omap3-hsmmc�H Ðë^ömmc3;MN@txrx }disabledmmu@480bd400 ti,omap2-iommu�H Ô€ëömmu_ispãmmu@5d000000 ti,omap2-iommu�]€ëömmu_iva }disabledwdt@48314000 ti,omap3-wdt�H1@€ öwd_timer2mcbsp@48074000ti,omap3-mcbsp�H@ÿ mpu ë;< 'commontxrx7€ömcbsp1; @txrx”þ›fck }disabledtarget-module@480a0000ti,sysc-omap2ti,sysc�H <H @H D revsyscsyss .”ÿ›ick+ H rng@0 ti,omap2-rng� ë4mcbsp@49022000ti,omap3-mcbsp�I ÿI€ÿ  mpusidetoneë>?'commontxrxsidetone7ömcbsp2mcbsp2_sidetone;!"@txrx”§›fckick}okayãmcbsp@49024000ti,omap3-mcbsp�I@ÿI ÿ  mpusidetoneëYZ'commontxrxsidetone7€ömcbsp3mcbsp3_sidetone;@txrx”¨›fckick }disabledmcbsp@49026000ti,omap3-mcbsp�I`ÿ mpu ë67 'commontxrx7€ömcbsp4;@txrx”›fckF }disabledmcbsp@48096000ti,omap3-mcbsp�H `ÿ mpu ëQR 'commontxrx7€ömcbsp5;@txrx”›fck }disabledsham@480c3000ti,omap3-shamösham�H 0dë1;E@rxtarget-module@48318000ti,sysc-omap2-timerti,sysc�H1€H1€H1€ revsyscsyss'  .”²›fckick+ H1€Wktimer@0ti,omap3430-timer�€”›fckë%v…•Htarget-module@49032000ti,sysc-omap2-timerti,sysc�I I I  revsyscsyss'  .”¦›fckick+ I timer@0ti,omap3430-timer�ë&timer@49034000ti,omap3430-timer�I@ë'ötimer3timer@49036000ti,omap3430-timer�I`ë(ötimer4timer@49038000ti,omap3430-timer�I€ë)ötimer5¬timer@4903a000ti,omap3430-timer�I ë*ötimer6¬timer@4903c000ti,omap3430-timer�IÀë+ötimer7¬timer@4903e000ti,omap3430-timer�Iàë,ötimer8¹¬timer@49040000ti,omap3430-timer�Ië-ötimer9¹timer@48086000ti,omap3430-timer�H`ë.ötimer10¹timer@48088000ti,omap3430-timer�H€ë/ötimer11¹target-module@48304000ti,sysc-omap2-timerti,sysc�H0@H0@H0@ revsyscsyss'  .”±›fckick+ H0@timer@0ti,omap3430-timer�ë_vÆusbhstll@48062000 ti,usbhs-tll�H ëN öusb_tll_hsusbhshost@48064000ti,usbhs-host�H@ öusb_host_hs+ Öehci-phyohci@48064400ti,ohci-omap3�HDëLáehci@48064800 ti,ehci-omap�HHëMùgpmc@6e000000ti,omap3430-gpmcögpmc�nÐë;@rxtxþ +'„”00+,ãnand@0,0ti,omap2-nandmicron,mt29c4g96maz � ë+:Lbch8\m{,�,Ÿ®"Á,Ô(ã6ò@ R R #( 5+partition@0 MSPL�partition@80000 MU-Boot�partition@1c0000 MEnvironment�$partition@280000 MKernel�(€partition@780000 MFilesystem�¨target-module@480ab000ti,sysc-omap2ti,sysc�H ´H ´H ´ revsyscsyss ?  .›fck+ H °”�usb@0ti,omap3-musb�ë\]'mcdma S ^ f  o ~ ù  †usb2-phy- �2dss@48050000 ti,omap3-dss�H}okay ödss_core”·›fck+wdefault… dispc@48050400ti,omap3-dispc�Hë ödss_dispc”·›fckencoder@4804fc00 ti,omap3-dsi�HüHþ@Hÿ  protophypllë }disabled ödss_dsi1”·¶ ›fcksys_clk+encoder@48050800ti,omap3-rfbi�H }disabled ödss_rfbi”·¸›fckickencoder@48050c00ti,omap3-venc�H  }disabled ödss_venc”´µ›fcktv_dac_clkportendpoint –  ¦ã ssi-controller@48058000 ti,omap3-ssiössi}okay�H€H� sysgddëG'gdd_mpu+ ”€   ›ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-port�H H¨ txrxëCDssi-port@4805b000ti,omap3-ssi-port�H°H¸ txrxëEFserial@49042000ti,omap3-uart�I ëP;QR@txrxöuart4JÜlregulator-abb-mpu ti,abb-v1 ªabb_mpu_iva+�H0rðH0h base-addressint-address ±”" Ê Û` ësO€7Èûãpinmux@480025a0 ti,omap3-padconfpinctrl-single�H% \+'<Zÿwdefault…hsusb2-2-pins0�PRT V X Z ãw3cbw003c-2-pins�@ãled-pins�JLã"button-pins�N<ã#isp@480bc000 ti,omap3-isp�H ÀüH Øë ÷£ð þéports+bandgap@48002524�H%$ti,omap36xx-bandgap ãtarget-module@480cb000ti,sysc-omap3630-srti,syscösmartreflex_core�H °8 sysc  ”›fck+ H °smartreflex@0ti,omap3-smartreflex-core�ëtarget-module@480c9000ti,sysc-omap3630-srti,syscösmartreflex_mpu_iva�H �8 sysc  ”›fck+ H �smartreflex@480c9000ti,omap3-smartreflex-mpu-iva�ëtarget-module@50000000ti,sysc-omap4ti,sysc�PþPþ  revsysc ?  ”ã›fckick+ Pgpu@0#ti,omap3630-gpuimg,powervr-sgx530�ëopp-tableoperating-points-v2-ti-cpu£ãopp-50-300000000 ᣠ'ssssss 5ÿÿÿÿ Fopp-100-600000000 #ÃF 'O€O€O€O€O€O€ 5ÿÿÿÿopp-130-800000000 /¯ '7È7È7È7È7È7È 5ÿÿÿÿopp-1000000000 ;šÊ 'ûûûûûû 5ÿÿÿÿ Ropp-supplyti,omap-opp-supply ]ûthermal-zonescpu-thermal xú Žè œN  ©tripscpu_alert ¹8€ ÅЋpassiveãcpu_crit ¹_� ÅÐ ‹criticalcooling-mapsmap0 Ð Õÿÿÿÿÿÿÿÿmemory@0„memory�led-controller pwm-ledsled-1 Movero:blue:COM äw5” é ømmc0soundti,omap-twl4030 overo hsusb2_power_regregulator-fixed ªhsusb2_vbus¹LK@ÑLK@ [ p 1ãhsusb2-phy-pinsusb-nop-xceiv D62ãregulator-w3cbw003c-npoweronregulator-fixedªregulator-w3cbw003c-npoweron¹2Z Ñ2Z  [ 1ãüregulator-w3cbw003c-wifi-nresetwdefault…regulator-fixed ªregulator-w3cbw003c-wifi-nreset¹2Z Ñ2Z  [ 'ãýlis33-3v3-regregulator-fixedªlis33-3v3-reg¹2Z Ñ2Z ãólis33-1v8-regregulator-fixedªlis33-1v8-reg¹w@Ñw@ãòdisplaysamsung,lte430wq-f0cpanel-dpi Mlcd43wdefault… Pportendpoint – ã panel-timingJŒa€ ]à e m z †) � œ ©  ³ À Í ×ads7846-regregulator-fixed ªads7846-reg¹2Z Ñ2Z ãöbacklightgpio-backlightwdefault…! J çleds gpio-ledswdefault…"led-heartbeat Movero:red:gpio21 J øheartbeatled-gpio22 Movero:blue:gpio22 Jgpio_keys gpio-keyswdefault…#+button0 Mbutton0 ò J¤button1 Mbutton1 ò J¤ compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3display0device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellsphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypass#ssize-cellsti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesregulator-always-onti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsstatuspagesizeVdd-supplyVdd_IO-supplyst,click-single-xst,click-single-yst,click-single-zst,click-thresh-xst,click-thresh-yst,click-thresh-zst,irq1-clickst,irq2-clickst,wakeup-x-lost,wakeup-x-hist,wakeup-y-lost,wakeup-y-hist,wakeup-z-lost,wakeup-z-hist,min-limit-xst,min-limit-yst,min-limit-zst,max-limit-xst,max-limit-yst,max-limit-z#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxwakeup-sourceti,dual-voltpbias-supplyvmmc-supplybus-widthvqmmc-supplycap-sdio-irqnon-removable#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerremote-endpointdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicepwmsmax-brightnesslinux,default-triggerti,modelti,mcbspstartup-delay-usenable-active-highreset-gpiosenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activedefault-onlinux,code