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baudclkapb_pclk>%%ã†ídefaultCPzokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartýþg ‹w'$baudclkapb_pclk>%%ã‡ídefaultCP zdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartýþh ‹x+(baudclkapb_pclk>%% ãˆídefaultCP zdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartýþi ‹y/,baudclkapb_pclk>% % ã‰ídefaultCP zdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþj ‹z30baudclkapb_pclk>% % ãŠídefaultCP zdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk ‹{74baudclkapb_pclk>%%ã‹ídefaultCP zdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl ‹|;8baudclkapb_pclk>%%ãŒídefaultCP zdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm ‹}?<baudclkapb_pclk>%%ã�ídefaultCP zdisabledthermal-zonescpu-thermal !d 7è EŽtripscpu_alert0 Up aÐøpassive­�cpu_alert1 U$ø aÐøpassivecpu_crit Us aÐ øcriticalcooling-mapsmap0 l�0 q ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal ! 7è EŽtripsgpu-threshold Up aÐøpassivegpu-target U$ø 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interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controller#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr50vmmc-supplyvqmmc-supplyspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthlabelnon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsphy-supplyrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfreset-gpiosvpcie3v3-supplyclock_in_outphy-handlephy-modetx_delayrx_delayreset-assert-usreset-deassert-usstdout-pathfunctioncolordefault-statelinux,default-triggersimple-audio-card,hp-det-gpiosimple-audio-card,widgetssimple-audio-card,routingenable-active-highstartup-delay-us