Ð þí’l8‡Ì(  ‡”&firefly,roc-rk3328-ccrockchip,rk3328 +7Firefly roc-rk3328-ccaliases=/pinctrl/gpio@ff210000C/pinctrl/gpio@ff220000I/pinctrl/gpio@ff230000O/pinctrl/gpio@ff240000U/serial@ff110000]/serial@ff120000e/serial@ff130000m/i2c@ff150000r/i2c@ff160000w/i2c@ff170000|/i2c@ff180000�/ethernet@ff540000‹/mmc@ff500000�/mmc@ff520000cpus+cpu@0•cpuarm,cortex-a53¡¥¬»Ëxåpsció€@&3€@@R€_p{ cpu@1•cpuarm,cortex-a53¡¥¬»Ëxåpsció€@&3€@@R€_p{ cpu@2•cpuarm,cortex-a53¡¥¬»Ëxåpsció€@&3€@@R€_p{ cpu@3•cpuarm,cortex-a53¡¥¬»Ëxåpsció€@&3€@@R€_p{ idle-statesƒpscicpu-sleeparm,idle-state�¡¸xÉúÙ„{l2-cachecacheêö @({opp-table-0operating-points-v2{opp-408000000Q–~ð$œ@5opp-600000000#ÃF~ð$œ@opp-8160000000£,B@$œ@opp-1008000000<ÜÈà$œ@opp-1200000000G†Œ±($œ@opp-1296000000M?dÖ $œ@analog-soundsimple-audio-cardAi2sZtAnalog‹okaysimple-audio-card,cpu’simple-audio-card,codec’arm-pmuarm,cortex-a53-pmu0œdefg§ display-subsystemrockchip,display-subsystemº hdmi-soundsimple-audio-cardAi2sZ€tHDMI‹okaysimple-audio-card,cpu’simple-audio-card,codec’psciarm,psci-1.0arm,psci-0.2ìsmctimerarm,armv8-timer0œ   xin24m fixed-clockÀÍn6Ýxin24m{Ei2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s¡ÿ œ¥)7ði2s_clki2s_hclkü  txrx ‹okay{i2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s¡ÿ œ¥*8ði2s_clki2s_hclkütxrx ‹okay{i2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s¡ÿ œ¥+9ði2s_clki2s_hclkütxrx  ‹disabledspdif@ff030000rockchip,rk3328-spdif¡ÿ œ¥.: ðmclkhclkü txdefault*  ‹disabledpdm@ff040000 rockchip,pdm¡ÿ¥=Rðpdm_clkpdm_hclkürxdefaultsleep*4 ‹disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd¡ÿ{:io-domains"rockchip,rk3328-io-voltage-domain‹okay>LZhv„’gpiorockchip,rk3328-grf-gpioŸ¯{epower-controller!rockchip,rk3328-power-controller»+{<power-domain@6¡¥D»power-domain@5¡ ¥‹BAB»power-domain@8¡¥�F»reboot-modesyscon-reboot-modeÏÈÖRBÃâRBÃðRBà RBÃserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart¡ÿ œ7¥&Òðbaudclkapb_pclkütxrxdefault * !"  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Cg{+vcc-phy-regulatorregulator-fixedšvcc_phyÙí{Qleds gpio-ledsled-0 vfirefly:blue:power |heartbeat Nh ’onled-1 vfirefly:yellow:user |mmc1 Nh ’off compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3serial0serial1serial2i2c0i2c1i2c2i2c3ethernet0mmc0mmc1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1vccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplypmuio-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shiftrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,efuse-sizebits#io-channel-cellsinterrupt-names#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-ddr-1_8vmmc-hs200-1_8vnon-removabletx-fifo-depthrx-fifo-depthsnps,txpblclock_in_outphy-supplyphy-modesnps,aalsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ussnps,rxpbltx_delayrx_delayphy-handlephy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathvin-supplygpiosregulator-typeenable-active-highlabellinux,default-triggerdefault-state