O8o(oX ,Google Pazquel (Parade) 2google,pazquel-sku5qcom,sc7180aliases=/soc@0/mmc@7c4000B/soc@0/mmc@8804000!G/soc@0/geniqup@8c0000/i2c@880000!L/soc@0/geniqup@8c0000/i2c@884000!Q/soc@0/geniqup@8c0000/i2c@888000!V/soc@0/geniqup@8c0000/i2c@88c000![/soc@0/geniqup@8c0000/i2c@890000!`/soc@0/geniqup@8c0000/i2c@894000!e/soc@0/geniqup@ac0000/i2c@a80000!j/soc@0/geniqup@ac0000/i2c@a84000!o/soc@0/geniqup@ac0000/i2c@a88000!t/soc@0/geniqup@ac0000/i2c@a8c000!y/soc@0/geniqup@ac0000/i2c@a90000!/soc@0/geniqup@ac0000/i2c@a94000!/soc@0/geniqup@8c0000/spi@880000!/soc@0/geniqup@8c0000/spi@884000!/soc@0/geniqup@8c0000/spi@88c000!/soc@0/geniqup@8c0000/spi@894000!/soc@0/geniqup@ac0000/spi@a80000!/soc@0/geniqup@ac0000/spi@a88000!/soc@0/geniqup@ac0000/spi@a90000!/soc@0/geniqup@ac0000/spi@a94000./soc@0/geniqup@8c0000/serial@88c000/bluetooth$/soc@0/geniqup@8c0000/serial@88c000$/soc@0/geniqup@ac0000/serial@a88000/soc@0/wifi@18800000chosenserial0:115200n8clocksxo-board 2fixed-clockIsleep-clk 2fixed-clock%cpus cpu@0cpu 2qcom,kryo468 psci&9S(gu  l2-cache2cacheu l3-cache2cache cpu@100cpu 2qcom,kryo468 psci&9u S(g  l2-cache2cacheu  cpu@200cpu 2qcom,kryo468 psci&9u S(g  l2-cache2cacheu  cpu@300cpu 2qcom,kryo468 psci&9uS(g  l2-cache2cacheu cpu@400cpu 2qcom,kryo468 psci&9uS(g  l2-cache2cacheu cpu@500cpu 2qcom,kryo468 psci&9uS(g  l2-cache2cacheu cpu@600cpu 2qcom,kryo468 psci&9uS(g  l2-cache2cacheu cpu@700cpu 2qcom,kryo468 psci&9uS(g  l2-cache2cacheu cpu-mapcluster0core0core1core2core3core4core5core6core7idle-statespscicpu-sleep-0-02arm,idle-statelittle-power-down@%):cpu-sleep-0-12arm,idle-statelittle-rail-power-down@): cpu-sleep-1-02arm,idle-statebig-power-down@ ):cpu-sleep-1-12arm,idle-statebig-rail-power-down@>):cluster-sleep-02arm,idle-statecluster-power-down@4D )&: firmwarescm2qcom,scm-sc7180qcom,scmKmemory@80000000memory opp-table-cpu02operating-points-v2Xopp-300000000cjOI>opp-576000000c"UjOI>opp-768000000c-jOI>opp-1017600000cV0opp-table-cpu62operating-points-v2Xopp-300000000cj!bopp-652800000c&j!bopp-825600000c15j!bopp-979200000c:]hj!bopp-1113600000cB`0j!bopp-1267200000cKj>opp-1555200000c\xj>opp-1708800000ce8j^'Popp-1843200000cmj^'Popp-1900800000cqKj^V0opp-1996800000cwj^V0opp-2112000000c}j^V0opp-2208000000chjnV0opp-2323200000cy8jnV0opp-2400000000c j0 d@opp-2553600000c4j0 d@opp-table-qspi2operating-points-v2opp-75000000cxhxopp-150000000cрxopp-300000000cx opp-table-qup2operating-points-v25opp-75000000cxhxopp-100000000cxopp-128000000c x pmu2arm,armv8-pmuv3 psci 2arm,psci-1.0smcreserved-memory memory@80820000  2qcom,cmd-dbmemory@80900000 !memory@80b00000 memory@946000002qcom,rmtfs-mem `memory@86000000 memory@8f600000 `Pmemory@94100000  memory@94400000 @ mpss-metadata @smem 2qcom,smem!"smp2p-cdsp 2qcom,smp2p^ @#master-kernelmaster-kernel slave-kernel slave-kernel7Lsmp2p-lpass 2qcom,smp2p # master-kernelmaster-kernel slave-kernel slave-kernel7Lsmp2p-mpss 2qcom,smp2p #master-kernelmaster-kernel slave-kernel slave-kernel7Lipa-ap-to-modemipa ~ipa-modem-to-apipa7L{soc@0 ] 2simple-busclock-controller@1000002qcom,gcc-sc7180 $$%hbi_tcxobi_tcxo_aosleep_clkt&'efuse@7840002qcom,sc7180-qfpromqcom,qfprom@ x@xx x`'hcore (hstx-trim-primary@25b [gpu-speed-bin@1d2 mmc@7c4000$2qcom,sc7180-sdhciqcom,sdhci-msm-v5  |@|P hccqhci )`hc_irqpwr_irq'X'Y$hifacecorexo0g*+sdhc-ddrcpu-sdhc&S, (7QokayXdefaultsleepf-p.z/0opp-table2operating-points-v2,opp-100000000cxjw@ 'opp-384000000c`x jRejpgeniqup@8c00002qcom,geni-se-qup ` hm-ahbs-ahb'T'U  )CQokayi2c@8800002qcom,geni-i2c @hse':Xdefaultf1 Y Hg22+&*qup-corequp-configqup-memory&x Qdisabledspi@8800002qcom,geni-spi @hse':Xdefaultf34 Y &S50g22+&qup-corequp-configQokay 6%tpm@0 2google,cr50 Xdefaultf7 56*serial@8800002qcom,geni-uart @hse':Xdefaultf8 Y&S50g22+&qup-corequp-config Qdisabledi2c@8840002qcom,geni-i2c @@hse'<Xdefaultf9 Z Hg22+&*qup-corequp-configqup-memory&x Qdisabledspi@8840002qcom,geni-spi @@hse'<Xdefaultf:; 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RDltxc q rs}0Y1 d"#(  \V |})   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g i(y  serial@a800002qcom,geni-uart @hse'HXdefaultf^ a&S50g22+'qup-corequp-config Qdisabledi2c@a840002qcom,geni-i2c @@hse'JXdefaultf_ b Hg22+'Zqup-corequp-configqup-memory&xQokaytrackpad@15 2hid-over-i2c Xdefaultf`6adserial@a840002qcom,geni-uart @@hse'JXdefaultfb b&S50g22+'qup-corequp-config Qdisabledi2c@a880002qcom,geni-i2c @hse'LXdefaultfc c Hg22+'Zqup-corequp-configqup-memory&x Qdisabledspi@a880002qcom,geni-spi @hse'LXdefaultfde c &S50g22+'qup-corequp-config Qdisabledserial@a880002qcom,geni-debug-uart @hse'LXdefaultff c&S50g22+'qup-corequp-configQokayi2c@a8c0002qcom,geni-i2c @hse'NXdefaultfg d Hg22+'Zqup-corequp-configqup-memory&xQokaycodec@1a2realtek,rt5682i Xdefaultfh6iiijj4serial@a8c0002qcom,geni-uart @hse'NXdefaultfk d&S50g22+'qup-corequp-config Qdisabledi2c@a900002qcom,geni-i2c @hse'PXdefaultfl e Hg22+'Zqup-corequp-configqup-memory&x Qdisabledspi@a900002qcom,geni-spi @hse'PXdefaultfmn e &S50g22+'qup-corequp-config Qdisabled 6Yec@0%2google,cros-ec-fpgoogle,cros-ec-spi 6Xdefault fopq C6  6-aserial@a900002qcom,geni-uart @hse'PXdefaultfr e&S50g22+'qup-corequp-config Qdisabledi2c@a940002qcom,geni-i2c @@hse'RXdefaultfs f Hg22+'Zqup-corequp-configqup-memory&x Qdisabledspi@a940002qcom,geni-spi @@hse'RXdefaultftu f &S50g22+'qup-corequp-config Qdisabledserial@a940002qcom,geni-uart @@hse'RXdefaultfv f&S50g22+'qup-corequp-config Qdisabledinterconnect@15000002qcom,sc7180-config-noc POcw+interconnect@16200002qcom,sc7180-system-noc bpOcw|interconnect@16380002qcom,sc7180-mc-virt cOcwinterconnect@16500002qcom,sc7180-qup-virt eOcw2interconnect@16e00002qcom,sc7180-aggre1-noc nPOcw*interconnect@17050002qcom,sc7180-aggre2-noc pPOcwZinterconnect@170e0002qcom,sc7180-compute-noc p`Ocwinterconnect@17400002qcom,sc7180-mmss-noc tOcwufshc@1d84000+2qcom,sc7180-ufshcqcom,ufshcjedec,ufs-2.0 @0  sxxufsphyt'rst' )\hcore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clk8'c''b'k$'j'i8 <4`р0g*+/ufs-ddrcpu-ufsy Qdisabledzphy@1d870002qcom,sc7180-qmp-ufs-phy p$'g'ahrefref_auxqref'zufsphy Qdisabledxcrypto@1d90000;2qcom,sc7180-inline-crypto-engineqcom,inline-crypto-engine 'e'b hcoreiface'yipa@1e400002qcom,sc7180-ipa)@)B0 pp @ipa-regipa-sharedgsi87{{(ipagsiipa-clock-queryipa-setup-ready$ hcoreHgZZ| +memoryimemconfig}~~*ipa-clock-enabled-validipa-clock-enabled Qdisabledhwlock@1f400002qcom,tcsr-mutex "syscon@1f600002qcom,sc7180-tcsrsyscon syscon@1fc00002qcom,sc7180-tcsrsyscon pinctrl@35000002qcom,sc7180-pinctrl0 P000westnorthsouth   7L %6x 1Xdefaultf ?TP_INT_ODLAP_RAM_ID0AP_SKU_ID2AP_RAM_ID1AP_RAM_ID2AP_TP_I2C_SDAAP_TP_I2C_SCLTS_RESET_LTS_INT_LEDP_BRIJ_IRQAP_EDP_BKLTENEDP_BRIJ_I2C_SDAEDP_BRIJ_I2C_SCLHUB_RST_LAMP_ENP_SENSOR_INT_LAP_SAR_SENSOR_SDAAP_SAR_SENSOR_SCLHP_IRQAP_BRD_ID2BRIJ_SUSPENDAP_BRD_ID0AP_H1_SPI_MISOAP_H1_SPI_MOSIAP_H1_SPI_CLKAP_H1_SPI_CS_LH1_AP_INT_ODLUART_AP_TX_DBG_RXUART_DBG_TX_AP_RXHP_I2C_SDAHP_I2C_SCLFORCED_USB_BOOTAMP_BCLKAMP_LRCLKAMP_DINHP_BCLKHP_LRCLKHP_DOUTHP_DINHP_MCLKAP_SKU_ID0AP_EC_SPI_MISOAP_EC_SPI_MOSIAP_EC_SPI_CLKAP_EC_SPI_CS_LAP_SPI_CLKAP_SPI_MOSIAP_SPI_MISOAP_FLASH_WP_LEN_PP3300_DX_EDPAP_SPI_CS0_LUIM2_DATAUIM2_CLKUIM2_RSTUIM2_PRESENTUIM1_DATAUIM1_CLKUIM1_RSTCODEC_PWR_ENHUB_ENAP_SKU_ID1AP_RST_REQAP_BRD_ID1AP_EC_INT_LEDP_BRIJ_ENAP_TS_PEN_I2C_SDAAP_TS_PEN_I2C_SCLDP_HOT_PLUG_DETEC_IN_RW_ODL6dp-hot-plug-det-state Ogpio117 Tdp_hot ]qspi-clk-state Ogpio63 Tqspi_clk j ]qspi-cs0-state Ogpio68 Tqspi_cs ]qspi-cs1-state Ogpio72 Tqspi_csqspi-data0-state Ogpio64 Tqspi_data ]qspi-data1-state Ogpio65 Tqspi_data yqspi-data23-state Ogpio66gpio67 Tqspi_dataqup-i2c0-default-state Ogpio34gpio35 Tqup001qup-i2c1-default-state Ogpio0gpio1 Tqup019qup-i2c2-default-state Ogpio15gpio16 Tqup02_i2c j ]=qup-i2c3-default-state Ogpio38gpio39 Tqup03Hqup-i2c4-default-state Ogpio115gpio116 Tqup04_i2c j ]Qqup-i2c5-default-state Ogpio25gpio26 Tqup05 j ]Squp-i2c6-default-state Ogpio59gpio60 Tqup10Yqup-i2c7-default-state Ogpio6gpio7 Tqup11_i2c j ]_qup-i2c8-default-state Ogpio42gpio43 Tqup12cqup-i2c9-default-state Ogpio46gpio47 Tqup13_i2c j ]gqup-i2c10-default-state Ogpio86gpio87 Tqup14lqup-i2c11-default-state Ogpio53gpio54 Tqup15squp-spi0-spi-state Ogpio34gpio35gpio36 Tqup00 j ]3qup-spi0-cs-state Ogpio37 Tqup00qup-spi0-cs-gpio-state Ogpio37 Tgpio j ]4qup-spi1-spi-state Ogpio0gpio1gpio2 Tqup01:qup-spi1-cs-state Ogpio3 Tqup01;qup-spi1-cs-gpio-state Ogpio3 Tgpioqup-spi3-spi-state Ogpio38gpio39gpio40 Tqup03Iqup-spi3-cs-state Ogpio41 Tqup03Jqup-spi3-cs-gpio-state Ogpio41 Tgpioqup-spi5-spi-state Ogpio25gpio26gpio27 Tqup05Vqup-spi5-cs-state Ogpio28 Tqup05Wqup-spi5-cs-gpio-state Ogpio28 Tgpioqup-spi6-spi-state Ogpio59gpio60gpio61 Tqup10 j ][qup-spi6-cs-state Ogpio62 Tqup10qup-spi6-cs-gpio-state Ogpio62 Tgpio j ]\qup-spi8-spi-state Ogpio42gpio43gpio44 Tqup12dqup-spi8-cs-state Ogpio45 Tqup12equp-spi8-cs-gpio-state Ogpio45 Tgpioqup-spi10-spi-state Ogpio86gpio87gpio88 Tqup14 j ]mqup-spi10-cs-state Ogpio89 Tqup14qup-spi10-cs-gpio-state Ogpio89 Tgpio j ]nqup-spi11-spi-state Ogpio53gpio54gpio55 Tqup15tqup-spi11-cs-state Ogpio56 Tqup15uqup-spi11-cs-gpio-state Ogpio56 Tgpioqup-uart0-default-state8cts-pins Ogpio34 Tqup00rts-pins Ogpio35 Tqup00tx-pins Ogpio36 Tqup00rx-pins Ogpio37 Tqup00qup-uart1-default-state<cts-pins Ogpio0 Tqup01rts-pins Ogpio1 Tqup01tx-pins Ogpio2 Tqup01rx-pins Ogpio3 Tqup01qup-uart2-default-stateGtx-pins Ogpio15 Tqup02_uartrx-pins Ogpio16 Tqup02_uartqup-uart3-default-stateKcts-pins Ogpio38 Tqup03 yrts-pins Ogpio39 Tqup03 j ]tx-pins Ogpio40 Tqup03 j ]rx-pins Ogpio41 Tqup03 qup-uart4-default-stateRtx-pins Ogpio115 Tqup04_uartrx-pins Ogpio116 Tqup04_uartqup-uart5-default-stateXcts-pins Ogpio25 Tqup05rts-pins Ogpio26 Tqup05tx-pins Ogpio27 Tqup05rx-pins Ogpio28 Tqup05qup-uart6-default-state^cts-pins Ogpio59 Tqup10rts-pins Ogpio60 Tqup10tx-pins Ogpio61 Tqup10rx-pins Ogpio62 Tqup10qup-uart7-default-statebtx-pins Ogpio6 Tqup11_uartrx-pins Ogpio7 Tqup11_uartqup-uart8-default-stateftx-pins Ogpio44 Tqup12 j ]rx-pins Ogpio45 Tqup12 j qup-uart9-default-statektx-pins Ogpio46 Tqup13_uartrx-pins Ogpio47 Tqup13_uartqup-uart10-default-statercts-pins Ogpio86 Tqup14rts-pins Ogpio87 Tqup14tx-pins Ogpio88 Tqup14rx-pins Ogpio89 Tqup14qup-uart11-default-statevcts-pins Ogpio53 Tqup15rts-pins Ogpio54 Tqup15tx-pins Ogpio55 Tqup15rx-pins Ogpio56 Tqup15sec-mi2s-active-state Ogpio49gpio50gpio51 Tmi2s_1 j ypri-mi2s-active-state Ogpio53gpio54gpio55gpio56 Tmi2s_0 j ypri-mi2s-mclk-active-state Ogpio57 Tlpass_ext j yter-mi2s-active-state Ogpio63gpio64gpio65gpio66 Tmi2s_2amp-en-state Ogpio23 Tgpio yap-ec-int-l-state Ogpio94 Tgpio ]ap-edp-bklten-state Ogpio12 Tgpio j ] ap-suspend-l-neuter-state Ogpio27 Tgpio ]bios-flash-wp-l-state Ogpio66 Tgpio ]edp-brij-en-state Ogpio104 Tgpio j ]>en-pp3300-codec-state Ogpio83 Tgpio j ] en-pp3300-dx-edp-state Ogpio67 Tgpio j ] en-pp3300-hub-state Ogpio84 Tgpio j ]fp-rst-l-state Ogpio22 Tgpio ] jpfp-to-ap-irq-l-state Ogpio4 Tgpio ]ofpmcu-boot0-state Ogpio10 Tgpio ]qh1-ap-int-odl-state Ogpio42 Tgpio 7hp-irq-state Ogpio28 Tgpio hpen-irq-l-state Ogpio21 Tgpio ]pen-pdct-l-state-state Ogpio52 Tgpio ]pen-rst-odl-state Ogpio18 Tgpio ] j p-sensor-int-l-state Ogpio24 Tgpio ]Tqspi-sleep-state Ogpio63gpio64gpio65gpio68 Tgpio qup-uart3-sleep-stateLcts-pins Ogpio38 Tgpio yrts-pins Ogpio39 Tgpio ytx-pins Ogpio40 Tgpio rx-pins Ogpio41 Tgpio tp-int-odl-state Ogpio0 Tgpio ]`ts-int-l-state Ogpio9 Tgpio ts-reset-l-state Ogpio8 Tgpio ] jsdc1-on-state-clk-pins Osdc1_clk ] jcmd-pins Osdc1_cmd  jdata-pins Osdc1_data  jrclk-pins Osdc1_rclk ysdc1-off-state.clk-pins Osdc1_clk ] jcmd-pins Osdc1_cmd  jdata-pins Osdc1_data  jrclk-pins Osdc1_rclk ysdc2-on-stateclk-pins Osdc2_clk ] jcmd-pins Osdc2_cmd  j data-pins Osdc2_data  j sd-cd-pins Ogpio69 Tgpio  jsdc2-off-stateclk-pins Osdc2_clk ] jcmd-pins Osdc2_cmd  jdata-pins Osdc2_data  jsd-cd-pins Ogpio69 Tgpio  juf-cam-en-state Ogpio6 Tgpio j ] wf-cam-en-state Ogpio7 Tgpio j ] edp-brij-ps8640-rst-state Ogpio11 Tgpio j ]?en-pp3300-edp-brij-ps8640-state Ogpio32 Tgpio j ]remoteproc@40800002qcom,sc7180-mss-pil  @@HL 0wdogfatalreadyhandoverstop-ackshutdown-ack0'}''''~$#hifacebusnavsnoc_aximnoc_axixo&&& cxmxmss }stopQokay qdsp6rmb)a)DT qcom/sc7180-trogdor/modem-nolte/mba.mbnqcom/sc7180-trogdor/modem-nolte/qdsp6sw.mbn mss_restartpdc_reset 0P@ glink-edge modem# gpu@50000002qcom,adreno-618.0qcom,adreno0  #kgsl_3d0_reg_memorycx_memcx_dbgc ,S   speed_binggfx-memopp-table2operating-points-v2opp-825000000c1,@ !j0  +opp-800000000c/ !j0  +opp-650000000c&6 !@jn +opp-565000000c!7@ !jR +opp-430000000cG !jR +opp-355000000c( !j. +opp-267000000c !@j. +opp-180000000c  !0j +iommu@504000022qcom,sc7180-smmu-v2qcom,adreno-smmuqcom,smmu-v2  < Ixlmnopqrs'&'# hbusifacegmu@506a000&2qcom,adreno-gmu-618.0qcom,adreno-gmu0  ) Igmugmu_pdcgmu_pdc_seq01hfigmu ''&hgmucxoaximemnoc cxgxSopp-table2operating-points-v2opp-200000000c  !0clock-controller@50900002qcom,sc7180-gpucc  $'$'%8hbi_tcxogcc_gpu_gpll0_clk_srcgcc_gpu_gpll0_div_clk_srctdma@10a20002qcom,sc7180-dccqcom,dcc     Qdisabledstm@6002000 2arm,coresight-stmarm,primecell   (stm-basestm-stimulus-base} hapb_pclkout-portsportendpointfunnel@6041000+2arm,coresight-dynamic-funnelarm,primecell } hapb_pclkout-portsportendpointin-ports port@7 endpointfunnel@6042000+2arm,coresight-dynamic-funnelarm,primecell  } hapb_pclkout-portsportendpointin-ports port@4 endpointfunnel@6045000+2arm,coresight-dynamic-funnelarm,primecell P} hapb_pclkout-portsportendpointin-ports port@0 endpointport@1 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