Ð þí[È8P( ÄOÌ6kontron,3-5-sbc-i1200mediatek,mt8395mediatek,mt8195 +7Kontron 3.5"-SBC-i1200aliases=/soc/dp-intf@1c015000F/soc/dp-intf@1c113000O/soc/mailbox@10320000T/soc/mailbox@10330000Y/soc/hdr-engine@1c114000`/soc/mutex@1c016000g/soc/mutex@1c101000n/soc/vpp-merge@1c10c000u/soc/vpp-merge@1c10d000|/soc/vpp-merge@1c10e000ƒ/soc/vpp-merge@1c10f000Š/soc/vpp-merge@1c110000‘/soc/dma-controller@1c104000œ/soc/dma-controller@1c105000§/soc/dma-controller@1c106000²/soc/dma-controller@1c107000½/soc/dma-controller@1c108000È/soc/dma-controller@1c109000Ó/soc/dma-controller@1c10a000Þ/soc/dma-controller@1c10b000é/soc/mmc@11230000î/soc/mmc@11240000ó/soc/serial@11001200û/soc/serial@11001300/soc/serial@11001400 /soc/serial@11001500/soc/serial@11001100cpus+cpu@0cpuarm,cortex-a55'+psci9Mec3@]4p€€�@Ÿ€¬€¹@Ë€Øéø cpu@100cpuarm,cortex-a55'+psci9Mec3@]4p€€�@Ÿ€¬€¹@Ë€Øéø cpu@200cpuarm,cortex-a55'+psci9Mec3@]4p€€�@Ÿ€¬€¹@Ë€Øéø cpu@300cpuarm,cortex-a55'+psci9Mec3@]4p€€�@Ÿ€¬€¹@Ë€Øéø cpu@400cpuarm,cortex-a78'+psci9M�fÔÀ]p€�@Ÿ¬¹@ËØéø cpu@500cpuarm,cortex-a78'+psci9M�fÔÀ]p€�@Ÿ¬¹@ËØéøcpu@600cpuarm,cortex-a78'+psci9M�fÔÀ]p€�@Ÿ¬¹@ËØéøcpu@700cpuarm,cortex-a78'+psci9M�fÔÀ]p€�@Ÿ¬¹@ËØéøcpu-mapcluster0core0 core1 core2 core3 core4 core5core6core7idle-statespscicpu-retention-larm,idle-state(92J_ZDøcpu-retention-barm,idle-state(9-JŒZäøcpu-off-larm,idle-state(97J›ZHøcpu-off-barm,idle-state(92JÈZèøl2-cache0cachek‚�@¡Øwøl2-cache1cachek‚�@¡Øwøl3-cachecachek‚ �@¡wødsu-pmu arm,dsu-pmu… � •faildmic-codec dmic-codecœ©2mt8195-sound¹ •disabledfixed-factor-clock-13mfixed-factor-clockËØßéôclk13mø(oscillator-26m fixed-clockËMŒº€ôclk26møoscillator-32k fixed-clockËM€ôclk32kperformance-controller@11bc10mediatek,cpufreq-hw '¼ ½0 øopp-table-gpuoperating-points-v2!ømopp-390000000,>í€3 ‰hopp-410000000,p€3 ¡Òopp-431000000,°‰À3 ¡Òopp-473000000,1h@3 º<opp-515000000,²FÀ3 º<opp-556000000,!#ã3 Ò¦opp-598000000,#¤Á€3 ëopp-640000000,&% 3 ëopp-670000000,'ïc€3 äopp-700000000,)¹'3 L¸opp-730000000,+‚ê€3 }Œopp-760000000,-L®3 ®`opp-790000000,/q€3 ß4opp-820000000,0à53 opp-850000000,2©ø€3 @Üopp-880000000,4s¼3 q°pmu-a55arm,cortex-a55-pmu …pmu-a78arm,cortex-a78-pmu …psci arm,psci-1.02smctimerarm,armv8-timer @…   soc+ simple-busAHinterrupt-controller@c000000 arm,gic-v3Sd { '   … øppi-partitionsinterrupt-partition-0� øinterrupt-partition-1� øsyscon@10000000 mediatek,mt8195-topckgensyscon'Ëøsyscon@10001000#mediatek,mt8195-infracfg_aosyscon'Ë™øsyscon@10003000mediatek,mt8195-pericfgsyscon'0ËøApinctrl@10005000mediatek,mt8195-pinctrl€'PÑÓÔâëô°B¦iocfg0iocfg_bmiocfg_bliocfg_briocfg_lmiocfg_rbiocfg_tleint°ÀÌ�{…ëSøeth-default-pinsø=pins-txdØMNOPßpins-rxdØQRSTpins-ccØUVWXßpins-mdioØYZîpins-powerØ[\ûpins-resetØ]ûpins-interruptØ^îeth-sleep-pinsø>pins-txdØMNOPpins-ccØUXWVpins-rxdØQRSTpins-mdioØYZgpio-keys-pinsø°pinsØjîi2c0-pinsøZpinsØ "Ï/èi2c1-pinsø[pinsØ  "Ï/èi2c2-default-pinsø\pins-busØ  "Ï/èi2c3-pinsø]pinsØ"Ï/èi2c4-pinsø^pinsØ"Ï/èi2c6-pinsøWpinsØ"/èmmc0-default-pinsøCpins-clkØzßGfpins-cmd-dat$Ø~}|{wvutyîß"epins-rstØxß"emmc0-uhs-pinsøDpins-clkØzßGfpins-cmd-dat$Ø~}|{wvutyîß"epins-dsØßGfpins-rstØxß"emmc1-default-pinsøGpins-clkØoßGfpins-cmd-datØnpqrsîß"emmc1-detect-pinsøHpins-insertØ�"nor-default-pinsøUpins-ck-io ØŽ��ßGpins-csØŒß"pcie0-default-pinsøQpins-bus Ø"pcie1-default-pinsøTpins-bus Ø"eled-pinsø±pins-power-enØkûspi0-default-pinsø4pins-cs-mosi-clk Ø„†…pins-miso؇Gspi1-default-pinsø8pins-cs-mosi-clk ؈Љpins-misoØ‹Guart0-pinsø/pins-rxØcî"pins-txØbuart1-pinsø0pins-rxØgî"pins-txØfpins-rtsØdpins-ctsØeîuart2-pinsø1pins-rxØDî"pins-txØCpins-rtsØBpins-ctsØAîuart3-pinsø2pins-rxØî"epins-txØuart4-pinsø3pins-rxØî"pins-txØsyscon@10006000)mediatek,mt8195-scpsyssysconsimple-mfd'`power-controller!mediatek,mt8195-power-controller+Vø+power-domain@8'+Vpower-domain@9' Øjmfgaltv+Vpower-domain@10' Vpower-domain@11' Vpower-domain@12' Vpower-domain@13' Vpower-domain@14'Vpower-domain@15'ØØ @AKà   jvppsysvppsys1vppsys2vppsys3vppsys4vppsys5vppsys6vppsys7vppsys0-0vppsys0-1vppsys0-2vppsys0-3vppsys0-4vppsys0-5vppsys0-6vppsys0-7vppsys0-8vppsys0-9vppsys0-10vppsys0-11vppsys0-12vppsys0-13vppsys0-14vppsys0-15vppsys0-16vppsys0-17vppsys0-18v+Vpower-domain@16'8Øâ$%&'()Djvdosys0vdosys0-0vdosys0-1vdosys0-2vdosys0-3vdosys0-4vdosys0-5v+Vpower-domain@17'Øájvppsys1vppsys1-0vppsys1-1vVpower-domain@22' Ø$jwepsys-0wepsys-1wepsys-2wepsys-3vVpower-domain@23'Øjvdec0-0v+Vpower-domain@24'Øjvdec1-0vVpower-domain@25'Ø jvdec2-0vVpower-domain@26'Ø! jvenc0-larbv+Vpower-domain@27'Ø" jvenc1-larbvVpower-domain@18' Øã###&jvdosys1vdosys1-0vdosys1-1vdosys1-2v+Vpower-domain@19'vVpower-domain@20'vVpower-domain@21'ØQjhdmi_txVpower-domain@28'Ø$$  jimg-0img-1v+Vpower-domain@29'Vpower-domain@30'Ø$%jipeipe-0ipe-1vVpower-domain@31'(Ø&&&&&jcam-0cam-1cam-2cam-3cam-4v+Vpower-domain@32' Vpower-domain@33'!Vpower-domain@34'"Vpower-domain@0'vVpower-domain@1'vVpower-domain@2'Vpower-domain@3'Vpower-domain@4'Ø57jcsi_rx_topcsi_rx_top1Vpower-domain@5'Ø' jetherVpower-domain@6'ØXn jadspadsp1+vVpower-domain@7' Øg"n2jaudioaudio1audio2audio3vVwatchdog@10007000mediatek,mt8195-wdtˆ'p™ø.syscon@1000c000"mediatek,mt8195-apmixedsyssyscon'ÀËøtimer@10017000,mediatek,mt8195-timermediatek,mt6765-timer'p… Ø(pwrap@10024000mediatek,mt8195-pwrapsyscon'@¦pwrap…óØ jspiwrap $°Ëpmicmediatek,mt6359{S ÇÞadcmediatek,mt6359-auxadcÛmt6359codecregulatorsmediatek,mt6359-regulatorbuck_vs1ívs1ü 5!‘À,Hbuck_vgpu11ívgpu11ü€7\ˆ,È qHbuck_vmodemívmodemü€Èà\*,Èbuck_vpuívpuü€7\ˆ,È qHbuck_vcoreívcoreü€Ö \ˆ,È qHbuck_vs2ívs2ü 5j,Hbuck_vpaívpaü¡ 7±Ð,,buck_vproc2ívproc2ü€7\L,È qHbuck_vproc1ívproc1ü€7\L,È qHbuck_vcore_sshub ívcore_sshubü€7buck_vgpu11_sshub ívgpu11_sshubü€7ldo_vaud18ívaud18üw@w@,ðldo_vsim1ívsim1üð /M`ldo_vibrívibrüO€2Z ldo_vrf12ívrf12üÈàÖ Hldo_vusbívusbü-ÆÀ-ÆÀ,ÀHøBldo_vsram_proc2 ívsram_proc2ü¡ ½¶\L,ðHldo_vio18ívio18üð ýà,ÀHldo_vcamioívcamioüð ýàldo_vcn18ívcn18üw@w@,ðldo_vfe28ívfe28ü*¹€*¹€,xldo_vcn13ívcn13ü » Ö ldo_vcn33_1_bt ívcn33_1_btü*¹€5gàldo_vcn33_1_wifi ívcn33_1_wifiü*¹€5gàldo_vaux18ívaux18üw@w@,ðHldo_vsram_others ívsram_othersü¡ ½¶\ˆ,ðHldo_vefuseívefuseüð „€ldo_vxo22ívxo22üw@!‘ÀHldo_vrfckívrfcküã`ð ldo_vrfck_1ívrfcküëÀjldo_vbif28ívbif28ü*¹€*¹€,ðldo_vio28ívio28ü*¹€2Z Hldo_vemcívemcü,@ 2Z ldo_vemc_1ívemcü&% 2Z øEldo_vcn33_2_bt ívcn33_2_btü*¹€5gàldo_vcn33_2_wifi ívcn33_2_wifiü*¹€5gàldo_va12íva12üO€Ö Hldo_va09íva09ü 5O€ldo_vrf18ívrf18üð žPldo_vsram_md ívsram_mdü¡ ½¶\*,ðHldo_vufsívufsüð ýàøFldo_vm18ívm18üð ýàHldo_vbbckívbbcküÈàO€Hldo_vsram_proc1 ívsram_proc1ü¡ ½¶\L,ðHldo_vsim2ívsim2üð /M`ldo_vsram_others_sshubívsram_others_sshubü¡ ½¶rtcmediatek,mt6358-rtcspmi@10027000mediatek,mt8195-spmi 'p� ¦pmifspmimstØE(jpmif_sys_ckpmif_tmr_ckspmimst_clk_mux $°Ë+mt6315@6mediatek,mt6315-regulator'regulatorsvbuck1íVbcpuü“à7,\j qHmt6315@7mediatek,mt6315-regulator'regulatorsvbuck1íVgpuü ‰h7,\j qHøninfra-iommu@10315000mediatek,mt8195-iommu-infra'1PPP…‰øNmailbox@10320000mediatek,mt8195-gce'2@…â–Øø‘mailbox@10330000mediatek,mt8195-gce'3@…ä–Øøoscp@10500000mediatek,mt8195-scp0'Prp€¦sramcfgl1tcm…Εokay¢)°mediatek/mt8195/scp.imgøpclock-controller@10720000mediatek,mt8195-scp_adsp'rËø*dsp@10803000mediatek,mt8195-dsp '€0„ ¦cfgsram,ØXnŠ*#Kjadsp_selclk26m_ckaudio_local_busmainpll_d7_d2scp_adsp_audiodspaudio_h¾+Ìrxtx×,- •disabledmailbox@10816000mediatek,mt8195-adsp-mbox–'�`…¾ø,mailbox@10817000mediatek,mt8195-adsp-mbox–'�p…¿ø-mt8195-afe-pcm@10890000mediatek,mt8195-audio'‰Þ¾+…6ð. ÷audiosys”ØÚÛÜÝßg"#neabcd2*ójclk26mapll1_ckapll2_ckapll12_div0apll12_div1apll12_div2apll12_div3apll12_div9a1sys_hp_selaud_intbus_selaudio_h_selaudio_local_bus_seldptx_m_seli2so1_m_seli2so2_m_seli2si1_m_seli2si2_m_selinfra_ao_audio_26m_bscp_adsp_audiodsp •disabledøserial@11001100*mediatek,mt8195-uartmediatek,mt6577-uart'…� Ø jbaudbus•okaydefault/serial@11001200*mediatek,mt8195-uartmediatek,mt6577-uart'…Ž Ø jbaudbus•okaydefault0serial@11001300*mediatek,mt8195-uartmediatek,mt6577-uart'…� Ø jbaudbus•okaydefault1serial@11001400*mediatek,mt8195-uartmediatek,mt6577-uart'…Ó Ø jbaudbus•okaydefault2serial@11001500*mediatek,mt8195-uartmediatek,mt6577-uart'…Ô Ø jbaudbus•okaydefault3serial@11001600*mediatek,mt8195-uartmediatek,mt6577-uart'…Õ Ø jbaudbus •disabledauxadc@11002000.mediatek,mt8195-auxadcmediatek,mt8173-auxadc' ØjmainÛ•okayø²syscon@11003000"mediatek,mt8195-pericfg_aosyscon'0Ëø'spi@1100a000(mediatek,mt8195-spimediatek,mt6765-spi+' …¿Ø™jparent-clksel-clkspi-clk•okaydefault4+tpm@0!infineon,slb9670tcg,tpm_tis-spi'?I thermal-sensor@1100b000mediatek,mt8195-lvts-ap'° …©ØðQ56$]lvts-calib-data-1lvts-calib-data-2nø¬svs@1100bc00mediatek,mt8195-svs'¼…ÇØjmainQ75(]svs-calibration-datat-calibration-datað÷svs_rstpwm@1100e0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm'à…˾+„Ø*0jmainmm •disabledpwm@1100f0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm'ð…„Ø+Njmainmm •disabledspi@11010000(mediatek,mt8195-spimediatek,mt6765-spi+'…ÀØ™3jparent-clksel-clkspi-clk•okaydefault8+spi@11012000(mediatek,mt8195-spimediatek,mt6765-spi+' …ÁØ™4jparent-clksel-clkspi-clk •disabledspi@11013000(mediatek,mt8195-spimediatek,mt6765-spi+'0…ÂØ™5jparent-clksel-clkspi-clk •disabledspi@11018000(mediatek,mt8195-spimediatek,mt6765-spi+'€…ÃØ™<jparent-clksel-clkspi-clk •disabledspi@11019000(mediatek,mt8195-spimediatek,mt6765-spi+'�…ÄØ™=jparent-clksel-clkspi-clk •disabledspi@1101d000mediatek,mt8195-spi-slave'Ð…ÅØRjspi °˜ •disabledspi@1101e000mediatek,mt8195-spi-slave'à…ÆØSjspi °˜ •disabledethernet@11021000&mediatek,mt8195-gmacsnps,dwmac-5.10a'@…Ì�macirq.jaxiapbmac_mainptp_refrmii_internalmac_cg0Ø''RST'  RST°ÂÃľ+Ÿ°9À:Ó;æñü•okay  rgmii-id<defaultsleep=>mdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916' Ç^''78€ I]ø<stmmac-axi-configUeuø9rx-queues-config•ø:queue0¦¹queue1¦¹queue2¦¹queue3¦¹tx-queues-configÑçø;queue0ù¦queue1ù¦queue2ù¦queue3ù¦usb@11201000#mediatek,mt8195-mtu3mediatek,mtu3 ' -ÿ > ¦macippcA ?+…€Ø/íBjsys_ckref_ckmcu_ck?@ &Ag•okay=hostEBusb@0'mediatek,mt8195-xhcimediatek,mtk-xhci'¦mac…� ,-°––$Ø/íB$jsys_ckref_ckmcu_ckdma_ckxhci_ck•okaymmc@11230000(mediatek,mt8195-mmcmediatek,mt8183-mmc '#õ…ƒØjsourcehclksource_cg•okaydefaultstate_uhsCDSC ëÂ]Ll~�ž­µ»ÉEÕFmmc@11240000(mediatek,mt8195-mmcmediatek,mt8183-mmc '$Ç…‡Ø$jsourcehclksource_cg °¿•okaydefaultstate_uhsGHG â�SC ëÂëü  ÉIÕJmmc@11250000(mediatek,mt8195-mmcmediatek,mt8183-mmc '%æ…ˆØ Ijsourcehclksource_cg  °¿ •disabledthermal-sensor@11278000mediatek,mt8195-lvts-mcu''€…ªØðQ56$]lvts-calib-data-1lvts-calib-data-2nø£usb@11290000'mediatek,mt8195-xhcimediatek,mtk-xhci '))> ¦macippc…K ./°––$Ø'ï'$jsys_ckref_ckmcu_ckdma_ckxhci_ck &Ah•okayEB usb@112a1000#mediatek,mt8195-mtu3mediatek,mtu3 '*-ÿ*> ¦macippcA*?+… 0°–Ø'ñ'jsys_ckref_ckmcu_ckL &Ai•okayEBusb@0'mediatek,mt8195-xhcimediatek,mtk-xhci'¦mac… 1°–Ø'jsys_ck•okayusb@112b1000#mediatek,mt8195-mtu3mediatek,mtu3 '+-ÿ+> ¦macippcA+?+… 2°–Ø'ó' jsys_ckref_ckmcu_ckM &Aj•okayEBusb@0'mediatek,mt8195-xhcimediatek,mtk-xhci'¦mac… 3°–Ø' jsys_ck•okaypcie@112f0000*mediatek,mt8195-pciemediatek,mt8192-pciepci+'/@ ¦pcie-mac… 3ÿ8A� ‚ à =N G0ØV#&+K'/jpl_250mtl_26mtl_96mtl_32kperi_26mperi_mem G°O Vpcie-phy¾+S `` sPPPP•okaydefaultQinterrupt-controller{SøPpcie@112f8000*mediatek,mt8195-pciemediatek,mt8192-pciepci+'/€@ ¦pcie-mac… 3ÿ8A�$$ ‚$ $ à =N G(ØWXQ'/jpl_250mtl_26mtl_96mtl_32kperi_26mperi_mem H°R Vpcie-phy¾+S `` sSSSS•okaydefaultTinterrupt-controller{SøSspi@1132c000(mediatek,mt8195-normediatek,mt8173-nor'2À…9Øo'' jspisfaxi+•okaydefaultUflash@0jedec,spi-nor'?u � ’efuse@11c10000%mediatek,mt8195-efusemediatek,efuse'Á+usb3-tx-imp@184,1'„ £ødusb3-rx-imp@184,2'„ £øcusb3-intr@185'… £øbusb3-tx-imp@186,1'† £øausb3-rx-imp@186,2'† £ø`usb3-intr@187'‡ £ø_usb2-intr-p0@188,1'ˆ £usb2-intr-p1@188,2'ˆ £usb2-intr-p2@189,1'‰ £usb2-intr-p3@189,2'‰ £pciephy-rx-ln1@190,1'� £økpciephy-tx-ln1-nmos@190,2'� £øjpciephy-tx-ln1-pmos@191,1'‘ £øipciephy-rx-ln0@191,2'‘ £øhpciephy-tx-ln0-nmos@192,1'’ £øgpciephy-tx-ln0-pmos@192,2'’ £øfpciephy-glb-intr@193'“ £øedp-data@1ac'¬ø¢lvts1-calib@1bc'¼ø5lvts2-calib@1d0'Ð8ø6svs-calib@580'€dø7socinfo-data1@7a0' t-phy@11c40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+AÄ•okayusb-phy@0'Øòjref ¨øLt-phy@11c50000.mediatek,mt8195-tphymediatek,generic-tphy-v3+AÅ•okayusb-phy@0'Øôjref ¨øMdsi-phy@11c800000mediatek,mt8195-mipi-txmediatek,mt8183-mipi-tx'ÈØ ômipi_tx0_pllË ¨ •disabledø’dsi-phy@11c900000mediatek,mt8195-mipi-txmediatek,mt8183-mipi-tx'ÉØ ômipi_tx1_pllË ¨ •disabledø“i2c@11d00000(mediatek,mt8195-i2cmediatek,mt8192-i2c 'Ð"€€…šßØV; jmaindma+ •disabledi2c@11d01000(mediatek,mt8195-i2cmediatek,mt8192-i2c 'Ð"€…›ßØV; jmaindma+•okayM€Wdefaultpmic@34mediatek,mt6360'4{ Çe�IRQBSregulatormediatek,mt6360-regulator ³X ÃX ÓXbuck1 íemi_vdd2ü 'Àw@ qHbuck2 íemi_vddqü“àÖ  qHldo1 ímt6360_ldo1üO€6î€qldo2 ípanel1_p1v8üw@w@qldo3ívmc_pmuüw@2Z qøJldo5 ívmch_pmuü2Z 2Z qøIldo6 ímt6360_ldo6ü¡  qldo7 íemi_vmddr_enüw@w@qHi2c@11d02000(mediatek,mt8195-i2cmediatek,mt8192-i2c 'Ð "€€…œßØV; jmaindma+ •disabledclock-controller@11d03000mediatek,mt8195-imp_iic_wrap_s'Ð0ËøVi2c@11e00000(mediatek,mt8195-i2cmediatek,mt8192-i2c 'à"€€…�ߨY; jmaindma+•okaydefaultZM† i2c@11e01000(mediatek,mt8195-i2cmediatek,mt8192-i2c 'à"€…“ߨY; jmaindma+•okaydefault[M† i2c@11e02000(mediatek,mt8195-i2cmediatek,mt8192-i2c 'à "€€…–ߨY; jmaindma+•okaydefault\M€i2c@11e03000(mediatek,mt8195-i2cmediatek,mt8192-i2c 'à0"€€…˜ßØY; jmaindma+•okaydefault]M† i2c@11e04000(mediatek,mt8195-i2cmediatek,mt8192-i2c 'à@"€…™ßØY; jmaindma+•okayM† ^defaultclock-controller@11e05000mediatek,mt8195-imp_iic_wrap_w'àPËøYt-phy@11e30000.mediatek,mt8195-tphymediatek,generic-tphy-v3+Aã¾+•okayusb-phy@0' Øð jrefda_ref ¨øKusb-phy@700'Øð jrefda_ref Q_`a]intrrx_imptx_imp ¨øRt-phy@11e40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+Aä•okayusb-phy@0' Øî jrefda_ref ¨ø?usb-phy@700'Øî jrefda_ref Qbcd]intrrx_imptx_imp ¨ø@phy@11e80000mediatek,mt8195-pcie-phy'è¦sifQefghijkG]glb_intrtx_ln0_pmostx_ln0_nmosrx_ln0tx_ln1_pmostx_ln1_nmosrx_ln1¾+ ¨•okayøOufs-phy@11fa0000.mediatek,mt8195-ufsphymediatek,mt8183-ufsphy'úÀØ junipromp ¨ •disabledgpu@13000000>mediatek,mt8195-malimediatek,mt8192-maliarm,mali-valhall-jm'@Øl0…�Œ‹ �jobmmugpu ãm(¾+ + + + + ÷core0core1core2core3core4•okay nclock-controller@13fbf000mediatek,mt8195-mfgcfg'ûðËølsyscon@14000000mediatek,mt8195-vppsys0syscon'Ë oødma-controller@14001000mediatek,mt8195-mdp3-rdma' o .  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