Ð þíbä8\È(\�SolidRun CN9130 Clearfog BaseD!solidrun,cn9130-clearfog-basesolidrun,cn9130-sr-sommarvell,cn9130aliases+,/ap807/config-space@f0000000/serial@512000+4/ap807/config-space@f0000000/serial@512100@ mpp0mpp1mpp2mpp3mpp4mpp5mpp6mpp7mpp8mpp9mpp10mpp12sdiogpio@1040!marvell,armada-8k-gpio'@.5EQ]Àp”clock!marvell,ap807-clock{system-controller@6f8000!sysconsimple-mfd¢o€thermal-sensor@80!marvell,armada-ap807-thermal¢€­ àˆ clock-cpu!marvell,ap807-cpu-clock”{thermal-zonesap-ic-thermalž´ tripsap-critÒ† ÞÐ écriticalcooling-mapsap-cpu0-thermalžè´è tripscpu0-hotÒLÞÐépassive cpu0-emergÒsÞÐépassivecooling-mapsmap0-hotî ó  map0-ermergîó  ap-cpu1-thermalžè´è tripscpu1-hotÒLÞÐépassivecpu1-emergÒsÞÐépassivecooling-mapsmap1-hotîó  map1-emergîó  ap-cpu2-thermalžè´è tripscpu2-hotÒLÞÐépassivecpu2-emergÒsÞÐépassivecooling-mapsmap2-hotîómap2-emergîóap-cpu3-thermalžè´è tripscpu3-hotÒLÞÐépassivecpu3-emergÒsÞÐépassivecooling-mapsmap3-bhotîómap3-emergîócp0-ic-thermalž´ÂtripscritÒ† ÞÐ écriticalcooling-mapscpuscpu@0cpu!arm,cortex-a72¢psci”+À8@JW€d@vƒ cpu@1cpu!arm,cortex-a72¢psci”+À8@JW€d@vƒ cpu@100cpu!arm,cortex-a72¢psci”+À8@JW€d@vƒcpu@101cpu!arm,cortex-a72¢psci”+À8@JW€d@vƒl2-cache0!cache-:@L” l2-cache1!cache-:@L” cp0 !simple-bus­›config-space@f2000000 !simple-bus›òethernet@0!marvell,armada-7k-pp22¢�°"<” *Êpp_clkgop_clkmg_clkmg_core_clkaxi_clk®ëokay¾ethernet-port@0Pà'+/37;?CG�2Èhif0hif1hif2hif3hif4hif5hif6hif7hif8link¢Øàëokayìin-band-statusô ù10gbase-rethernet-port@1Pà(,048<@DH€2Èhif0hif1hif2hif3hif4hif5hif6hif7hif8link¢Øàëokay ô!ùsgmiiethernet-port@2Pà)-159=AEI2Èhif0hif1hif2hif3hif4hif5hif6hif7hif8link¢Øàëokay¼default²" ùrgmii-id#phy@120000!marvell,comphy-cp110¢`®$”Êmg_clkmg_core_clkaxi_clkphy@0¢ .phy@1¢ )phy@2¢ phy@3¢ !phy@4¢ ,phy@5¢ 7mdio@12a200!marvell,orion-mdio¢¢0” ëokay²$ethernet-phy@0¢ð a#ledsled@0¢&wan,keepled@1¢&wan,keepethernet-phy@1¢ ð a?  ledsled@0¢&lan,keepled@1¢&lan,keepmdio@12a600!marvell,xmdio¢¦$” ëdisabledinterrupt-controller@1e0000!marvell,cp110-icu¢@interrupt-controller@10!marvell,cp110-icu-nsr¢ ò‰%interrupt-controller@50!marvell,cp110-icu-sei¢Pò‰ (rtc@284000!marvell,armada-8k-rtc¢(@ (@€$ :rtcrtc-socàMsystem-controller@440000!sysconsimple-mfd¢D clock!marvell,cp110-clock{gpio@100!marvell,armada-8k-gpio'. 5EQ& ]ðp àVUTSò Êcoreaxi”ëokay3sim-select-hogD/M Ysim-selectgpio@140!marvell,armada-8k-gpio'@.5EQ& ]ðp àRQPOò Êcoreaxi”ëokay:pinctrl!!marvell,cp115-standalone-pinctrl²'cdefault&cp0-ge2-rgmii-pinsH mpp44mpp45mpp46mpp47mpp48mpp49mpp50mpp51mpp52mpp53mpp54mpp55ge1"cp0-i2c0-pins  mpp37mpp38i2c01cp0-mdio-pins  mpp0mpp1ge$cp0-spi1-pins mpp13mpp14mpp15mpp16spi1/cp0-reg-vhv-pins mpp41gpio9cp0-i2c1-pins  mpp35mpp36i2c14cp0-mmc0-pins* mpp43mpp56mpp57mpp58mpp59mpp60mpp61sdio6cp0-spi1-cs1-pins mpp12spi10cp0-uart-pins  mpp2mpp3uart15cp0-expander0-pins mpp4gpio2cp0-rear-button-pins mpp31gpio<cp0-sim-select-pins mpp27gpio'system-controller@400000!sysconsimple-mfd¢@thermal-sensor@70!marvell,armada-cp110-thermal¢p p(tˆutmi@580000!marvell,cp110-utmi-phy¢X ®ëokayusb-phy@0¢ *usb-phy@1¢ -usb@500000$!marvell,armada-8k-xhcigeneric-xhci¢P@¾àj Êcorereg”ëokay ô)* „comphyutmiŽ+šhostusb@510000$!marvell,armada-8k-xhcigeneric-xhci¢Q@¾ài Êcorereg”ëokay ô,- „comphyutmišhostsata@540000$!marvell,armada-8k-ahcigeneric-ahci¢T¾àk”ëokayô.sata-port@1¢xor@6a0000%!marvell,armada-7k-xormarvell,xor-v2¢jk¾‰ Êcorereg”xor@6c0000%!marvell,armada-7k-xormarvell,xor-v2¢lm¾‰ Êcorereg”spi@700600!marvell,armada-380-spi¢pP Êcoreaxi” ëdisabledspi@700680!marvell,armada-380-spi¢p€P Êcoreaxi”ëokay¼default²/0¢kIÒflash@0!jedec,spi-nor¢¢úð€i2c@701000!marvell,mv78230-i2c¢p àx Êcorereg”ëokay¼default²1´† eeprom@53 !atmel,24c02¢SÄgpio-expander@20 !nxp,pca9555¢ 5E²2¼default­3à8pcie2-0-clkreq-hogD/ÍYpcie2.0-clkreqpcie2-0-w-disable-hogD/ÓYpcie2.0-w-disableusb3-ilimit-hogD/ÍYusb3-current-limitm2-devslp-hogD/ Ó Ym.2 devslpm2-full-card-power-off-hogD/ÓYm2-full-card-power-offm2-reset-hogD/ Ó Ym2-resetadc@4c!microchip,mcp3021¢Leeprom@52 !atmel,24c02¢RÄi2c@701100!marvell,mv78230-i2c¢p ày Êcorereg”ëokay´† ²4¼default;serial@702000!snps,dw-apb-uart¢p ›àz¥Êbaudclkapb_pclk”ëokay²5¼defaultserial@702100!snps,dw-apb-uart¢p!›à{¥Êbaudclkapb_pclk” ëdisabledserial@702200!snps,dw-apb-uart¢p"›à|¥Êbaudclkapb_pclk” ëdisabledserial@702300!snps,dw-apb-uart¢p#›à}¥Êbaudclkapb_pclk” ëdisablednand-controller@720000D!marvell,armada-8k-nand-controllermarvell,armada370-nand-controller¢rTàs Êcorereg”® ëdisabledtrng@7600003!marvell,armada-8k-rnginside-secure,safexcel-eip76¢v}à_ Êcorereg”ëokaymmc@780000!marvell,armada-cp110-sdhci¢xà Êcoreaxi”¾ëokay²6¼defaultòÞcrypto@800000!inside-secure,safexcel-eip197b¢€ 0àXYZ[\W Èring0ring1ring2ring3eipmem Êcorereg”¾pcie@f2600000#!marvell,armada8k-pciesnps,dw-pcie ¢ò`ßð :ctrlconfigòpci¾‰çÿ›‚ÀÀðñà Êcorereg”  ëdisabledpcie@f2620000#!marvell,armada8k-pciesnps,dw-pcie ¢òbàð :ctrlconfigòpci¾‰çÿ›‚ààðñà Êcorereg”  ëdisabledpcie@f2640000#!marvell,armada8k-pciesnps,dw-pcie ¢òdáð :ctrlconfigòpci¾‰çÿ›‚ááðñà Êcorereg” ëokayô7 8chosen(serial0:115200n8regulator-1-8!regulator-fixed41v8Cw@[w@regulator-vhv-1-8!regulator-fixed4vhv-1v8Cw@[w@²9¼default /: sregulator-usb3-vbus0!regulator-fixed4vbus0CLK@[LK@ /8+sfp!sff,sfp†; Ž8  ˜8 §8 ¸8 ÇÐgpio-keys !gpio-keys²<¼defaultbutton-0 ßRear Button /3å÷rfkill-m2-gnss !rfkill-gpio ßm.2 GNSSgps  8 rfkill-m2-wwan !rfkill-gpio ßm.2 WWANwwan  8 #address-cells#size-cellsmodelcompatibleserial0serial1gpio0spi0gpio1gpio2spi1spi2ethernet0ethernet1ethernet2i2c0mmc0rtc0i2c1mmc1methodrangesregno-mapinterrupt-parentdma-coherent#iommu-cells#global-interruptsstatus#interrupt-cellsinterrupt-controllerphandlemsi-controllerarm,msi-base-spiarm,msi-num-spismarvell,odmi-framesmarvell,spi-basemarvell,spi-rangesmsi-parentclocksreg-shiftreg-io-widthpinctrl-0pinctrl-namesclock-namesmarvell,xenon-phy-slow-modebus-widthvqmmc-supplymarvell,pinsmarvell,functionoffsetngpiosgpio-controller#gpio-cellsgpio-rangesmarvell,pwm-offset#pwm-cells#clock-cells#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistypetripcooling-devicedevice_typeenable-method#cooling-cellsi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecache-levelcache-unifiedmarvell,system-controllerinterrupt-namesport-idgop-port-idmanagedphysphy-modesfpphy#phy-cellsmarvell,reg-initcolordefault-statereg-namesgpio-hogoutput-highline-namepintrl-namesinterrupts-extendedphy-namesvbus-supplydr_modespi-max-frequencyclock-frequencypagesizeinputoutput-lowno-1-8-vbus-rangeinterrupt-map-maskinterrupt-mapnum-lanesreset-gpiosstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highi2c-buslos-gpiosmod-def0-gpiostx-disable-gpiostx-fault-gpiosmaximum-power-milliwattlabellinux,can-disablelinux,coderadio-typeshutdown-gpios