Ð þí ;8• ( ”è ",PHYTEC phyBOARD-Polis-i.MX8MM RDKF2phytec,imx8mm-phyboard-polis-rdkphytec,imx8mm-phycore-somfsl,imx8mmaliases&=/soc@0/bus@30800000/ethernet@30be0000"G/soc@0/bus@30000000/gpio@30200000"M/soc@0/bus@30000000/gpio@30210000"S/soc@0/bus@30000000/gpio@30220000"Y/soc@0/bus@30000000/gpio@30230000"_/soc@0/bus@30000000/gpio@30240000!e/soc@0/bus@30800000/i2c@30a20000!j/soc@0/bus@30800000/i2c@30a30000!o/soc@0/bus@30800000/i2c@30a40000!t/soc@0/bus@30800000/i2c@30a50000!y/soc@0/bus@30800000/mmc@30b40000!~/soc@0/bus@30800000/mmc@30b50000!ƒ/soc@0/bus@30800000/mmc@30b600006ˆ/soc@0/bus@30800000/spba-bus@30800000/serial@308600006�/soc@0/bus@30800000/spba-bus@30800000/serial@308900006˜/soc@0/bus@30800000/spba-bus@30800000/serial@30880000$ /soc@0/bus@30800000/serial@30a600003¨/soc@0/bus@30800000/spba-bus@30800000/spi@308200003­/soc@0/bus@30800000/spba-bus@30800000/spi@308300003²/soc@0/bus@30800000/spba-bus@30800000/spi@30840000(·/soc@0/bus@30800000/i2c@30a20000/rtc@52.¼/soc@0/bus@30000000/snvs@30370000/snvs-rtc-lpcpus idle-statesÁpscicpu-pd-wait2arm,idle-stateÎ3åöè¼ Œ(cpu@00cpu2arm,cortex-a53<@îlN×Upscic€p@‚�€œ@®€»Ìà ìspeed_gradeý ( cpu@10cpu2arm,cortex-a53<@îlN×Upscic€p@‚�€œ@®€»Ìý ( cpu@20cpu2arm,cortex-a53<@îlN×Upscic€p@‚�€œ@®€»Ìý ( cpu@30cpu2arm,cortex-a53<@îlN×Upscic€p@‚�€œ@®€»Ìý ( l2-cache02cache'3er@„(opp-table2operating-points-v2A(opp-1200000000LG†ŒS øParIðƒopp-1600000000L_^S~ða rIðƒopp-1800000000LkIÒSB@arIðƒclock-osc-32k 2fixed-clock�œ€¬osc_32k(clock-osc-24m 2fixed-clock�œn6¬osc_24m(clock-ext1 2fixed-clock�œík@ ¬clk_ext1(clock-ext2 2fixed-clock�œík@ ¬clk_ext2(clock-ext3 2fixed-clock�œík@ ¬clk_ext3(clock-ext4 2fixed-clock�œík@ ¬clk_ext4(psci 2arm,psci-1.0Çsmcpmu2arm,cortex-a53-pmu ¿timer2arm,armv8-timer0¿   œzÊthermal-zonescpu-thermaláú÷Ðtripstrip0L!Ð7passive( trip1s!Ð 7criticalcooling-mapsmap0, 01 ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿusbphynop1@2usb-nop-xceivN„K„[2 rmain_clk~(Nusbphynop2@2usb-nop-xceivN„K„[2 rmain_clk~(Qsoc@02fsl,imx8mm-socsimple-bus Œ>“@@Ààìsoc_unique_idbus@300000002fsl,aips-bussimple-bus<0@  Œ00@spba-bus@300000002fsl,spba-bussimple-bus <0Œsai@30010000ž2fsl,imx8mm-saifsl,imx8mq-sai<0 ¿_ N±°rbusmclk1mclk2mclk3 ¯´rxtx ¾disabledsai@30020000ž2fsl,imx8mm-saifsl,imx8mq-sai<0 ¿` N³²rbusmclk1mclk2mclk3 ¯´rxtx ¾disabledsai@30030000ž2fsl,imx8mm-saifsl,imx8mq-sai<0 ¿2 Nµ´rbusmclk1mclk2mclk3 ¯´rxtx ¾disabledsai@30050000ž2fsl,imx8mm-saifsl,imx8mq-sai<0 ¿Z N¹¸rbusmclk1mclk2mclk3 ¯ ´rxtx ¾disabledsai@30060000ž2fsl,imx8mm-saifsl,imx8mq-sai<0 ¿Z N»ºrbusmclk1mclk2mclk3 ¯  ´rxtx ¾disabledaudio-controller@300800002fsl,imx8mm-micfil<00¿mn,-(NØË&')ripg_clkipg_clk_apppll8kpll11kclkext3¯€´rxž ¾disabledspdif@300900002fsl,imx35-spdif<0  ¿PN^r^:rcorerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba ¯´rxtx ¾disabledgpio@302000002fsl,imx8mm-gpiofsl,imx35-gpio<0 ¿@ANßÅÕáö rLED_REDWDOG_INTX_RTC_INTRESET_ETHPHYCAN_nINTCAN_ENnENABLE_FLATLINKUSB_OTG_VBUS_ENLED_GREENLED_BLUE(#gpio@302100002fsl,imx8mm-gpiofsl,imx35-gpio<0!¿BCNàÅÕáö(RBT_REG_ONWL_REG_ONBT_DEV_WAKEBT_HOST_WAKEX_SD2_CD_BSD2_RESET_B('gpio@302200002fsl,imx8mm-gpiofsl,imx35-gpio<0"¿DENáÅÕáö=gpio@302300002fsl,imx8mm-gpiofsl,imx35-gpio<0#¿FGNâÅÕáöW *FANminiPCIe_nPERSTCOEX1COEX2(Wgpio@302400002fsl,imx8mm-gpiofsl,imx35-gpio<0$¿HINãÅÕáöwECSPI1_SS0( tmu@302600002fsl,imx8mm-tmu<0&NÑàìcalib#(watchdog@302800002fsl,imx8mm-wdtfsl,imx21-wdt<0( ¿NNľokay9Ndefault\watchdog@302900002fsl,imx8mm-wdtfsl,imx21-wdt<0) ¿ONÅ ¾disabledwatchdog@302a00002fsl,imx8mm-wdtfsl,imx21-wdt<0* ¿ NÆ ¾disableddma-controller@302c0000 2fsl,imx8mm-sdmafsl,imx8mq-sdma<0, ¿gNÔÔripgahbfqimx/sdma/sdma-imx7d.bin(dma-controller@302b0000 2fsl,imx8mm-sdmafsl,imx8mq-sdma<0+ ¿"NÕÕripgahbfqimx/sdma/sdma-imx7d.binpinctrl@303300002fsl,imx8mm-iomuxc<03(fec1grphŠhÐlÔÀ�ø�”ü�˜�œ�Œô�ˆð�|äxàtÜpØ„ì€èD¬(Fflexspi0grp�Šô\Âø`‚ t‚x‚|‚€‚(Bi2c1grp0Š€@À|@À(/i2c1gpiogrp0Š€à|à(0rtcgrpŠ4œÀ(3sn65dsi83grpŠP¸(1usdhc3grpŠpÐüd�hÐlЄРˆÐ$ŒÐ(�Ð0˜Ð8 �<¤Ð(?usdhc3-100mhzgrpŠpÔüd”hÔlÔ„Ô ˆÔ$ŒÔ(�Ô0˜Ô8 ”<¤Ô(@usdhc3-200mhzgrpŠpÖüd–hÖlÖ„Ö ˆÖ$ŒÖ(�Ö0˜Ö8 –<¤Ö(AwdoggrpŠ0˜&(btgrpHЏ À(Ä,(-can-engrpŠL´(acan-intgrpŠH°($ecspi1grp`Šüd€ø`€ô\€h(!ecspi2grp`Š t€p€l€x(&fan0grpŠ|ä(_i2c4grp0Š,”@Â0˜@Â(4i2c4gpiogrp0Š,”â0˜â(5leds1grpHŠ,”`ÈdÌ(`pciegrpHŠ€èŒô¨(Vregusdhc2vmmcgrpŠìT@(ctpmgrpŠÌ4@((uart1grp`Š´ô¸ ð°¼$()uart2btgrp`ŠÐ8øÔ<ÜDüØ@(+uart3grp0ŠD¬@H°@(*usbotg1pwrgrpŠXÀ(busdhc1grp�Š ‚¤ ƨƬưÆ´Æ(7usdhc2gpiogrpŠÐ8@(:usdhc2grp¨Š8 ÐÔ<’Ø@ÒÜDÒàHÒäLÒèPÒ(9usdhc2-100mhzgrp¨Š8 ÐÔ<”Ø@ÔÜDÔàHÔäLÔèPÔ(;usdhc2-200mhzgrp¨Š8 ÐÔ<–Ø@ÖÜDÖàHÖäLÖèPÖ(<wlangrpм$(8syscon@303400002fsl,imx8mm-iomuxc-gprsyscon<04(Defuse@303500002fsl,imx8mm-ocotpsyscon<05N¨ unique-id@4<(speed-grade@10<(calib@3c<<(mac-address@90<�(Cclock-controller@303600002fsl,imx8mm-anatop<06�snvs@30370000#2fsl,sec-v4.0-monsysconsimple-mfd<07(snvs-rtc-lp2fsl,sec-v4.0-mon-rtc-lp“š4¿Nä rsnvs-rtcsnvs-powerkey2fsl,sec-v4.0-pwrkey“ ¿Nä rsnvs-pwrkey¡t¯¾okaysnvs-lpgpr+2fsl,imx8mm-snvs-lpgprfsl,imx7d-snvs-lpgprclock-controller@303800002fsl,imx8mm-ccm<08¿UV�N4rosc_32kosc_24mclk_ext1clk_ext2clk_ext3clk_ext48KBû[^` [8,/8½ׄׄ,´€p(reset-controller@30390000%2fsl,imx8mm-srcfsl,imx8mq-srcsyscon<09 ¿YÒ(gpc@303a00002fsl,imx8mm-gpc<0: ¿Wáöpgc power-domain@0ß<NXKX[@(power-domain@1ß<~N©(Tpower-domain@2ß<(power-domain@3ß<(power-domain@4ß<NÈZKYZ[88½/¯ׄ(power-domain@5ß< NZÈÙÁó ~(Xpower-domain@6ß<NÒKT[8(Zpower-domain@7ß<([power-domain@8ß<(\power-domain@9ß< (]power-domain@10ß< NÎÍKUV[A8½Íe ëÂ(Kpower-domain@11ß< (Lbus@304000002fsl,aips-bussimple-bus<0@@  Œ0@0@@pwm@306600002fsl,imx8mm-pwmfsl,imx27-pwm<0f ¿QNªªripgperú ¾disabledpwm@306700002fsl,imx8mm-pwmfsl,imx27-pwm<0g ¿RN««ripgperú ¾disabledpwm@306800002fsl,imx8mm-pwmfsl,imx27-pwm<0h ¿SN¬¬ripgperú ¾disabledpwm@306900002fsl,imx8mm-pwmfsl,imx27-pwm<0i ¿TN­­ripgperú ¾disabledtimer@306a00002nxp,sysctr-timer<0j ¿/Nrperbus@308000002fsl,aips-bussimple-bus<0€@ Œ0€0€@spba-bus@308000002fsl,spba-bussimple-bus <0€Œspi@30820000!2fsl,imx8mm-ecspifsl,imx51-ecspi <0‚ ¿NŸŸripgper ¯´rxtx¾okay  Ndefault\!can@02microchip,mcp251xfdN"#¿Ndefault\$<1- %spi@30830000!2fsl,imx8mm-ecspifsl,imx51-ecspi <0ƒ ¿ N  ripgper ¯´rxtx¾okay  Ndefault\&tpm@0!2infineon,slb9670tcg,tpm_tis-spi'¿ Ndefault\(<� Àspi@30840000!2fsl,imx8mm-ecspifsl,imx51-ecspi <0„ ¿!N¡¡ripgper ¯´rxtx ¾disabledserial@308600002fsl,imx8mm-uartfsl,imx6q-uart<0† ¿N¼¼ripgper ¯´rxtx¾okayK[1Ndefault\)/serial@308800002fsl,imx8mm-uartfsl,imx6q-uart<0ˆ ¿N¾¾ripgper ¯´rxtx¾okayNdefault\*serial@308900002fsl,imx8mm-uartfsl,imx6q-uart<0‰ ¿N½½ripgper¾okayK€[1?Ndefault\+/bluetooth2brcm,bcm43438-btN,rlpo L' `host-wakeup'¿ p„€Ndefault\- z'‰.crypto@30900000 2fsl,sec-v4.0 <0� Œ0� ¿[N]_ raclkipgjr@10002fsl,sec-v4.0-job-ring< ¿i ¾disabledjr@20002fsl,sec-v4.0-job-ring<  ¿jjr@30002fsl,sec-v4.0-job-ring<0 ¿ri2c@30a200002fsl,imx8mm-i2cfsl,imx21-i2c <0¢ ¿#N¤¾okayœ€ Ndefaultgpio\/–0    ª pmic@8 2nxp,pf8121a<regulatorsldo1´ÈÚ2Z ò2Z  NVCC_SD1 (LDO1)regulator-state-memldo2´ÈÚ2Z òw@ NVCC_SD2 (LDO2)(>regulator-state-memldo3´ÈÚ&% òã` VCC_ENET_2V5 (LDO3)regulator-state-memldo4´ÈÚw@òã` VDDA_1V8 (LDO4)regulator-state-mem2Jã`jã`buck1´ÈÚ » ò€ VDD_SOC_VDDA_PHY_0P8 (BUCK1)regulator-state-mem2J€j€buck2´ÈÚB@òB@ VDD_GPU_DRAM (BUCK2)regulator-state-mem2jB@JB@buck3´ÈÚB@ò€ VDD_VPU (BUCK3)regulator-state-membuck4´ÈÚ�ò »  VDD_MIPI_0P9 (BUCK4)regulator-state-membuck5´ÈÚ�ò€ VDD_ARM (BUCK5)(regulator-state-membuck6´ÈÚw@òw@ VDD_1V8 (BUCK6)regulator-state-mem2jw@Jw@buck7´ÈÚÈàòÈà NVCC_DRAM_1P1V (BUCK7)vsnvs´ÈÚw@òw@ NVCC_SNVS_1P8 (VSNVS)bridge@2d 2ti,sn65dsi83 Š# Ndefault\1<- ¾disabledeeprom@51 2atmel,24c32— <Q 2rtc@522microcrystal,rv3028¿#Ndefault\3<R« ¸i2c@30a300002fsl,imx8mm-i2cfsl,imx21-i2c <0£ ¿$N¥ ¾disabledi2c@30a40000 2fsl,imx8mm-i2cfsl,imx21-i2c<0¤ ¿%N¦ ¾disabledi2c@30a500002fsl,imx8mm-i2cfsl,imx21-i2c <0¥ ¿&N§ ¾disabledœ€ Ndefaultgpio\4–5 ª    serial@30a600002fsl,imx8mm-uartfsl,imx6q-uart<0¦ ¿N¿¿ripgper ¯´rxtx ¾disabledmailbox@30aa00002fsl,imx8mm-mufsl,imx6sx-mu<0ª ¿XNÚØmmc@30b40000!2fsl,imx8mm-usdhcfsl,imx7d-usdhc<0´ ¿N_S ripgahbperäù ¾okayKy½ ëÂ6,Ndefault\78 wifi@12brcm,bcm4329-fmac<mmc@30b50000!2fsl,imx8mm-usdhcfsl,imx7d-usdhc<0µ ¿N_Sà ripgahbperäù ¾okayKz½ ë 5' >"Ndefaultstate_100mhzstate_200mhz\9:–;:I<:S=_>mmc@30b60000!2fsl,imx8mm-usdhcfsl,imx7d-usdhc<0¶ ¿N_SÐ ripgahbperäù ¾okayKнׄl"Ndefaultstate_100mhzstate_200mhz\?–@IAspi@30bb0000 2nxp,imx8mm-fspi<0»‚fspi_basefspi_mmap ¿kN®® rfspi_enfspi¾okayNdefault\Bflash@0 2jedec,spi-nor<Ä´Œ�dma-controller@30bd0000 2fsl,imx8mm-sdmafsl,imx8mq-sdma<0½ ¿NÓ]ripgahbfqimx/sdma/sdma-imx7d.bin(ethernet@30be0000-2fsl,imx8mm-fecfsl,imx8mq-fecfsl,imx6sx-fec<0¾0¿vwxy(N¢¢utv"ripgahbptpenet_clk_refenet_out KRutv [6:;9½õásY@®ÀàC ìmac-address ÒD¾okayà ñrgmii-idúENdefault\Fmdio ethernet-phy@02ethernet-phy-ieee802.3-c22ÿÿÿÿ-;P< e#qè�è(Ebus@32c000002fsl,aips-bussimple-bus<2À@  Œ2À2À@lcdif@32e00000"2fsl,imx8mm-lcdiffsl,imx6sx-lcdif<2àNkÎÍrpixaxidisp_axiKkUV[(A8 ½n6Íe ë ¿~G ¾disabledportendpoint“H(Idsi@32e100002fsl,imx8mm-mipi-dsim<2áNŽ�rbus_clksclk_mipiKŽ[6 ¿~G ¾disabledports port@0<endpoint“I(Hport@1<endpointcsi@32e200002fsl,imx8mm-csifsl,imx7-csi<2â ¿NÛrmclk~G ¾disabledportendpoint“J(Mblk-ctrl@32e28000 2fsl,imx8mm-disp-blk-ctrlsyscon<2â€~KKKLL'£buscsi-bridgelcdifmipi-dsimipi-csiPNÍÎÛÍÎÌŽ�’“orcsi-bridge-axicsi-bridge-apbcsi-bridge-corelcdif-axilcdif-apblcdif-pixdsi-pclkdsi-refcsi-aclkcsi-pclkß(Gmipi-csi@32e300002fsl,imx8mm-mipi-csi2<2ã ¿K’[AœÙ-@ NÎÛ“Írpclkwrapphyaxi~G ¾disabledports port@0<port@1<endpoint“M(Jusb@32e40000+2fsl,imx8mm-usbfsl,imx7d-usbfsl,imx27-usb<2ä ¿(NÀKX[@¶N»O~¾okayÇÓotgÛó  < HPusbmisc@32e4020072fsl,imx8mm-usbmiscfsl,imx7d-usbmiscfsl,imx6q-usbmisc T<2ä(Ousb@32e50000+2fsl,imx8mm-usbfsl,imx7d-usbfsl,imx27-usb<2å ¿)NÀKX[@¶Q»R~¾okay aÓhostó usbmisc@32e5020072fsl,imx8mm-usbmiscfsl,imx7d-usbmiscfsl,imx6q-usbmisc T<2å(Rpcie-phy@32f000002fsl,imx8mm-pcie-phy<2ðNhrrefKh½õá[:ó vpciephy@¾okay ‚ ™ ­- À(Udma-controller@33000000&2fsl,imx7d-dma-apbhfsl,imx28-dma-apbh<3 0¿    f ÓNÞ(Snand-controller@33002000)2fsl,imx8mm-gpmi-nandfsl,imx7d-gpmi-nand <3 3@@‚gpmi-nandbch ¿`bchN¯Þrgpmi_iogpmi_bch_apb¯S´rx-tx ¾disabledpcie@338000002fsl,imx8mm-pcie<3€@ð ‚dbiconfig 0pci àÿ0Œ�ø‚ð ê ô ¿z`msiö € }|{z " 5N©hirpciepcie_buspcie_aux~Tó vappsturnoff¶U Fpcie-phy¾okayKig[9>½˜–€æ²€Ndefault\V PW pcie-ep@338000002fsl,imx8mm-pcie-ep<3€@‚dbiaddr_space ê ¿`dma "N©hirpciepcie_buspcie_aux~Tó vappsturnoff¶U Fpcie-phy [ j ¾disabledgpu@38000000 2vivante,gc<8€ ¿ NZÈÁÁrregbuscoreshaderKø*[*½/¯~Xgpu@38008000 2vivante,gc<8€€ ¿NZÈÙ rregbuscoreKù*[*½/¯~Xvideo-codec@383000002nxp,imx8mm-vpu-g1<80 ¿NÇ~Yvideo-codec@383100002nxp,imx8mq-vpu-g2<81 ¿NÊ~Yblk-ctrl@383300002fsl,imx8mm-vpu-blk-ctrlsyscon<83~Z[\] £busg1g2h1NÇÊÉ rg1g2h1Kcd[++½#ÃF#ÃFß(Yinterrupt-controller@38800000 2arm,gic-v3<8€8ˆ öá ¿ (memory-controller@3d4000002fsl,imx8mm-ddrcfsl,imx8m-ddrc<=@@rcorepllaltapb NÜabÌ^opp-table2operating-points-v2(^opp-25000000L}x@opp-100000000Lõáopp-750000000L,´€ddr-pmu@3d800000%2fsl,imx8mm-ddr-pmufsl,imx8m-ddr-pmu<=€@ ¿bmemory@400000000memory<@€regulator-vdd-3v3-s2regulator-fixed´ÈÚ2Z ò2Z   VDD_3V3_S(2chosen6 y/soc@0/bus@30800000/spba-bus@30800000/serial@30880000bt-lp-clock 2fixed-clockœ€ ¬bt_osc_32k�(,can-clock 2fixed-clockœbZ ¬can_osc_40m�("fan 2gpio-fan W …2ÈNdefault\_ leds 2gpio-ledsNdefault\`led-0 ˜ ždisk # §mmc2led-1 ˜ ždisk # §mmc1led-2 ˜ žcpu # §heartbeatpwr-seq2mmc-pwrseq-simple ½d Ô< e'(6regulator-can-en2regulator-fixed V# Ndefault\aÚ2Z ò2Z  CAN_EN ç(%regulator-usb-otg12regulator-fixed V#  øNdefault\b usb_otg1_vbusÚLK@òLK@(Pregulator-usdhc22regulator-fixed V' ø N Ndefault\cÚ2Z ò2Z  VSD_3V3(=regulator-vcc-3v32regulator-fixedÚ2Z ò2Z  VCC_3V3(. interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0gpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3mmc0mmc1mmc2serial0serial1serial2serial3spi0spi1spi2rtc0rtc1entry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usphandledevice_typeregclock-latencyclocksenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2nvmem-cellsnvmem-cell-namescpu-idle-states#cooling-cellscpu-supplycache-levelcache-unifiedopp-sharedopp-hzopp-microvoltopp-supported-hwclock-latency-nsopp-suspend#clock-cellsclock-frequencyclock-output-namesinterruptsarm,no-tick-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-device#phy-cellsassigned-clocksassigned-clock-parentsclock-namespower-domainsrangesdma-ranges#sound-dai-cellsdmasdma-namesstatusgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsgpio-rangesgpio-line-names#thermal-sensor-cellsfsl,ext-reset-outputpinctrl-namespinctrl-0#dma-cellsfsl,sdma-ram-script-namefsl,pinsregmapoffsetlinux,keycodewakeup-sourceassigned-clock-rates#reset-cells#power-domain-cellsresets#pwm-cellscs-gpiosspi-max-frequencyxceiver-supplyuart-has-rtsctsfsl,dte-modedevice-wakeup-gpiosinterrupt-namesmax-speedshutdown-gpiosvddio-supplypinctrl-1scl-gpiossda-gpiosregulator-always-onregulator-boot-onregulator-max-microvoltregulator-min-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-min-microvoltregulator-suspend-max-microvoltenable-gpiospagesizevcc-supplyaux-voltage-chargeabletrickle-resistor-ohms#mbox-cellsfsl,tuning-start-tapfsl,tuning-stepbus-widthmmc-pwrseqnon-removableno-1-8-vcd-gpiosdisable-wppinctrl-2vmmc-supplyvqmmc-supplykeep-power-in-suspendreg-namesspi-rx-bus-widthspi-tx-bus-widthfsl,num-tx-queuesfsl,num-rx-queuesfsl,stop-modefsl,magic-packetphy-modephy-handleenet-phy-lane-no-swapti,clk-output-selti,fifo-depthti,rx-internal-delayti,tx-internal-delayreset-gpiosreset-assert-usreset-deassert-usremote-endpointpower-domain-namesphysfsl,usbmiscadp-disabledr_modeover-current-active-lowsamsung,picophy-pre-emp-curr-controlsamsung,picophy-dc-vol-level-adjustsrp-disablevbus-supply#index-cellsdisable-over-currentreset-namesfsl,clkreq-unsupportedfsl,refclk-pad-modefsl,tx-deemph-gen1fsl,tx-deemph-gen2dma-channelsbus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-mapfsl,max-link-speedlinux,pci-domainphy-namesreset-gpionum-ib-windowsnum-ob-windowsstdout-pathgpio-fan,speed-mapcolorfunctionlinux,default-triggerpost-power-on-delay-mspower-off-delay-usstartup-delay-usenable-active-highoff-on-delay-us