Ð þí˜ÍH’ (Á‘Ä€;solidrun,lx2162a-clearfogsolidrun,lx2162a-somfsl,lx2160a +7SolidRun LX2162A Clearfogaliases=/soc/rtc@2800000B/soc/crypto@8000000I/soc/i2c@2000000N/soc/i2c@2020000S/soc/i2c@2040000"X/soc/i2c@2020000/i2c-mux@70/i2c@0"]/soc/i2c@2020000/i2c-mux@70/i2c@1"b/soc/i2c@2020000/i2c-mux@70/i2c@2"g/soc/i2c@2020000/i2c-mux@70/i2c@3"l/soc/i2c@2020000/i2c-mux@71/i2c@0"q/soc/i2c@2020000/i2c-mux@71/i2c@1"v/soc/i2c@2020000/i2c-mux@71/i2c@2{/soc/i2c@2050000�/soc/mmc@2140000†/soc/mmc@2150000‹/soc/serial@21c0000cpus+cpu@0“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À!1@cpu@1“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À!1@cpu@100“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À!1@cpu@101“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À!1@cpu@200“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À!1@cpu@201“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À!1@cpu@300“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À!1@cpu@301“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À!1@cpu@400“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À!1@cpu@401“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À!1@cpu@500“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À !1@cpu@501“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À !1@cpu@600“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À !1@cpu@601“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À !1@cpu@700“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À !1@cpu@701“cpuarm,cortex-a72Ÿpsci­ ±¸€Å@×€äÀñ@À !1@l2-cache0cacheHºÇ@ÙV@l2-cache1cacheHºÇ@ÙV@l2-cache2cacheHºÇ@ÙV@l2-cache3cacheHºÇ@ÙV@l2-cache4cacheHºÇ@ÙV@l2-cache5cacheHºÇ@ÙV@ l2-cache6cacheHºÇ@ÙV@ l2-cache7cacheHºÇ@ÙV@ cpu-pw15arm,idle-statebPW15r‰ÐšÐªp@interrupt-controller@6000000 arm,gic-v3P­  »+ÌÓ è @msi-controller@6020000arm,gic-v3-itsó­@5timerarm,armv8-timer0è   pmuarm,cortex-a72-pmu èpsci arm,psci-0.2¦smcmemory@80000000“memory­€€memory-controller@1080000fsl,qoriq-memory-controller­ è memory-controller@1090000fsl,qoriq-memory-controller­  è sysclk fixed-clock(õá8sysclk@thermal-zonescluster6-7-thermalKèaˆo tripscluster6-7-alertL‹Ðšpassive@ cluster6-7-crits‹Ð šcriticalcooling-mapsmap0– À›ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿddr-ctrl5-thermalKèaˆo tripsddr-cluster5-alertL‹Ðšpassiveddr-cluster5-crits‹Ð šcriticalwriop-thermalKèaˆo tripswriop-alertL‹Ðšpassivewriop-crits‹Ð šcriticaldce-thermalKèaˆo tripsdce-qbman-alertL‹Ðšpassivedce-qbman-crits‹Ð šcriticalccn-thermalKèaˆo tripsccn-dpaa-alertL‹Ðšpassiveccn-dpaa-crits‹Ð šcriticalcluster4-thermalKèaˆo tripsclust4-hsio3-alertL‹Ðšpassiveclust4-hsio3-crits‹Ð šcriticalcluster2-3-thermalKèaˆo tripscluster2-3-alertL‹Ðšpassivecluster2-3-crits‹Ð šcriticalsoc simple-bus+̪phy@1ea0000 fsl,lynx-28g­ê0µÀokay@<phy@1eb0000 fsl,lynx-28g­ë0µÀokay@Hcrypto@8000000fsl,sec-v5.0fsl,sec-v4.0Ç +Ì­ è‹ÓÀokayjr@10000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ring­ èŒjr@20000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ring­ è�jr@30000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ring­ èŽjr@40000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ring­ è�clock-controller@1300000fsl,lx2160a-clockgen­0 ±@syscon@1e00000fsl,lx2160a-dcfgsyscon­à efuse@1e80000fsl,ls1028a-sfp­è ±àsfpsyscon@1f70000fsl,lx2160a-iscsyscon­÷ +Ì÷interrupt-controller@14&fsl,lx2160a-extirqfsl,ls1088a-extirq»Ó­ ì      útmu@1f80000fsl,qoriq-tmu­ø è €æ€}5T /@ i2c@2000000fsl,vf610-i2c+­ è"àipg ± EdefaultgpioS]  g! q!Àokayfan-controller@18 ti,amc6821­eeprom@51st,24c02atmel,24c02­Q{eeprom@57st,24c02atmel,24c02­Wi2c@2010000fsl,vf610-i2c+­ è"àipg ± EdefaultgpioS"]# g! q! Àdisabledi2c@2020000fsl,vf610-i2c+­ è#àipg ± EdefaultgpioS$]% g! q!Àokayi2c-mux@70 nxp,pca9546­p+…i2c@0+­@Yi2c@1+­@Zi2c@2+­@[i2c@3+­@\i2c-mux@71 nxp,pca9546­q+…i2c@0+­i2c@1+­i2c@2+­i2c@2030000fsl,vf610-i2c+­ è#àipg ± EdefaultgpioS&]' g! q! Àdisabledi2c@2040000fsl,vf610-i2c+­ èJàipg ± EdefaultgpioS(]) g! q!Àokayeeprom@54st,24c2048atmel,24c2048­Ti2c@2050000fsl,vf610-i2c+­ èJàipg ± EdefaultgpioS*]+ g! q!Àokayrtc@6fmicrochip,mcp7940x­oi2c@2060000fsl,vf610-i2c+­ èKàipg ± EdefaultgpioS,]- g. q. Àdisabledi2c@2070000fsl,vf610-i2c+­ èKàipg ± EdefaultgpioS,]- g. q. Àdisabledspi@20c0000nxp,lx2160a-fspi+ ­  �fspi_basefspi_mmap è± àfspi_enfspiÀokayEdefault S/01flash@0jedec,spi-nor­§¶úð€ÈÙspi@2100000"fsl,lx2160a-dspifsl,ls2085a-dspi+­ è ±àdspiêþ Àdisabledspi@2110000"fsl,lx2160a-dspifsl,ls2085a-dspi+­ è ±àdspiêþ Àdisabledspi@2120000"fsl,lx2160a-dspifsl,ls2085a-dspi+­ èñ ±àdspiêþ Àdisabledmmc@2140000fsl,ls2080a-esdhcfsl,esdhc­ è ±Ó ä ä ÏÀokayEdefaultS23&4ANmmc@2150000fsl,ls2080a-esdhcfsl,esdhc­ è? ±Ó ä ä[ ÏÀokayetcan@2180000fsl,lx2160ar1-flexcan­ è±àipgperƒ Àdisabledcan@2190000fsl,lx2160ar1-flexcan­ è±àipgperƒ Àdisabledserial@21c0000arm,pl011arm,primecell±àuartclkapb_pclk­ è Àokayserial@21d0000arm,pl011arm,primecell±àuartclkapb_pclk­ è! Àdisabledserial@21e0000arm,pl011arm,primecell±àuartclkapb_pclk­ èH Àdisabledserial@21f0000arm,pl011arm,primecell±àuartclkapb_pclk­ èI Àdisabledgpio@2300000 fsl,ls2080a-gpiofsl,qoriq-gpio­0 è$’ ¢Ó»@!gpio@2310000 fsl,ls2080a-gpiofsl,qoriq-gpio­1 è$’ ¢Ó»@.gpio@2320000 fsl,ls2080a-gpiofsl,qoriq-gpio­2 è%’ ¢Ó»@Xgpio@2330000 fsl,ls2080a-gpiofsl,qoriq-gpio­3 è%’ ¢Ó»watchdog@23a0000arm,sbsa-gwdt ­:9 è;®wakeup-controller@1e34040%fsl,lx2160a-rcpmfsl,qoriq-rcpm-2.1+­ã@@º @4rtc@2800000fsl,lx2160a-ftm-alarm­€ Ñ4@ è,usb@3100000 snps,dwc3­ èPáhosté  7Àokayusb@3110000 snps,dwc3­ èQáhosté  7 Àdisabledsata@3200000fsl,lx2160a-ahci ­  �ahcisata-ecc è… ±Ó Àdisabledsata@3210000fsl,lx2160a-ahci ­! �ahcisata-ecc èˆ ±Ó Àdisabledsata@3220000fsl,lx2160a-ahci ­" �ahcisata-ecc èa ±Ó Àdisabledsata@3230000fsl,lx2160a-ahci ­# �ahcisata-ecc èd ±Ó Àdisabledpcie@3400000fsl,lx2160a-pcie ­@€ �csr_axi_slaveconfig_axi_slave$èlll Waerpmeintr+“pciÓgq{ÿÌ‚@€@@…5»ú ìmnop�6 Àdisabledpcie@3500000fsl,lx2160a-pcie ­Pˆ �csr_axi_slaveconfig_axi_slave$èqqq Waerpmeintr+“pciÓgq{ÿÌ‚@ˆ@@…5»ú ìrstu�6 Àdisabledpcie@3600000fsl,lx2160a-pcie ­`� �csr_axi_slaveconfig_axi_slave$èvvv Waerpmeintr+“pciÓgq{ÿÌ‚@�@@…5»ú ìwxyz�6 Àdisabledpcie@3700000fsl,lx2160a-pcie ­p˜ �csr_axi_slaveconfig_axi_slave$è{{{ Waerpmeintr+“pciÓgq{ÿÌ‚@˜@@…5»ú ì|}~�6 Àdisabledpcie@3800000fsl,lx2160a-pcie ­€  �csr_axi_slaveconfig_axi_slave$耀€ Waerpmeintr+“pciÓgq{ÿÌ‚@ @@…5»ú ì�‚ƒ„�6 Àdisabledpcie@3900000fsl,lx2160a-pcie ­�¨ �csr_axi_slaveconfig_axi_slave$èggg Waerpmeintr+“pciÓgq{ÿÌ‚@¨@@…5»ú ìhijk�6 Àdisablediommu@5000000 arm,mmu-500­€š§¨è ÓÔÕÖרÙÚÛÜ’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§¨©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÓ@6console@8340020fsl,dpaa2-console­4 ptp-timer@8b95000fsl,dpaa2-ptp­¹P ± ºmdio@8b96000fsl,fman-memac-mdio­¹` èZ+ (&%  ±Àokayethernet-phy@1­ Àdisabledethernet-phy@8ethernet-phy-ieee802.3-c45­Éè@Kethernet-phy@9ethernet-phy-ieee802.3-c45­ Éè@Sethernet-phy@10ethernet-phy-ieee802.3-c45­ Éè@Iethernet-phy@11ethernet-phy-ieee802.3-c45­ Éè@Qethernet-phy@12ethernet-phy-ieee802.3-c45­ Éè@Uethernet-phy@13ethernet-phy-ieee802.3-c45­ Éè@Methernet-phy@14ethernet-phy-ieee802.3-c45­Éè@Wethernet-phy@15ethernet-phy-ieee802.3-c45­Éè@Omdio@8b97000fsl,fman-memac-mdio­¹p è[ +(&%  ± Àdisabledmdio@8c07000fsl,fman-memac-mdio­Àp + Àdisabledethernet-phy@0­@8mdio@8c0b000fsl,fman-memac-mdio­À° + Àdisabledethernet-phy@0­@9mdio@8c0f000fsl,fman-memac-mdio­Àð +Àokayethernet-phy@0­@:mdio@8c13000fsl,fman-memac-mdio­Á0 +Àokayethernet-phy@0­@=mdio@8c17000fsl,fman-memac-mdio­Áp +Àokayethernet-phy@0­@?mdio@8c1b000fsl,fman-memac-mdio­Á° +Àokayethernet-phy@0­@Amdio@8c1f000fsl,fman-memac-mdio­Áð + Àdisabledethernet-phy@0­@Cmdio@8c23000fsl,fman-memac-mdio­Â0 + Àdisabledethernet-phy@0­@Dmdio@8c27000fsl,fman-memac-mdio­Âp + Àdisabledethernet-phy@0­@Emdio@8c2b000fsl,fman-memac-mdio­° + Àdisabledethernet-phy@0­@Fmdio@8c2f000fsl,fman-memac-mdio­Âð +Àokayethernet-phy@0­@Gmdio@8c33000fsl,fman-memac-mdio­Ã0 +Àokayethernet-phy@0­@Jmdio@8c37000fsl,fman-memac-mdio­Ãp +Àokayethernet-phy@0­@Lmdio@8c3b000fsl,fman-memac-mdio­ð +Àokayethernet-phy@0­@Nmdio@8c3f000fsl,fman-memac-mdio­Ãð +Àokayethernet-phy@0­@Pmdio@8c43000fsl,fman-memac-mdio­Ä0 +Àokayethernet-phy@0­@Rmdio@8c47000fsl,fman-memac-mdio­Äp +Àokayethernet-phy@0­@Tmdio@8c4b000fsl,fman-memac-mdio­İ +Àokayethernet-phy@0­@Vpinmux@70010012cpinctrl-single­, +Óî  EdefaultS7iic2-i2c-pins )@"iic2-gpio-pins )@#iic2-ftm-pins )iic2-sdhc-pins )@2iic3-i2c-pins )8@$iic3-gpio-pins )8@%iic3-can-pins )8iic3-event-pins )08iic4-i2c-pins )À@&iic4-gpio-pins )@À@'iic4-can-pins )€Àiic4-event-pins )€Àiic5-i2c-pins )@(iic5-gpio-pins )@)iic5-sdhc-clk-pins )iic5-spi3-pins )iic6-i2c-pins )p@*iic6-gpio-pins )p@+iic6-sdhc-clk-pins ) pxspi1-data74-pins )€@/xspi1-data74-gpio-pins )€xspi1-data30-pins )@0xspi1-data30-gpio-pins )xspi1-base-pins )à@1xspi1-base-gpio-pins )àsdhc1-base-sdhc-vsel-pins )@3sdhc1-base-gpio-pins )sdhc1-base-spi1-pins )sdhc1-base-sdhc-spi3-pins )sdhc1-base-sdhc-data4-pins )sdhc1-dir-pins )8sdhc1-dir-gpio-pins )8@7sdhc1-dir-spi3-pins )8sdhc1-dir-sdhc-pins ) 8iic8-iic7-gpio-pins )@-iic8-iic7-i2c-pins )@,iic1-i2c-pins )@iic1-gpio-pins )@ fsl-mc@80c000000 fsl,qoriq-mc ­ @4…5�6Ó+0Ì dpmacs+ethernet@1fsl,qoriq-mc-dpmac­=8ethernet@2fsl,qoriq-mc-dpmac­=9ethernet@3fsl,qoriq-mc-dpmac­=:H;Lin-band-statusT<ethernet@4fsl,qoriq-mc-dpmac­==H>Lin-band-statusT<ethernet@5fsl,qoriq-mc-dpmac­=?H@Lin-band-statusT<ethernet@6fsl,qoriq-mc-dpmac­=AHBLin-band-statusT<ethernet@7fsl,qoriq-mc-dpmac­=Cethernet@8fsl,qoriq-mc-dpmac­=Dethernet@9fsl,qoriq-mc-dpmac­ =Eethernet@afsl,qoriq-mc-dpmac­ =Fethernet@bfsl,qoriq-mc-dpmac­ =GTHYIdsgmiiÀokayethernet@cfsl,qoriq-mc-dpmac­ =JTHYKdsgmiiÀokayethernet@dfsl,qoriq-mc-dpmac­ =LTHYMdsgmiiÀokayethernet@efsl,qoriq-mc-dpmac­=NTHYOdsgmiiÀokayethernet@ffsl,qoriq-mc-dpmac­=PTHYQdsgmiiÀokayethernet@10fsl,qoriq-mc-dpmac­=RTHYSdsgmiiÀokayethernet@11fsl,qoriq-mc-dpmac­=TYUdsgmiiTHÀokayethernet@12fsl,qoriq-mc-dpmac­=VTHYWdsgmiiÀokayfirmwareopteelinaro,optee-tz¦smc Àdisabledchosenxserial0:115200n8leds gpio-ledsled-sfp-at kX„offled-sfp-ab kX „offled-sfp-bt kX „offled-sfp-bb kX„offsfp-atsff,sfp’Y šX©Ð@;sfp-absff,sfp’Z šX©Ð@>sfp-btsff,sfp’[ šX ©Ð@@sfp-bbsff,sfp’\ šX©Ð@B compatibleinterrupt-parent#address-cells#size-cellsmodelrtc1cryptoi2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10mmc0mmc1serial0device_typeenable-methodregclocksd-cache-sized-cache-line-sized-cache-setsi-cache-sizei-cache-line-sizei-cache-setsnext-level-cachecpu-idle-states#cooling-cellsphandlecache-unifiedcache-levelidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-us#interrupt-cellsrangesinterrupt-controllerinterruptsmsi-controller#msi-cellslittle-endian#clock-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicedma-ranges#phy-cellsstatusfsl,sec-eradma-coherentclock-namesinterrupt-mapinterrupt-map-maskfsl,tmu-rangefsl,tmu-calibration#thermal-sensor-cellspinctrl-namespinctrl-0pinctrl-1scl-gpiossda-gpiosread-onlyi2c-mux-idle-disconnectreg-namesm25p,fast-readspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthspi-num-chipselectsbus-numvoltage-rangessdhci,auto-cmd12sd-uhs-sdr104sd-uhs-sdr50sd-uhs-sdr25sd-uhs-sdr12broken-cdmmc-hs200-1_8vmmc-hs400-1_8vfsl,clk-sourcegpio-controller#gpio-cellstimeout-sec#fsl,rcpm-wakeup-cellsfsl,rcpm-wakeupdr_modesnps,quirk-frame-length-adjustmentusb3-lpm-capablesnps,dis_rxdet_inp3_quirksnps,incr-burst-type-adjustmentinterrupt-namesapio-winsppio-winsbus-rangemsi-parentiommu-map#iommu-cells#global-interruptsfsl,extts-fifomax-speedpinctrl-single,bit-per-muxpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,bitspcs-handlesfpmanagedphysphy-handlephy-connection-typestdout-pathdefault-statei2c-busmod-def0-gpiosmaximum-power-milliwatt