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OtxrxwÀ�defaultcYGokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartþ¶áN:³¡-baudclkapb_pclkJ- - OtxrxwÁ�defaultcY Gdisabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartþ·áO:·¢-baudclkapb_pclkJŸ Ÿ OtxrxwÂ�defaultcY Gdisabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartþ¸áP:»£-baudclkapb_pclkJŸ Ÿ OtxrxwÃ�defaultcY Gdisabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartþ¹áQ:¿¤-baudclkapb_pclkJŸ ŸOtxrxwÄ�defaultcY Gdisabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartþºáR:Ã¥-baudclkapb_pclkJllOtxrxwÅ�defaultcY Gdisabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartþ»áS:Ǧ-baudclkapb_pclkJl l OtxrxwÆ�defaultcY Gdisabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartþ¼áT:˧-baudclkapb_pclkJl l OtxrxwÇ�defaultcY Gdisabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½:LK -pwmpclkwÈ�defaultp Gdisabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½:LK -pwmpclkwÉ�defaultp Gdisabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½ :LK -pwmpclkwÊ�defaultp Gdisabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½0:LK -pwmpclkwË�defaultp Gdisabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾:ON -pwmpclkwÌ�defaultp Gdisabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾:ON -pwmpclkwÍ�defaultp Gdisabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾ :ON -pwmpclkwÎ�defaultp Gdisabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾0:ON -pwmpclkwÏ�defaultp Gdisabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿:RQ -pwmpclkwÐ�defaultp Gdisabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿:RQ -pwmpclkwÑ�defaultp Gdisabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿ :RQ -pwmpclkwÒ�defaultp Gdisabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿0:RQ -pwmpclkwÓ�defaultp Gdisabledthermal-zonespackage-thermal N d rÔtripspackage-crit ‚Á8 Ž criticalbigcore0-thermal Nd d rÔtripsbigcore0-alert ‚L ŽÐpassive'Õbigcore0-crit ‚Á8 Ž criticalcooling-mapsmap0 ™Õ žÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿbigcore2-thermal Nd d rÔtripsbigcore2-alert ‚L ŽÐpassive'Öbigcore2-crit ‚Á8 Ž criticalcooling-mapsmap0 ™Ö žÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿlittlecore-thermal Nd d rÔtripslittlecore-alert ‚L ŽÐpassive'×littlecore-crit ‚Á8 Ž criticalcooling-mapsmap0 ™×0 žÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcenter-thermal N d rÔtripscenter-crit ‚Á8 Ž criticalgpu-thermal Nd d rÔtripsgpu-alert ‚L ŽÐpassive'Øgpu-crit ‚Á8 Ž criticalcooling-mapsmap0 ™Ø žÙÿÿÿÿÿÿÿÿnpu-thermal N d rÔtripsnpu-crit ‚Á8 Ž criticaltsadc@fec00000rockchip,rk3588-tsadcþÀá�:ž�-tsadcapb_pclkAžQ„€nVWHtsadc-apbtsadc ­ÔÀ Ä ÛwÚ öÛ�defaultsleep Gokay'Ôadc@fec10000rockchip,rk3588-saradcþÁᎠ:‘�-saradcapb_pclknU Hsaradc-apbGokay (Ü'õi2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2cþÈ:ˆ€ -i2cpclkáCwÝ�default+Gokayì @rtc@51haoyu,hym8563QÇühym8563�defaultwÞ µá 4i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2cþÉ:‰� -i2cpclkáDwß�default+ Gdisabledi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2cþÊ:Š‚ -i2cpclkáEwà�default+ Gdisabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiþËáJ:›–-spiclkapb_pclkJl lOtxrxê wáâã�default+ Gdisabledefuse@fecc0000rockchip,rk3588-otpþÌ :Œ‹��-otpapb_pclkphyarbn§¦¨ Hotpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c Bnpu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecellþÑ@ áZ[È:p -apb_pclkß'lphy@fed60000rockchip,rk3588-hdptx-phyþÖ : T-refapbT8n#cde!""Hphyapbinitcmnlaneroplllcplljä Gdisabledphy@fed80000rockchip,rk3588-usbdp-phyþØT:¡lVå-refclkimmortalpclkutmi(n   Hinitcmnlanepcs_apbpma_apb Gæ Zç kè �é Gdisabled'#phy@fee00000rockchip,rk3588-naneng-combphyþà:¨vW -refapbpipeA¨QõáTn<CHphyapb ‘* £êGokay'sphy@fee20000rockchip,rk3588-naneng-combphyþâ:ªxW -refapbpipeAªQõáTn>EHphyapb ‘* £ëGokay'(sram@ff001000 mmio-sramÿðÿð+pinctrlrockchip,rk3588-pinctrljì+'ígpio@fd8a0000rockchip,gpio-bankýŠá:qr Ô ¹í ˆ ä'µgpio@fec20000rockchip,gpio-bankþÂá:st Ô ¹í ˆ ä'pgpio@fec30000rockchip,gpio-bankþÃá:uv Ô ¹í@ ˆ ägpio@fec40000rockchip,gpio-bankþÄá:wx Ô ¹í` ˆ ä'tgpio@fec50000rockchip,gpio-bankþÅá:yz Ô ¹í€ ˆ ä'üpcfg-pull-up Å'òpcfg-pull-down Ò'ðpcfg-pull-none á'îpcfg-pull-none-drv-level-2 á î'ôpcfg-pull-up-drv-level-1 Å î'ópcfg-pull-up-drv-level-2 Å î'ïpcfg-pull-none-smt á ý'ñauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout î'†emmc-bus8€ ïïïïïïïï'‡emmc-clk ï'ˆemmc-cmd ï'‰emmc-data-strobe ð'Šeth1fspigmac1gmac1-miim îî'ygmac1-rx-bus20 îî î'{gmac1-tx-bus20  î î î'zgmac1-rgmii-clk îî'|gmac1-rgmii-bus@ îîîî'}gpuhdmii2c0i2c0m2-xfer ññ'+i2c1i2c1m0-xfer  ñ ñ'¨i2c2i2c2m0-xfer  ñ ñ'©i2c3i2c3m0-xfer  ñ ñ'ªi2c4i2c4m0-xfer  ñ ñ'«i2c5i2c5m0-xfer  ñ ñ'¬i2c6i2c6m0-xfer  ñ ñ'Ýi2c7i2c7m0-xfer  ñ ñ'ßi2c8i2c8m0-xfer  ñ ñ'ài2s0i2s0-lrck î'‹i2s0-sclk î'Œi2s0-sdi0 î'�i2s0-sdi1 î'Ži2s0-sdi2 î'�i2s0-sdi3 î'�i2s0-sdo0 î'‘i2s0-sdo1 î'’i2s0-sdo2 î'“i2s0-sdo3 î'”i2s1i2s1m0-lrck î'•i2s1m0-sclk î'–i2s1m0-sdi0 î'—i2s1m0-sdi1 î'˜i2s1m0-sdi2 î'™i2s1m0-sdi3 î'ši2s1m0-sdo0  î'›i2s1m0-sdo1  î'œi2s1m0-sdo2  î'�i2s1m0-sdo3  î'ži2s2i2s2m1-lrck î' i2s2m1-sclk  î'¡i2s2m1-sdi  î'¢i2s2m1-sdo  î'£i2s3i2s3-lrck î'¤i2s3-sclk î'¥i2s3-sdi î'¦i2s3-sdo î'§jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp òîîîîîî'¶pmupwm0pwm0m0-pins î'/pwm1pwm1m0-pins î'0pwm2pwm2m0-pins î'1pwm3pwm3m0-pins î'2pwm4pwm4m0-pins  î'Èpwm5pwm5m0-pins  î'Épwm6pwm6m0-pins  î'Êpwm7pwm7m0-pins  î'Ëpwm8pwm8m0-pins  î'Ìpwm9pwm9m0-pins  î'Ípwm10pwm10m0-pins  î'Îpwm11pwm11m0-pins  î'Ïpwm12pwm12m0-pins  î'Ðpwm13pwm13m0-pins  î'Ñpwm14pwm14m0-pins  î'Òpwm15pwm15m0-pins  î'Órefclksatasata0sata1sata2sdiosdiom1-pins` îòòòòò'…sdmmcsdmmc-bus4@ ïïïï'‚sdmmc-clk ï'sdmmc-cmd ï'€sdmmc-det ò'�sd-s0-pwr  ò'ýspdif0spdif1spi0spi0m0-pins0 óóó'¯spi0m0-cs0 ó'­spi0m0-cs1 ó'®spi1spi1m1-pins0 óóó'²spi1m1-cs0 ó'°spi1m1-cs1 ó'±spi2spi2m2-pins0 ó óó'´spi2m2-cs0  ó'³spi3spi3m1-pins0 ó óó'¾spi3m1-cs0 ó'¼spi3m1-cs1 ó'½spi4spi4m0-pins0 óóó'ãspi4m0-cs0 ó'áspi4m0-cs1 ó'âtsadctsadc-shut-org î'Úuart0uart0m1-xfer ò ò'.uart1uart1m1-xfer  ò ò'¿uart2uart2m0-xfer  ò ò'Àuart3uart3m1-xfer  ò ò'Áuart4uart4m1-xfer  ò ò'Âuart5uart5m1-xfer  ò ò'Ãuart6uart6m1-xfer  ò ò'Äuart7uart7m1-xfer  ò ò'Åuart8uart8m1-xfer  ò ò'Æuart9uart9m1-xfer  ò ò'Çvopbt656gpio-functsadc-gpio-func î'Ûgpio-keykey1-pin ò'ögpio-ledssys-led-pin î'÷wan-led-pin î'ølan1-led-pin î'ùlan2-led-pin î'úhym8563rtc-int ò'Þusbtypec5v-pwren î'þvcc5v0-host20-en  î'rtl8211frtl8211f-rst î'~opp-table-cluster0operating-points-v2 ' opp-1008000000 +<Ü 2 L¸ L¸~ð @œ@opp-1200000000 +G†Œ 2 ß4 ß4~ð @œ@opp-1416000000 +Tfr 2 ¢„ ¢„~ð @œ@ Qopp-1608000000 +_Ø" 2 øP øP~ð @œ@opp-1800000000 +kIÒ 2~ð~ð~ð @œ@opp-table-cluster1operating-points-v2 'opp-1200000000 +G†Œ 2 L¸ L¸B@ @œ@opp-1416000000 +Tfr 2  B@ @œ@opp-1608000000 +_Ø" 2 ¢„ ¢„B@ @œ@opp-1800000000 +kIÒ 2 øP øPB@ @œ@opp-2016000000 +x)¸ 2HHB@ @œ@opp-2208000000 +ƒ›h 2llB@ @œ@opp-2400000000 +�  2B@B@B@ @œ@opp-table-cluster2operating-points-v2 'opp-1200000000 +G†Œ 2 L¸ L¸B@ @œ@opp-1416000000 +Tfr 2  B@ @œ@opp-1608000000 +_Ø" 2 ¢„ ¢„B@ @œ@opp-1800000000 +kIÒ 2 øP øPB@ @œ@opp-2016000000 +x)¸ 2HHB@ @œ@opp-2208000000 +ƒ›h 2llB@ @œ@opp-2400000000 +�  2B@B@B@ @œ@opp-tableoperating-points-v2'!opp-300000000 +ᣠ2 L¸ L¸ øPopp-400000000 +ׄ 2 L¸ L¸ øPopp-500000000 +Íe 2 L¸ L¸ øPopp-600000000 +#ÃF 2 L¸ L¸ øPopp-700000000 +)¹' 2 ®` ®` øPopp-800000000 +/¯ 2 q° q° øPopp-900000000 +5¤é 2 5 5 øPopp-1000000000 +;šÊ 2 øP øP øPchosen ]serial2:1500000n8adc-keys adc-keys iõ ubuttons †w@  dbutton-maskrom ®Maskrom ´h ¿gpio-keys gpio-keys�defaultwöbutton-user ®User ´ rp Ù2leds gpio-ledsled-0 ®sys_led rp ëheartbeat�defaultw÷led-1 ®wan_led rp�defaultwøled-2 ®lan1_led rp�defaultwùled-3 ®user_led rp�defaultwúvcc5v0-sys-regulatorregulator-fixed ¬vcc5v0_sys»ÏáLK@ùLK@',vcc-1v1-nldo-s3-regulatorregulator-fixed¬vcc_1v1_nldo_s3»ÏáÈàùÈà&,'»vcc-3v3-s0-regulatorregulator-fixed»Ïá2Z ù2Z  ¬vcc_3v3_s0&ûvcc-3v3-sd-s0-regulatorregulator-fixed  rü �defaultwý¬vcc_3v3_sd_s0Ïù-ÆÀá-ÆÀ&û'ƒvcc3v3-pcie20-regulatorregulator-fixed¬vcc_3v3_pcie20»Ïá2Z ù2Z &û'qvcc5v0-usb-regulatorregulator-fixed ¬vcc5v0_usb»ÏáLK@ùLK@&,'ÿvcc5v0-usb-otg0-regulatorregulator-fixed  rp�defaultwþ¬vcc5v0_usb_otg0áLK@ùLK@&ÿvcc5v0-host-20-regulatorregulator-fixed  rü �defaultw¬vcc5v0_host_20áLK@ùLK@&ÿ') compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapclock-namespower-domainsstatusdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modetx_delayreset-assert-usreset-deassert-ussnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs200-1_8vrockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-csspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplywakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltdebounce-intervallinux,default-triggerenable-active-high