Ð þía¯8S(“Rä:friendlyarm,cm3588-nasfriendlyarm,cm3588rockchip,rk3588 +7FriendlyElec CM3588 NASaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000ƒ/i2c@feca0000ˆ/serial@fd890000�/serial@feb40000˜/serial@feb50000 /serial@feb60000¨/serial@feb70000°/serial@feb80000¸/serial@feb90000À/serial@feba0000È/serial@febb0000Ð/serial@febc0000Ø/spi@feb00000Ý/spi@feb10000â/spi@feb20000ç/spi@feb30000ì/spi@fecb0000ñ/mmc@fe2e0000ö/mmc@fe2c0000cpus+cpu-mapcluster0core0ûcore1ûcore2ûcore3ûcluster1core0ûcore1ûcluster2core0ûcore1û cpu@0ÿcpuarm,cortex-a55 psci0 7 G0£,\ l€y@‹€˜€¥@·€Ä Õäïþ cpu@100ÿcpuarm,cortex-a55 psci0 \ l€y@‹€˜€¥@·€ÄÕäïþ cpu@200ÿcpuarm,cortex-a55 psci0 \ l€y@‹€˜€¥@·€ÄÕäïþ cpu@300ÿcpuarm,cortex-a55 psci0 \ l€y@‹€˜€¥@·€ÄÕäïþ cpu@400ÿcpuarm,cortex-a76 psci0 7 G0£,\ ly@‹˜¥@·ÄÕ ïþcpu@500ÿcpuarm,cortex-a76 psci0 \ ly@‹˜¥@·ÄÕ ïþcpu@600ÿcpuarm,cortex-a76 psci0 7 G0£,\ ly@‹˜¥@·ÄÕ ïþcpu@700ÿcpuarm,cortex-a76 psci0 \ ly@‹˜¥@·ÄÕ ïþ idle-states%pscicpu-sleeparm,idle-state2CZdkx{è l2-cache-l0cachen{@�Œ˜Ä l2-cache-l1cachen{@�Œ˜Äl2-cache-l2cachen{@�Œ˜Äl2-cache-l3cachen{@�Œ˜Äl2-cache-b0cachen{@�Œ˜Äl2-cache-b1cachen{@�Œ˜Äl2-cache-b2cachen{@�Œ˜Äl2-cache-b3cachen{@�Œ˜Äl3-cachecachen0{@�Œ˜display-subsystemrockchip,display-subsystem¦firmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc¬‚·+protocol@14 ½ protocol@16 Êpmu-a55arm,cortex-a55-pmu×pmu-a76arm,cortex-a76-pmu×psci arm,psci-1.0smcclock-0 fixed-clockâ)׫€òspll½timerarm,armv8-timerP×    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockân6òxin24m½clock-2 fixed-clockâ€òxin32k½reserved-memory+shmem@10f000arm,scmi-shmem ðgpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf û ï7 G ëÂ0#corecoregroupstacksÕ ¦0×\]^ jobmmugpu/ =okayþ!D"P"Õusb@fc000000rockchip,rk3588-dwc3snps,dwc3 ü@×Ü0”“’#ref_clksuspend_clkbus_clk\otg d#$iusb2-phyusb3-phy sutmi_wide/ |Rƒ›³Ëì =okay/portendpoint?%Ýusb@fc800000"rockchip,rk3588-ehcigeneric-ehci ü€××0Ž�À&d'iusb/ =okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci ü„ר0Ž�À&d'iusb/ =okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci üˆ×Ú0�‘À(d)iusb/ =okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci üŒ×Û0�‘À(d)iusb/ =okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3 üÐ@×Þ(0jihkr&#ref_clksuspend_clkbus_clkutmipipe\hostd* iusb3-phy sutmi_wide|4ƒËì O=okayiommu@fc900000 arm,smmu-v3 ü� @×qsvoeventqgerrorpriqcmdq-synci =disablediommu@fcb00000 arm,smmu-v3 ü° @×}‚{eventqgerrorpriqcmdq-synci =disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfd ýX qsyscon@fd58c000rockchip,rk3588-sys-grfsyscon ýXÀlsyscon@fd5a4000rockchip,rk3588-vop-grfsyscon ýZ@ msyscon@fd5a6000rockchip,rk3588-vo0-grfsyscon ýZ` 0éèsyscon@fd5a8000rockchip,rk3588-vo1-grfsyscon ýZ€@0Ñnsyscon@fd5ac000rockchip,rk3588-usb-grfsyscon ýZÀ@æsyscon@fd5b0000rockchip,rk3588-php-grfsyscon ý[.syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon ý[Àësyscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon ý\@ìsyscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon ý\€@çsyscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]@+åusb2phy@0rockchip,rk3588-usb2phy ½0 #phyclk òusb480m_phy0׉|mvphyapb=okayäotg-port‚=okay�+#syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]€@+usb2phy@8000rockchip,rk3588-usb2phy €½0 #phyclk òusb480m_phy2ׇ|ovphyapb=okay&host-port‚=okay�,'syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]À@+usb2phy@c000rockchip,rk3588-usb2phy À½0 #phyclk òusb480m_phy3׈|p vphyapb=okay(host-port‚=okay�-)syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon ý^ãsyscon@fd5f0000rockchip,rk3588-iocsyscon ý_ísram@fd600000 mmio-sram ý`ý`+clock-controller@fd7c0000rockchip,rk3588-cru ý|À€7ÌÎ͆‡]qà@GA�«.à2©ø€FÏq)׫€ׄÍe/¯õáׄõá ëÂÍeZ ÀðÑ€ ë˜.½Êi2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c ýˆ×=0ts #i2cpclk¥/¯default+=okayregulator@42rockchip,rk8602 B½Úvdd_cpu_big0_s0éýdp'�?üT0regulator-state-mem_regulator@43 rockchip,rk8603rockchip,rk8602 C½Úvdd_cpu_big1_s0éýdp'�?üT0regulator-state-mem_serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uart ý‰×K0›œ#baudclkapb_pclkx11}txrx¥2¯default‡‘ =disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹0’‘ #pwmpclk¥3¯defaultž =disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹0’‘ #pwmpclk¥4¯defaultž=okaypwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹ 0’‘ #pwmpclk¥5¯defaultž =disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹00’‘ #pwmpclk¥6¯defaultž=okaypower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd ý�€opower-controller!rockchip,rk3588-power-controller©+=okay power-domain@8 ©+power-domain@9  0!#" ½789©+power-domain@10 0!#"½:©power-domain@11 0!#"½;©power-domain@12 0½<=>?©power-domain@13 +©power-domain@14 (0€¯­�½@©power-domain@15  0…¯­†½A©power-domain@16 0µ¶ ½BCD+©power-domain@17  0ºµ¶» ½EFG©power-domain@21 �0¯®­°›š�žŸ ¡¢£¤¥¦¨§ ½HIJKLMNO+©power-domain@23 0CA¯½P©power-domain@14  0€¯­�½@©power-domain@15 0…¯­½A©power-domain@22 0«ª½Q©power-domain@24 0[Z]½RS+©power-domain@25 80çèæäßÞZ½T©power-domain@26 80Q½UV©power-domain@27 00ÒÓÐÏÖÕ½WXYZ+©power-domain@28  0ÒÓ½[\©power-domain@29 (0ÇÆÊÉÓ½]^©power-domain@30 0z{½_©power-domain@31 @0WŒÀ�Ž��‘½`abc©power-domain@33 !0WZ[©power-domain@34 "0WZ[©power-domain@37 %0Š2½d©power-domain@38 &045©power-domain@40 (½e©video-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpu ýµ×wvdpu0±² #aclkhclkÄf/ iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu ýµ@×v #aclkiface0±²/ ifrga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rga ý¸€×t0¨§©#aclkhclksclk|rqp vcoreaxiahb/ video-codec@fdba0000rockchip,rk3588-vepu121 ýº×z0�ž #aclkhclkÄg/ iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu ýº@×y0�ž #aclkiface/ igvideo-codec@fdba4000rockchip,rk3588-vepu121 ýº@×|0Ÿ  #aclkhclkÄh/ iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommu ýºH@×{0Ÿ  #aclkiface/ ihvideo-codec@fdba8000rockchip,rk3588-vepu121 ýº€×~0¡¢ #aclkhclkÄi/ iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu ýºˆ@×}0¡¢ #aclkiface/ iivideo-codec@fdbac000rockchip,rk3588-vepu121 ýºÀ×€0£¤ #aclkhclkÄj/ iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu ýºÈ@×0£¤ #aclkiface/ ijvideo-codec@fdc70000rockchip,rk3588-av1-vpu ýÇ×lvdpu7ACGׄׄ0AC #aclkhclk/  |þýÿvop@fdd90000rockchip,rk3588-vop  ýÙBýÙPËvopgamma-lutל80]\abcd[7#aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vopÄk/ ˜lÕmæn÷o =disabledports+port@0+ port@1+ port@2+ port@3+ iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu  ýÙ~ýÙל0]\ #aclkifacei/  =disabledki2s@fddc0000rockchip,rk3588-i2s-tdm ýÜ׸0ììá#mclk_txmclk_rxhclk7êxp}tx/ |¸vtx-m =disabledi2s@fddf0000rockchip,rk3588-i2s-tdm ýß×¹0445#mclk_txmclk_rxhclk71xp}tx/ |Øvtx-m=okayi2s@fddfc000rockchip,rk3588-i2s-tdm ýßÀ×½000,#mclk_txmclk_rxhclk7-xp}rx/ |ìvrx-m =disabledqos@fdf35000rockchip,rk3588-qossyscon ýóP <qos@fdf35200rockchip,rk3588-qossyscon ýóR =qos@fdf35400rockchip,rk3588-qossyscon ýóT >qos@fdf35600rockchip,rk3588-qossyscon ýóV ?qos@fdf36000rockchip,rk3588-qossyscon ýó` _qos@fdf39000rockchip,rk3588-qossyscon ýó� dqos@fdf3d800rockchip,rk3588-qossyscon ýóØ eqos@fdf3e000rockchip,rk3588-qossyscon ýóà aqos@fdf3e200rockchip,rk3588-qossyscon ýóâ `qos@fdf3e400rockchip,rk3588-qossyscon ýóä bqos@fdf3e600rockchip,rk3588-qossyscon ýóæ cqos@fdf40000rockchip,rk3588-qossyscon ýô ]qos@fdf40200rockchip,rk3588-qossyscon ýô ^qos@fdf40400rockchip,rk3588-qossyscon ýô Wqos@fdf40500rockchip,rk3588-qossyscon ýô Xqos@fdf40600rockchip,rk3588-qossyscon ýô Yqos@fdf40800rockchip,rk3588-qossyscon ýô Zqos@fdf41000rockchip,rk3588-qossyscon ýô [qos@fdf41100rockchip,rk3588-qossyscon ýô \qos@fdf60000rockchip,rk3588-qossyscon ýö Bqos@fdf60200rockchip,rk3588-qossyscon ýö Cqos@fdf60400rockchip,rk3588-qossyscon ýö Dqos@fdf61000rockchip,rk3588-qossyscon ýö Eqos@fdf61200rockchip,rk3588-qossyscon ýö Fqos@fdf61400rockchip,rk3588-qossyscon ýö Gqos@fdf62000rockchip,rk3588-qossyscon ýö @qos@fdf63000rockchip,rk3588-qossyscon ýö0 Aqos@fdf64000rockchip,rk3588-qossyscon ýö@ Pqos@fdf66000rockchip,rk3588-qossyscon ýö` Hqos@fdf66200rockchip,rk3588-qossyscon ýöb Iqos@fdf66400rockchip,rk3588-qossyscon ýöd Jqos@fdf66600rockchip,rk3588-qossyscon ýöf Kqos@fdf66800rockchip,rk3588-qossyscon ýöh Lqos@fdf66a00rockchip,rk3588-qossyscon ýöj Mqos@fdf66c00rockchip,rk3588-qossyscon ýöl Nqos@fdf66e00rockchip,rk3588-qossyscon ýön Oqos@fdf67000rockchip,rk3588-qossyscon ýöp Qqos@fdf67200rockchip,rk3588-qossyscon ýör qos@fdf70000rockchip,rk3588-qossyscon ý÷ :qos@fdf71000rockchip,rk3588-qossyscon ý÷ ;qos@fdf72000rockchip,rk3588-qossyscon ý÷ 7qos@fdf72200rockchip,rk3588-qossyscon ý÷" 8qos@fdf72400rockchip,rk3588-qossyscon ý÷$ 9qos@fdf80000rockchip,rk3588-qossyscon ýø Tqos@fdf81000rockchip,rk3588-qossyscon ýø Uqos@fdf81200rockchip,rk3588-qossyscon ýø Vqos@fdf82000rockchip,rk3588-qossyscon ýø Rqos@fdf82200rockchip,rk3588-qossyscon ýø" Sdfi@fe060000 þrockchip,rk3588-dfi@×&0:÷qpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie,0?00CH>MR°)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ø÷öõôsyspmcmsglegacyerr6G`Zrrrrhyˆ0s0�dt ipcie-phy/ "Tóóó ó à@ À@0 @À@þóËdbiapbconfig|). vpwrpipe+=okay¯default¥u šv¦wlegacy-interrupt-controller¶6 ×õrpcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie,@O00DI?NSs)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ýüûúùsyspmcmsglegacyerr6G`Zxxxxhyˆ@s@�dy ipcie-phy/ "Tôôô ô à@ @0 A@þôËdbiapbconfig|*/ vpwrpipe+=okay¯default¥z šv¦{legacy-interrupt-controller¶6 ×úxethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a þ ×êémacirqeth_wake_irq(067Y^50#stmmacethclk_mac_refpclk_macaclk_macptp_ref/ !|$ vstmmaceth˜lË.Ü|ìý}~# =disabledmdiosnps,dwmac-mdio+stmmac-axi-config,6F|rx-queues-configV}queue0queue1tx-queues-configl~queue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci þ!×(0b_eTo#satapmaliverxoobrefasic‚+ =disabledsata-port@0 ”@dy isata-phy¡ ° sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci þ#×(0dagVq#satapmaliverxoobrefasic‚+ =disabledsata-port@0 ”@d* isata-phy¡ ° spi@fe2b0000 rockchip,sfc þ+@×Î0/0#clk_sfchclk_sfc+ =disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc þ,@×Ë 0  ­®#biuciuciu-driveciu-sample¿ÊðÑ€¯default¥€�‚/ (=okayØâóþ ƒ'„mmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc þ-@×Ì 0Š‹«¬#biuciuciu-driveciu-sample¿Ê ë¯default¥…/ % =disabledmmc@fe2e0000rockchip,rk3588-dwcmshc þ.×Í7-., G ëÂn6 ëÂ(0,*+-.#corebusaxiblocktimerÊ ëÂ¥†‡ˆ‰Š¯default(|vcorebusaxiblocktimer=okayØ4C]c‹'Œi2s@fe470000rockchip,rk3588-i2s-tdm þG×´0+/(#mclk_txmclk_rxhclk7)-x11}txrx/ &|*+ vtx-mrx-mq¯default¥�Ž��‘=okayi2s@fe480000rockchip,rk3588-i2s-tdm þH×µ0y}u#mclk_txmclk_rxhclkx11}txrx|^_ vtx-mrx-mq¯default(¥’“”•–—˜™š› =disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2s þI×¶0#i2s_clki2s_hclk7xœœ}txrx/ &¯default¥�žŸ  =disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2s þJ×·0%#i2s_clki2s_hclk7"xœœ}txrx/ &¯default¥¡¢£¤ =disabledinterrupt-controller@fe600000 arm,gic-v3  þ`þh× ¶Œþa–¨8¡6+msi-controller@fe640000arm,gic-v3-its þd¡°smsi-controller@fe660000arm,gic-v3-its þf¡°úppi-partitionsinterrupt-partition-0»interrupt-partition-1» dma-controller@fea10000arm,pl330arm,primecell þ¡@ ×VWÄ0n #apb_pclkÛ1dma-controller@fea30000arm,pl330arm,primecell þ£@ ×XYÄ0o #apb_pclkÛœi2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c þ©0ƒ{ #i2cpclk×>¥¥¯default+ =disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c þª0„| #i2cpclk×?¥¦¯default+=okayregulator@42rockchip,rk8602 B½ Úvdd_npu_s0éýdp'~ð?üT0regulator-state-mem_i2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c þ«0…} #i2cpclk×@¥§¯default+ =disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c þ¬0†~ #i2cpclk×A¥¨¯default+ =disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c þ­0‡ #i2cpclk×B¥©¯default+ =disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer þ® ×!0TW #pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt þ¯0dc #tclkpclk×;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spi þ°×F0—’#spiclkapb_pclkx11}txrx楪«¯default+ =disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spi þ±×G0˜“#spiclkapb_pclkx11}txrxæ ¥¬­®¯default+ =disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spi þ²×H0™”#spiclkapb_pclkxœœ}txrx楯°¯default+=okay7™G ëÂpmic@0rockchip,rk806  ±×¯default¥²³´µíB@ÿ 0 #0 /0 ;0 G0 S0 _0 k0 w0 ƒ0 �¶ �0 ª· ·· Ä0 Ð àdvs1-null-pins ìgpio_pwrctrl1 ñpin_fun0³dvs2-null-pins ìgpio_pwrctrl2 ñpin_fun0´dvs3-null-pins ìgpio_pwrctrl3 ñpin_fun0µregulatorsdcdc-reg1ýdp'~ð?0Ô Úvdd_gpu_s0 ú�"regulator-state-mem_dcdc-reg2éýdp'~ð?0ÔÚvdd_cpu_lit_s0regulator-state-mem_dcdc-reg3éý L¸' q°?0Ô Úvdd_log_s0regulator-state-mem_  q°dcdc-reg4éýdp'~ð?0Ô Úvdd_vdenc_s0regulator-state-mem_dcdc-reg5éý L¸' » ?0Ô Úvdd_ddr_s0regulator-state-mem_  øPdcdc-reg6éý Úvdd2_ddr_s3regulator-state-mem 2dcdc-reg7éý„€'„€?0ÔÚvdd_2v0_pldo_s3¶regulator-state-mem 2 „€dcdc-reg8éý2Z '2Z  Úvcc_3v3_s3‹regulator-state-mem 2 2Z dcdc-reg9éý Úvddq_ddr_s0regulator-state-mem_dcdc-reg10éýw@'w@ Úvcc_1v8_s3Œregulator-state-mem 2 w@pldo-reg1éýw@'w@ Úavcc_1v8_s0Øregulator-state-mem_pldo-reg2éýw@'w@ Úvcc_1v8_s0regulator-state-mem_ w@pldo-reg3éýO€'O€ Úavdd_1v2_s0regulator-state-mem_pldo-reg4éý2Z '2Z ?0Ô Úvcc_3v3_s0regulator-state-mem_pldo-reg5éýw@'2Z ?0Ô Úvccio_sd_s0„regulator-state-mem_pldo-reg6éýw@'w@ Úpldo6_s3regulator-state-mem 2 w@nldo-reg1éý q°' q° Úvdd_0v75_s3regulator-state-mem 2  q°nldo-reg2éý øP' øPÚvdd_ddr_pll_s0regulator-state-mem_  øPnldo-reg3éý q°' q° Úavdd_0v75_s0regulator-state-mem_nldo-reg4éý øP' øP Úvdd_0v85_s0regulator-state-mem_nldo-reg5éý q°' q° Úvdd_0v75_s0regulator-state-mem_spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spi þ³×I0š•#spiclkapb_pclkxœœ}txrxæ ¥¸¹º¯default+ =disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uart þ´×L0«Ÿ#baudclkapb_pclkx11 }txrx¥»¯default‘‡ =disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uart þµ×M0¯ #baudclkapb_pclkx1 1 }txrx¥¼¯default‘‡=okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uart þ¶×N0³¡#baudclkapb_pclkx1 1 }txrx¥½¯default‘‡ =disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uart þ·×O0·¢#baudclkapb_pclkxœ œ }txrx¥¾¯default‘‡ =disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uart þ¸×P0»£#baudclkapb_pclkxœ œ }txrx¥¿¯default‘‡ =disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uart þ¹×Q0¿¤#baudclkapb_pclkxœ œ}txrx¥À¯default‘‡=okayserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uart þº×R0Ã¥#baudclkapb_pclkxpp}txrx¥Á¯default‘‡ =disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uart þ»×S0Ǧ#baudclkapb_pclkxp p }txrx¥Â¯default‘‡ =disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uart þ¼×T0˧#baudclkapb_pclkxp p }txrx¥Ã¯default‘‡ =disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½0LK #pwmpclk¥Ä¯defaultž =disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½0LK #pwmpclk¥Å¯defaultž=okaypwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½ 0LK #pwmpclk¥Æ¯defaultž =disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½00LK #pwmpclk¥Ç¯defaultž =disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾0ON #pwmpclk¥È¯defaultž=okaypwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾0ON #pwmpclk¥É¯defaultž=okaypwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾ 0ON #pwmpclk¥Ê¯defaultž =disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾00ON #pwmpclk¥Ë¯defaultž =disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿0RQ #pwmpclk¥Ì¯defaultž =disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿0RQ #pwmpclk¥Í¯defaultž =disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿ 0RQ #pwmpclk¥Î¯defaultž=okaypwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿00RQ #pwmpclk¥Ï¯defaultž =disabledthermal-zonespackage-thermal J ` nÐtripspackage-crit ~Á8 Š criticalbigcore0-thermal Jd ` nÐtripsbigcore0-alert ~L ŠÐpassiveÑbigcore0-crit ~Á8 Š criticalcooling-mapsmap0 •Ñ šÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿbigcore2-thermal Jd ` nÐtripsbigcore2-alert ~L ŠÐpassiveÒbigcore2-crit ~Á8 Š criticalcooling-mapsmap0 •Ò šÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿlittlecore-thermal Jd ` nÐtripslittlecore-alert ~L ŠÐpassiveÓlittlecore-crit ~Á8 Š criticalcooling-mapsmap0 •Ó0 šÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcenter-thermal J ` nÐtripscenter-crit ~Á8 Š criticalgpu-thermal Jd ` nÐtripsgpu-alert ~L ŠÐpassiveÔgpu-crit ~Á8 Š criticalcooling-mapsmap0 •Ô šÕÿÿÿÿÿÿÿÿnpu-thermal J ` nÐtripsnpu-crit ~Á8 Š criticaltsadc@fec00000rockchip,rk3588-tsadc þÀ×�0ž�#tsadcapb_pclk7žG„€|VWvtsadc-apbtsadc ©ÔÀ À ×¥Ö òׯdefaultsleep ü=okayÐadc@fec10000rockchip,rk3588-saradc þÁ׎ 0‘�#saradcapb_pclk|U vsaradc-apb=okay $Øi2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c þÈ0ˆ€ #i2cpclk×C¥Ù¯default+=okayâ @rtc@51haoyu,hym8563 Q½òhym8563 ±×¯default¥Ú 0typec-portc@22 fcs,fusb302 " ±×¯default¥Û >+connectorusb-c-connector Jdual TUSB-C Zsource e�È qsource >+ports+port@0 endpoint?Üéport@1 endpoint?Ý%port@2 endpoint?Þêi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c þÉ0‰� #i2cpclk×D¥ß¯default+=okayâ @audio-codec@1brealtek,rt5616 71G»€01#mclki2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c þÊ0Š‚ #i2cpclk×E¥à¯default+=okayspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spi þË×J0›–#spiclkapb_pclkxp p}txrxæ¥áâ¯default+ =disabledefuse@fecc0000rockchip,rk3588-otp þÌ 0Œ‹��#otpapb_pclkphyarb|§¦¨ votpapbarb+cpu-code@2 id@7 cpu-leakage@17 cpu-leakage@18 cpu-leakage@19 log-leakage@1a gpu-leakage@1b cpu-version@1c  €npu-leakage@28 (codec-leakage@29 )dma-controller@fed10000arm,pl330arm,primecell þÑ@ ×Z[Ä0p #apb_pclkÛpphy@fed60000rockchip,rk3588-hdptx-phy þÖ 0 T#refapb‚8|#cde!""vphyapbinitcmnlaneroplllcpll˜ã =disabledphy@fed80000rockchip,rk3588-usbdp-phy þØ‚0¡lVä#refclkimmortalpclkutmi(|   vinitcmnlanepcs_apbpma_apb …å ˜æ ©ç ¿è=okay Ï Û îv üv$port+endpoint@0 ?éÜendpoint@1 ?êÞphy@fee00000rockchip,rk3588-naneng-combphy þà0¨vW #refapbpipe7¨Gõá‚|<Cvphyapb . ë=okayyphy@fee20000rockchip,rk3588-naneng-combphy þâ0ªxW #refapbpipe7ªGõá‚|>Evphyapb . ì=okay*sram@ff001000 mmio-sram ÿðÿð+pinctrlrockchip,rk3588-pinctrl˜í+îgpio@fd8a0000rockchip,gpio-bank ýŠ×0qr Ð 2î ¶ à6µ >MicroSD detect [SDMMC_DET_L]Pin 10 [UART0_RX_M0]Pin 08 [UART0_TX_M0/PWM4_M0]Pin 32 [PWM5_M1]USB3 Type-C [CC_INT_L]IR receiver [PWM3_IR_M0]User Button±gpio@fec20000rockchip,gpio-bank þÂ×0st Ð 2î ¶ à6­ >Pin 27 [UART6_RX_M1]Pin 28 [UART6_TX_M1]USB2 Type-A [USB2_PWREN]Pin 15Pin 26Pin 21 [SPI0_MISO_M2]Pin 19 [SPI0_MOSI_M2/UART4_RX_M2]Pin 23 [SPI0_CLK_M2/UART4_TX_M2]Pin 24 [SPI0_CS0_M2/UART7_RX_M2]Pin 22 [SPI0_CS1_M0/UART7_TX_M2]CSI-Pin 14 [MIPI_CAM2_CLKOUT]Headphone detect [HP_DET_L]USB3 Type-C [TYPEC5V_PWREN_H]5V Fan [PWM1_M1]HDMI-in detect [HDMIIRX_DET_L]Pin 05 [I2C8_SCL_M2]Pin 03 [I2C8_SDA_M2]gpio@fec30000rockchip,gpio-bank þÃ×0uv Ð 2î@ ¶ à6ù >SPI NOR Flash [FSPI_D0_M1]SPI NOR Flash [FSPI_D1_M1]SPI NOR Flash [FSPI_D2_M1]SPI NOR Flash [FSPI_D3_M1]SPI NOR Flash [FSPI_CLK_M1]SPI NOR Flash [FSPI_CSN0_M1]CSI-Pin 11 [MIPI_CAM2_RESET_L]CSI-Pin 12 [MIPI_CAM2_PDN_L] gpio@fec40000rockchip,gpio-bank þÄ×0wx Ð 2î` ¶ à6å >Pin 35 [SPI4_MISO_M1/PWM10_M0]Pin 38 [SPI4_MOSI_M1]Pin 40 [SPI4_CLK_M1/UART8_TX_M1]Pin 36 [SPI4_CS0_M1/UART8_RX_M1]Pin 37 [SPI4_CS1_M1]USB3-A #2 [USB3_2_PWREN]DSI-Pin 12 [LCD_RST]Buzzer [PWM8_M0]Pin 33 [PWM9_M0]DSI-Pin 10 [PWM2_M1/LCD_BL]Pin 07Pin 16Pin 18Pin 29 [UART3_TX_M1/PWM12_M0]Pin 31 [UART3_RX_M1/PWM13_M0]Pin 12DSI-Pin 08 [TP_INT_L]DSI-Pin 14 [TP_RST_L]Pin 11 [PWM14_M0]Pin 13 [PWM15_IR_M0]DSI-Pin 06 [I2C5_SCL_M0_TP]DSI-Pin 05 [I2C5_SDA_M0_TP]gpio@fec50000rockchip,gpio-bank þÅ×0yz Ð 2î€ ¶ à6Ô >M.2 M-Key Slot4 [M2_D_PERST_L]USB3-A #1 [USB3_TYPEC1_PWREN]M.2 M-Key Slot3 [M2_C_PERST_L]M.2 M-Key Slot2 [M2_B_PERST_L]M.2 M-Key Slot1 [M2_A_CLKREQ_L]M.2 M-Key Slot1 [M2_A_PERST_L]vpcfg-pull-up Nópcfg-pull-down [ñpcfg-pull-none jïpcfg-pull-none-drv-level-2 j wõpcfg-pull-up-drv-level-1 N wôpcfg-pull-up-drv-level-2 N wðpcfg-pull-none-smt j †òauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout ›ï†emmc-bus8€ ›ðððððððð‡emmc-clk ›ðˆemmc-cmd ›ð‰emmc-data-strobe ›ñŠeth1fspigmac1gpuhdmii2c0i2c0m2-xfer ›òò/i2c1i2c1m0-xfer › ò ò¥i2c2i2c2m0-xfer › ò ò¦i2c3i2c3m0-xfer › ò ò§i2c4i2c4m0-xfer › ò ò¨i2c5i2c5m0-xfer › ò ò©i2c6i2c6m0-xfer › ò òÙi2c7i2c7m0-xfer › ò òßi2c8i2c8m2-xfer › ò òài2s0i2s0-lrck ›ï�i2s0-mclk ›ïŽi2s0-sclk ›ï�i2s0-sdi0 ›ï�i2s0-sdo0 ›ï‘i2s1i2s1m0-lrck ›ï’i2s1m0-sclk ›ï“i2s1m0-sdi0 ›ï”i2s1m0-sdi1 ›ï•i2s1m0-sdi2 ›ï–i2s1m0-sdi3 ›ï—i2s1m0-sdo0 › ï˜i2s1m0-sdo1 › ï™i2s1m0-sdo2 › ïši2s1m0-sdo3 › ï›i2s2i2s2m1-lrck ›ï�i2s2m1-sclk › ïži2s2m1-sdi › ïŸi2s2m1-sdo › ï i2s3i2s3-lrck ›ï¡i2s3-sclk ›ï¢i2s3-sdi ›ï£i2s3-sdo ›ï¤jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp ›óïïïïïï²pmupwm0pwm0m0-pins ›ï3pwm1pwm1m1-pins › ï4pwm2pwm2m1-pins › ï5pwm3pwm3m0-pins ›ï6pwm4pwm4m1-pins › ïÄpwm5pwm5m1-pins › ïÅpwm6pwm6m0-pins › ïÆpwm7pwm7m0-pins › ïÇpwm8pwm8m0-pins › ïÈpwm9pwm9m0-pins › ïÉpwm10pwm10m0-pins › ïÊpwm11pwm11m0-pins › ïËpwm12pwm12m0-pins › ïÌpwm13pwm13m0-pins › ïÍpwm14pwm14m0-pins › ïÎpwm15pwm15m0-pins › ïÏrefclksatasata0sata1sata2sdiosdiom1-pins` ›ïóóóóó…sdmmcsdmmc-bus4@ ›ðððð‚sdmmc-clk ›ðsdmmc-cmd ›ð€sdmmc-det ›ó�sd-s0-pwr ›óspdif0spdif1spi0spi0m2-pins0 › ô ô ô«spi0m2-cs0 › ôªspi1spi1m1-pins0 ›ôôô®spi1m1-cs0 ›ô¬spi1m1-cs1 ›ô­spi2spi2m2-pins0 ›ô ôô°spi2m2-cs0 › ô¯spi3spi3m1-pins0 ›ô ôôºspi3m1-cs0 ›ô¸spi3m1-cs1 ›ô¹spi4spi4m1-pins0 ›ôôôâspi4m1-cs0 ›ôátsadctsadc-shut-org ›ïÖuart0uart0m0-xfer ›óó2uart1uart1m1-xfer › ó ó»uart2uart2m0-xfer › ó ó¼uart3uart3m1-xfer › ó ó½uart4uart4m2-xfer › ó ó¾uart5uart5m1-xfer › ó ó¿uart6uart6m1-xfer › ó óÀuart7uart7m2-xfer › ó óÁuart8uart8m1-xfer › ó óÂuart9uart9m1-xfer › ó óÃvopbt656gpio-functsadc-gpio-func ›ï×eth0gmac0gpio-ledsled-sys-pin ›ï led-usr-pin ›ïhym8563rtc-int ›óÚpciepcie2-2-rst ›ïzpcie2-0-rst › ïpcie2-1-rst ›ïupcie3x2-rst › ïþpcie3x4-rst ›ïûaudioheadphone-detect ›ïgpio-keykey1-pin ›óusbvcc-5v0-host20-en ›ïvcc-5v0-host30p1-en ›ïvcc-5v0-host30p2-en ›ïusb-typecusbc0-int ›óÛtypec-5v-pwr-en ›ïusb@fc400000rockchip,rk3588-dwc3snps,dwc3 ü@@×Ý0—–•#ref_clksuspend_clkbus_clk\host dö÷iusb2-phyusb3-phy sutmi_wide/ |SƒËì =okaysyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon ý[€ syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon ý\ syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon ý\À@ syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]@@+usb2phy@4000rockchip,rk3588-usb2phy @½0 #phyclk òusb480m_phy1׊|nvphyapb=okayotg-port‚=okay�øöi2s@fddc8000rockchip,rk3588-i2s-tdm ýÜ€×¼0ññî#mclk_txmclk_rxhclk7ïxp}tx/ |ºvtx-m =disabledi2s@fddf4000rockchip,rk3588-i2s-tdm ýß@׺099?#mclk_txmclk_rxhclk76xp}tx/ |Úvtx-m=okayi2s@fddf8000rockchip,rk3588-i2s-tdm ý߀×»0++'#mclk_txmclk_rxhclk7(xp}rx/ |Çvrx-m=okayi2s@fde00000rockchip,rk3588-i2s-tdm ýà×¾0&&"#mclk_txmclk_rxhclk7#xp}rx/ |îvrx-m =disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+,00@E;JOt)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×syspmcmsglegacyerr6G`Zùùùùhyˆú�dt ipcie-phy/ "Tððð ð à@ @0 @@þðËdbiapbconfig|&+ vpwrpipe=okay¯default¥û šv¦ülegacy-interrupt-controller¶6 ×ùpcie-ep@fe150000rockchip,rk3588-pcie-epP @ @þ @ @0Ëdbidbi2apbaddr_spaceatu00@E;JOt)#aclk_mstaclk_slvaclk_dbipclkauxpipe�× +syspmcmsglegacyerrdma0dma1dma2dma3y�dt ipcie-phy/ "|&+ vpwrpipe =disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+,00AF<KPu)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ÿþsyspmcmsglegacyerr6G`Zýýýýhyˆú�dt ipcie-phy/ "Tñññ ñ à@ @@0 @@@þñËdbiapbconfig|', vpwrpipe=okay¯default¥þ šv ¦ÿlegacy-interrupt-controller¶6 ×ÿýpcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie, /00BG=LQ¯)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×óòñðïsyspmcmsglegacyerr6G`Zhyˆ s �dt ipcie-phy/ "Tòòò ò à@ €@0 @€@þòËdbiapbconfig|(- vpwrpipe+=okay¯default¥ šv ¦legacy-interrupt-controller¶6 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compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapclock-namespower-domainsstatusmali-supplysram-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-hs400-1_8vmmc-hs400-enhanced-strobeno-sdnon-removablerockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-csspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplywakeup-sourcevbus-supplydata-rolelabelpower-rolesource-pdostry-power-rolebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfmode-switchorientation-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfdata-lanesopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathcolorlinux,default-triggerio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltsimple-audio-card,formatsimple-audio-card,hp-det-gpiosimple-audio-card,mclk-fssimple-audio-card,namesimple-audio-card,routingsimple-audio-card,widgetssound-daiamp-supplybeeper-hzpwmscooling-levelsfan-supplydebounce-intervalenable-active-high