Ð þíGo8:„( ë:Larmsom,sige7rockchip,rk3588 + 7ArmSoM Sige7aliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000ƒ/i2c@feca0000ˆ/serial@fd890000�/serial@feb40000˜/serial@feb50000 /serial@feb60000¨/serial@feb70000°/serial@feb80000¸/serial@feb90000À/serial@feba0000È/serial@febb0000Ð/serial@febc0000Ø/spi@feb00000Ý/spi@feb10000â/spi@feb20000ç/spi@feb30000ì/spi@fecb0000ñ/mmc@fe2e0000ö/mmc@fe2c0000cpus+cpu-mapcluster0core0ûcore1ûcore2ûcore3ûcluster1core0ûcore1ûcluster2core0ûcore1û cpu@0ÿcpuarm,cortex-a55 psci0 7 G0£,\ l€y@‹€˜€¥@·€Ä Õäïþ cpu@100ÿcpuarm,cortex-a55 psci0 \ l€y@‹€˜€¥@·€ÄÕäïþ cpu@200ÿcpuarm,cortex-a55 psci0 \ l€y@‹€˜€¥@·€ÄÕäïþ cpu@300ÿcpuarm,cortex-a55 psci0 \ l€y@‹€˜€¥@·€ÄÕäïþ cpu@400ÿcpuarm,cortex-a76 psci0 7 G0£,\ ly@‹˜¥@·ÄÕ ïþcpu@500ÿcpuarm,cortex-a76 psci0 \ ly@‹˜¥@·ÄÕ ïþcpu@600ÿcpuarm,cortex-a76 psci0 7 G0£,\ ly@‹˜¥@·ÄÕ ïþcpu@700ÿcpuarm,cortex-a76 psci0 \ ly@‹˜¥@·ÄÕ ïþ idle-states%pscicpu-sleeparm,idle-state2CZdkx{è l2-cache-l0cachen{@�Œ˜Ä l2-cache-l1cachen{@�Œ˜Äl2-cache-l2cachen{@�Œ˜Äl2-cache-l3cachen{@�Œ˜Äl2-cache-b0cachen{@�Œ˜Äl2-cache-b1cachen{@�Œ˜Äl2-cache-b2cachen{@�Œ˜Äl2-cache-b3cachen{@�Œ˜Äl3-cachecachen0{@�Œ˜display-subsystemrockchip,display-subsystem¦firmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc¬‚·+protocol@14 ½ protocol@16 Êpmu-a55arm,cortex-a55-pmu×pmu-a76arm,cortex-a76-pmu×psci arm,psci-1.0smcclock-0 fixed-clockâ)׫€òspll½timerarm,armv8-timerP×    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockân6òxin24m½clock-2 fixed-clockâ€òxin32k½reserved-memory+shmem@10f000arm,scmi-shmem ðgpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf û ï7 G ëÂ0#corecoregroupstacksÕ ¦0×\]^ jobmmugpu/ =okayþ!D"Íusb@fc000000rockchip,rk3588-dwc3snps,dwc3 ü@×Ü0”“’#ref_clksuspend_clkbus_clkPotg X#$]usb2-phyusb3-phy gutmi_wide/ pRw�§¿à =disabledusb@fc800000"rockchip,rk3588-ehcigeneric-ehci ü€××0Ž�À%X&]usb/  =disabledusb@fc840000"rockchip,rk3588-ohcigeneric-ohci ü„ר0Ž�À%X&]usb/  =disabledusb@fc880000"rockchip,rk3588-ehcigeneric-ehci üˆ×Ú0�‘À'X(]usb/ =okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci üŒ×Û0�‘À'X(]usb/ =okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3 üÐ@×Þ(0jihkr&#ref_clksuspend_clkbus_clkutmipipePhostX) ]usb3-phy gutmi_widep4w¿à# =disablediommu@fc900000 arm,smmu-v3 ü� @×qsvoeventqgerrorpriqcmdq-sync= =disablediommu@fcb00000 arm,smmu-v3 ü° @×}‚{eventqgerrorpriqcmdq-sync= =disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfd ýX nsyscon@fd58c000rockchip,rk3588-sys-grfsyscon ýXÀisyscon@fd5a4000rockchip,rk3588-vop-grfsyscon ýZ@ jsyscon@fd5a6000rockchip,rk3588-vo0-grfsyscon ýZ` 0éÞsyscon@fd5a8000rockchip,rk3588-vo1-grfsyscon ýZ€@0Ñksyscon@fd5ac000rockchip,rk3588-usb-grfsyscon ýZÀ@Üsyscon@fd5b0000rockchip,rk3588-php-grfsyscon ý[+syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon ý[Àßsyscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon ý\@àsyscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon ý\€@Ýsyscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]@+Ûusb2phy@0rockchip,rk3588-usb2phy ½0 #phyclk òusb480m_phy0׉pmJphyapb=okayÚotg-portV=okay#syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]€@+usb2phy@8000rockchip,rk3588-usb2phy €½0 #phyclk òusb480m_phy2ׇpoJphyapb =disabled%host-portV =disabled&syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]À@+usb2phy@c000rockchip,rk3588-usb2phy À½0 #phyclk òusb480m_phy3׈pp Jphyapb=okay'host-portV=okaya*(syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon ý^Ùsyscon@fd5f0000rockchip,rk3588-iocsyscon ý_ásram@fd600000 mmio-sram ý`ý`+clock-controller@fd7c0000rockchip,rk3588-cru ý|À€7ÌÎ͆‡]qà@GA�«.à2©ø€FÏq)׫€ׄÍe/¯õáׄõá ëÂÍeZ ÀðÑ€ ëÂl+½Êi2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c ýˆ×=0ts #i2cpclky,ƒdefault+=okayregulator@42rockchip,rk8602 B‘®vdd_cpu_big0_s0½Ñãdpû�ü(-regulator-state-mem3regulator@43 rockchip,rk8603rockchip,rk8602 C‘®vdd_cpu_big1_s0½Ñãdpû�ü(-regulator-state-mem3serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uart ý‰×K0›œ#baudclkapb_pclkL..Qtxrxy/ƒdefault[e =disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹0’‘ #pwmpclky0ƒdefaultr =disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹0’‘ #pwmpclky1ƒdefaultr=okaypwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹ 0’‘ #pwmpclky2ƒdefaultr =disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹00’‘ #pwmpclky3ƒdefaultr =disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd ý�€lpower-controller!rockchip,rk3588-power-controller}+=okay power-domain@8 }+power-domain@9  0!#" ‘456}+power-domain@10 0!#"‘7}power-domain@11 0!#"‘8}power-domain@12 0‘9:;<}power-domain@13 +}power-domain@14 (0€¯­�‘=}power-domain@15  0…¯­†‘>}power-domain@16 0µ¶ ‘?@A+}power-domain@17  0ºµ¶» ‘BCD}power-domain@21 �0¯®­°›š�žŸ ¡¢£¤¥¦¨§ ‘EFGHIJKL+}power-domain@23 0CA¯‘M}power-domain@14  0€¯­�‘=}power-domain@15 0…¯­‘>}power-domain@22 0«ª‘N}power-domain@24 0[Z]‘OP+}power-domain@25 80çèæäßÞZ‘Q}power-domain@26 80Q‘RS}power-domain@27 00ÒÓÐÏÖÕ‘TUVW+}power-domain@28  0ÒÓ‘XY}power-domain@29 (0ÇÆÊÉÓ‘Z[}power-domain@30 0z{‘\}power-domain@31 @0WŒÀ�Ž��‘‘]^_`}power-domain@33 !0WZ[}power-domain@34 "0WZ[}power-domain@37 %0Š2‘a}power-domain@38 &045}power-domain@40 (‘b}video-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpu ýµ×wvdpu0±² #aclkhclk˜c/ iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu ýµ@×v #aclkiface0±²/ =crga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rga ý¸€×t0¨§©#aclkhclksclkprqp Jcoreaxiahb/ video-codec@fdba0000rockchip,rk3588-vepu121 ýº×z0�ž #aclkhclk˜d/ iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu ýº@×y0�ž #aclkiface/ =dvideo-codec@fdba4000rockchip,rk3588-vepu121 ýº@×|0Ÿ  #aclkhclk˜e/ iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommu ýºH@×{0Ÿ  #aclkiface/ =evideo-codec@fdba8000rockchip,rk3588-vepu121 ýº€×~0¡¢ #aclkhclk˜f/ iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu ýºˆ@×}0¡¢ #aclkiface/ =fvideo-codec@fdbac000rockchip,rk3588-vepu121 ýºÀ×€0£¤ #aclkhclk˜g/ iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu ýºÈ@×0£¤ #aclkiface/ =gvideo-codec@fdc70000rockchip,rk3588-av1-vpu ýÇ×lvdpu7ACGׄׄ0AC #aclkhclk/  pþýÿvop@fdd90000rockchip,rk3588-vop  ýÙBýÙPŸvopgamma-lutל80]\abcd[7#aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vop˜h/ li©jºkËl =disabledports+port@0+ port@1+ port@2+ port@3+ iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu  ýÙ~ýÙל0]\ #aclkiface=/  =disabledhi2s@fddc0000rockchip,rk3588-i2s-tdm ýÜ׸0ììá#mclk_txmclk_rxhclk7êØLmQtx/ p¸Jtx-mï =disabledi2s@fddf0000rockchip,rk3588-i2s-tdm ýß×¹0445#mclk_txmclk_rxhclk71ØLmQtx/ pØJtx-mï =disabledi2s@fddfc000rockchip,rk3588-i2s-tdm ýßÀ×½000,#mclk_txmclk_rxhclk7-ØLmQrx/ pìJrx-mï =disabledqos@fdf35000rockchip,rk3588-qossyscon ýóP 9qos@fdf35200rockchip,rk3588-qossyscon ýóR :qos@fdf35400rockchip,rk3588-qossyscon ýóT ;qos@fdf35600rockchip,rk3588-qossyscon ýóV <qos@fdf36000rockchip,rk3588-qossyscon ýó` \qos@fdf39000rockchip,rk3588-qossyscon ýó� aqos@fdf3d800rockchip,rk3588-qossyscon ýóØ bqos@fdf3e000rockchip,rk3588-qossyscon ýóà ^qos@fdf3e200rockchip,rk3588-qossyscon ýóâ ]qos@fdf3e400rockchip,rk3588-qossyscon ýóä _qos@fdf3e600rockchip,rk3588-qossyscon ýóæ `qos@fdf40000rockchip,rk3588-qossyscon ýô Zqos@fdf40200rockchip,rk3588-qossyscon ýô [qos@fdf40400rockchip,rk3588-qossyscon ýô Tqos@fdf40500rockchip,rk3588-qossyscon ýô Uqos@fdf40600rockchip,rk3588-qossyscon ýô Vqos@fdf40800rockchip,rk3588-qossyscon ýô Wqos@fdf41000rockchip,rk3588-qossyscon ýô Xqos@fdf41100rockchip,rk3588-qossyscon ýô Yqos@fdf60000rockchip,rk3588-qossyscon ýö ?qos@fdf60200rockchip,rk3588-qossyscon ýö @qos@fdf60400rockchip,rk3588-qossyscon ýö Aqos@fdf61000rockchip,rk3588-qossyscon ýö Bqos@fdf61200rockchip,rk3588-qossyscon ýö Cqos@fdf61400rockchip,rk3588-qossyscon ýö Dqos@fdf62000rockchip,rk3588-qossyscon ýö =qos@fdf63000rockchip,rk3588-qossyscon ýö0 >qos@fdf64000rockchip,rk3588-qossyscon ýö@ Mqos@fdf66000rockchip,rk3588-qossyscon ýö` Eqos@fdf66200rockchip,rk3588-qossyscon ýöb Fqos@fdf66400rockchip,rk3588-qossyscon ýöd Gqos@fdf66600rockchip,rk3588-qossyscon ýöf Hqos@fdf66800rockchip,rk3588-qossyscon ýöh Iqos@fdf66a00rockchip,rk3588-qossyscon ýöj Jqos@fdf66c00rockchip,rk3588-qossyscon ýöl Kqos@fdf66e00rockchip,rk3588-qossyscon ýön Lqos@fdf67000rockchip,rk3588-qossyscon ýöp Nqos@fdf67200rockchip,rk3588-qossyscon ýör qos@fdf70000rockchip,rk3588-qossyscon ý÷ 7qos@fdf71000rockchip,rk3588-qossyscon ý÷ 8qos@fdf72000rockchip,rk3588-qossyscon ý÷ 4qos@fdf72200rockchip,rk3588-qossyscon ý÷" 5qos@fdf72400rockchip,rk3588-qossyscon ý÷$ 6qos@fdf80000rockchip,rk3588-qossyscon ýø Qqos@fdf81000rockchip,rk3588-qossyscon ýø Rqos@fdf81200rockchip,rk3588-qossyscon ýø Sqos@fdf82000rockchip,rk3588-qossyscon ýø Oqos@fdf82200rockchip,rk3588-qossyscon ýø" Pdfi@fe060000 þrockchip,rk3588-dfi@×&0:Ënpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?00CH>MR°)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ø÷öõôsyspmcmsglegacyerr `.oooo<M\0p0dX) ]pcie-phy/ "Tóóó ó à@ À@0 @À@þóŸdbiapbconfigp). Jpwrpipe+=okay nqlegacy-interrupt-controllerz  ×õopcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O00DI?NSs)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ýüûúùsyspmcmsglegacyerr `.rrrr<M\@p@dXs ]pcie-phy/ "Tôôô ô à@ @0 A@þôŸdbiapbconfigp*/ Jpwrpipe+=okay nqlegacy-interrupt-controllerz  ×úrethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a þ ×êémacirqeth_wake_irq(067Y^50#stmmacethclk_mac_refpclk_macaclk_macptp_ref/ !p$ Jstmmacethli�+ t°ÁuÔvç =disabledmdiosnps,dwmac-mdio+stmmac-axi-configðú trx-queues-configuqueue0queue1tx-queues-config0vqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci þ!×(0b_eTo#satapmaliverxoobrefasicF+ =disabledsata-port@0 X@Xs ]sata-phye t sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci þ#×(0dagVq#satapmaliverxoobrefasicF+ =disabledsata-port@0 X@X) ]sata-phye t spi@fe2b0000 rockchip,sfc þ+@×Î0/0#clk_sfchclk_sfc+ =disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc þ,@×Ë 0  ­®#biuciuciu-driveciu-sampleƒŽ ëƒdefaultywxyz/ (=okayœ¦¸ÉÔÜãñ{ý|mmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc þ-@×Ì 0Š‹«¬#biuciuciu-driveciu-sampleƒŽ ëƒdefaulty}/ % =disabledmmc@fe2e0000rockchip,rk3588-dwcmshc þ.×Í7-., G ëÂn6 ëÂ(0,*+-.#corebusaxiblocktimerŽ ëÂy~€�‚ƒdefault(pJcorebusaxiblocktimer=okayœÔ i2s@fe470000rockchip,rk3588-i2s-tdm þG×´0+/(#mclk_txmclk_rxhclk7)-ØL..Qtxrx/ &p*+ Jtx-mrx-m-ƒdefaultyƒ„…†‡ï=okayportüendpointHi2sS[ˆÔi2s@fe480000rockchip,rk3588-i2s-tdm þH×µ0y}u#mclk_txmclk_rxhclkL..Qtxrxp^_ Jtx-mrx-m-ƒdefault(y‰Š‹Œ�Ž��‘’ï =disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2s þI×¶0#i2s_clki2s_hclk7ØL““Qtxrx/ &ƒdefaulty”•–—ï =disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2s þJ×·0%#i2s_clki2s_hclk7"ØL““Qtxrx/ &ƒdefaulty˜™š›ï =disabledinterrupt-controller@fe600000 arm,gic-v3  þ`þh× zkþau¨8€ +msi-controller@fe640000arm,gic-v3-its þd€�pmsi-controller@fe660000arm,gic-v3-its þf€�íppi-partitionsinterrupt-partition-0šinterrupt-partition-1š dma-controller@fea10000arm,pl330arm,primecell þ¡@ ×VW£0n #apb_pclkº.dma-controller@fea30000arm,pl330arm,primecell þ£@ ×XY£0o #apb_pclkº“i2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c þ©0ƒ{ #i2cpclk×>yœƒdefault+ =disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c þª0„| #i2cpclk×?y�ƒdefault+ =disabledi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c þ«0…} #i2cpclk×@yžƒdefault+ =disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c þ¬0†~ #i2cpclk×AyŸƒdefault+ =disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c þ­0‡ #i2cpclk×By ƒdefault+ =disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer þ® ×!0TW #pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt þ¯0dc #tclkpclk×;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spi þ°×F0—’#spiclkapb_pclkL..QtxrxÅ y¡¢£ƒdefault+ =disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spi þ±×G0˜“#spiclkapb_pclkL..QtxrxÅ y¤¥¦ƒdefault+ =disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spi þ²×H0™”#spiclkapb_pclkL““QtxrxÅy§¨ƒdefault+=okay7™G ëÂpmic@0rockchip,rk806ÌB@  ©×Þîƒdefaultyª«¬­ú - - *- 6- B- N- Z- f- r- ~- ‹® ˜- ¥¯ ²¯ ¿-dvs1-null-pins Ëgpio_pwrctrl1 Ðpin_fun0«dvs2-null-pins Ëgpio_pwrctrl2 Ðpin_fun0¬dvs3-null-pins Ëgpio_pwrctrl3 Ðpin_fun0­regulatorsdcdc-reg1½Ñãdpû~ð0Ô ®vdd_gpu_s0 Ù�"regulator-state-mem3dcdc-reg2½Ñãdpû~ð0Ô®vdd_cpu_lit_s0regulator-state-mem3dcdc-reg3½Ñã L¸û q°0Ô ®vdd_log_s0regulator-state-mem3 õ q°dcdc-reg4½Ñãdpû~ð0Ô ®vdd_vdenc_s0regulator-state-mem3dcdc-reg5½Ñã L¸û » 0Ô ®vdd_ddr_s0regulator-state-mem3 õ øPdcdc-reg6½Ñ ®vdd2_ddr_s3regulator-state-mem dcdc-reg7½Ñã„€û„€0Ô®vdd_2v0_pldo_s3®regulator-state-mem  õ„€dcdc-reg8½Ñã2Z û2Z  ®vcc_3v3_s3{regulator-state-mem  õ2Z dcdc-reg9½Ñ ®vddq_ddr_s0regulator-state-mem3dcdc-reg10½Ñãw@ûw@ ®vcc_1v8_s3regulator-state-mem  õw@pldo-reg1½Ñãw@ûw@ ®avcc_1v8_s0Ðregulator-state-mem3pldo-reg2½Ñãw@ûw@ ®vcc_1v8_s0regulator-state-mem3 õw@pldo-reg3½ÑãO€ûO€ ®avdd_1v2_s0regulator-state-mem3pldo-reg4½Ñã2Z û2Z 0Ô ®vcc_3v3_s0regulator-state-mem3pldo-reg5½Ñãw@û2Z 0Ô ®vccio_sd_s0|regulator-state-mem3pldo-reg6½Ñãw@ûw@ ®pldo6_s3regulator-state-mem  õw@nldo-reg1½Ñã q°û q° ®vdd_0v75_s3regulator-state-mem  õ q°nldo-reg2½Ñã øPû øP®vdd_ddr_pll_s0regulator-state-mem3 õ øPnldo-reg3½Ñã q°û q° ®avdd_0v75_s0regulator-state-mem3nldo-reg4½Ñã øPû øP ®vdd_0v85_s0regulator-state-mem3nldo-reg5½Ñã q°û q° ®vdd_0v75_s0regulator-state-mem3spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spi þ³×I0š•#spiclkapb_pclkL““QtxrxÅ y°±²ƒdefault+ =disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uart þ´×L0«Ÿ#baudclkapb_pclkL.. Qtxrxy³ƒdefaulte[ =disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uart þµ×M0¯ #baudclkapb_pclkL. . Qtxrxy´ƒdefaulte[=okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uart þ¶×N0³¡#baudclkapb_pclkL. . Qtxrxyµƒdefaulte[ =disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uart þ·×O0·¢#baudclkapb_pclkL“ “ Qtxrxy¶ƒdefaulte[ =disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uart þ¸×P0»£#baudclkapb_pclkL“ “ Qtxrxy·ƒdefaulte[ =disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uart þ¹×Q0¿¤#baudclkapb_pclkL“ “Qtxrxy¸ƒdefaulte[ =disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uart þº×R0Ã¥#baudclkapb_pclkLmmQtxrxy¹ƒdefaulte[ =disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uart þ»×S0Ǧ#baudclkapb_pclkLm m Qtxrxyºƒdefaulte[ =disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uart þ¼×T0˧#baudclkapb_pclkLm m Qtxrxy»ƒdefaulte[ =disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½0LK #pwmpclky¼ƒdefaultr =disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½0LK #pwmpclky½ƒdefaultr =disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½ 0LK #pwmpclky¾ƒdefaultr =disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½00LK #pwmpclky¿ƒdefaultr =disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾0ON #pwmpclkyÀƒdefaultr =disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾0ON #pwmpclkyÁƒdefaultr =disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾ 0ON #pwmpclkyƒdefaultr =disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾00ON #pwmpclkyÃdefaultr =disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿0RQ #pwmpclkyădefaultr =disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿0RQ #pwmpclkyŃdefaultr =disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿ 0RQ #pwmpclkyƃdefaultr =disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿00RQ #pwmpclkyǃdefaultr =disabledthermal-zonespackage-thermal ) ? MÈtripspackage-crit ]Á8 i criticalbigcore0-thermal )d ? MÈtripsbigcore0-alert ]L iÐpassiveÉbigcore0-crit ]Á8 i criticalcooling-mapsmap0 tÉ yÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿbigcore2-thermal )d ? MÈtripsbigcore2-alert ]L iÐpassiveÊbigcore2-crit ]Á8 i criticalcooling-mapsmap0 tÊ yÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿlittlecore-thermal )d ? MÈtripslittlecore-alert ]L iÐpassiveËlittlecore-crit ]Á8 i criticalcooling-mapsmap0 tË0 yÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcenter-thermal ) ? MÈtripscenter-crit ]Á8 i criticalgpu-thermal )d ? MÈtripsgpu-alert ]L iÐpassiveÌgpu-crit ]Á8 i criticalcooling-mapsmap0 tÌ yÍÿÿÿÿÿÿÿÿnpu-thermal ) ? MÈtripsnpu-crit ]Á8 i criticaltsadc@fec00000rockchip,rk3588-tsadc þÀ×�0ž�#tsadcapb_pclk7žG„€pVWJtsadc-apbtsadc ˆÔÀ Ÿ ¶yÎ Ñσdefaultsleep Û=okayÈadc@fec10000rockchip,rk3588-saradc þÁ׎ ñ0‘�#saradcapb_pclkpU Jsaradc-apb=okay Ði2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c þÈ0ˆ€ #i2cpclk×Cyуdefault+=okayrtc@51haoyu,hym8563 Q ©×½òhym8563ƒdefaultyÒ i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c þÉ0‰� #i2cpclk×DyÓƒdefault+=okayaudio-codec@11everest,es8316 71G»€01#mclkïportendpoint[Ôˆi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c þÊ0Š‚ #i2cpclk×EyÕƒdefault+ =disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spi þË×J0›–#spiclkapb_pclkLm mQtxrxÅ yÖרƒdefault+ =disabledefuse@fecc0000rockchip,rk3588-otp þÌ 0Œ‹��#otpapb_pclkphyarbp§¦¨ Jotpapbarb+cpu-code@2 id@7 cpu-leakage@17 cpu-leakage@18 cpu-leakage@19 log-leakage@1a gpu-leakage@1b cpu-version@1c  npu-leakage@28 (codec-leakage@29 )dma-controller@fed10000arm,pl330arm,primecell þÑ@ ×Z[£0p #apb_pclkºmphy@fed60000rockchip,rk3588-hdptx-phy þÖ 0 T#refapbV8p#cde!""JphyapbinitcmnlaneroplllcplllÙ =disabledphy@fed80000rockchip,rk3588-usbdp-phy þØV0¡lVÚ#refclkimmortalpclkutmi(p   Jinitcmnlanepcs_apbpma_apb "Û 5Ü FÝ \Þ =disabled$phy@fee00000rockchip,rk3588-naneng-combphy þà0¨vW #refapbpipe7¨GõáVp<CJphyapb l+ ~ß=okaysphy@fee20000rockchip,rk3588-naneng-combphy þâ0ªxW #refapbpipe7ªGõáVp>EJphyapb l+ ~à=okay)sram@ff001000 mmio-sram ÿðÿð+pinctrlrockchip,rk3588-pinctrllá+âgpio@fd8a0000rockchip,gpio-bank ýŠ×0qrÞ ”â zî ©gpio@fec20000rockchip,gpio-bank þÂ×0stÞ ”â zî ýgpio@fec30000rockchip,gpio-bank þÃ×0uvÞ ”â@ zî gpio@fec40000rockchip,gpio-bank þÄ×0wxÞ ”â` zî qgpio@fec50000rockchip,gpio-bank þÅ×0yzÞ ”†zî ïpcfg-pull-up  çpcfg-pull-down ­åpcfg-pull-none ¼ãpcfg-pull-none-drv-level-2 ¼ Éépcfg-pull-up-drv-level-1   Éèpcfg-pull-up-drv-level-2   Éäpcfg-pull-none-smt ¼ Øæauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout íã~emmc-bus8€ íääääääääemmc-clk íä€emmc-cmd íä�emmc-data-strobe íå‚eth1fspigmac1gpuhdmii2c0i2c0m2-xfer íææ,i2c1i2c1m0-xfer í æ æœi2c2i2c2m0-xfer í æ æ�i2c3i2c3m0-xfer í æ æži2c4i2c4m0-xfer í æ æŸi2c5i2c5m0-xfer í æ æ i2c6i2c6m0-xfer í æ æÑi2c7i2c7m0-xfer í æ æÓi2c8i2c8m0-xfer í æ æÕi2s0i2s0-lrck íãƒi2s0-mclk íã„i2s0-sclk íã…i2s0-sdi0 íã†i2s0-sdo0 íã‡i2s1i2s1m0-lrck íã‰i2s1m0-sclk íãŠi2s1m0-sdi0 íã‹i2s1m0-sdi1 íãŒi2s1m0-sdi2 íã�i2s1m0-sdi3 íãŽi2s1m0-sdo0 í ã�i2s1m0-sdo1 í ã�i2s1m0-sdo2 í ã‘i2s1m0-sdo3 í ã’i2s2i2s2m1-lrck íã”i2s2m1-sclk í ã•i2s2m1-sdi í ã–i2s2m1-sdo í ã—i2s3i2s3-lrck íã˜i2s3-sclk íã™i2s3-sdi íãši2s3-sdo íã›jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp íçããããããªpmupwm0pwm0m0-pins íã0pwm1pwm1m0-pins íã1pwm2pwm2m0-pins íã2pwm3pwm3m0-pins íã3pwm4pwm4m0-pins í ã¼pwm5pwm5m0-pins í ã½pwm6pwm6m0-pins í ã¾pwm7pwm7m0-pins í ã¿pwm8pwm8m0-pins í ãÀpwm9pwm9m0-pins í ãÁpwm10pwm10m0-pins í ãÂpwm11pwm11m0-pins í ãÃpwm12pwm12m0-pins í ãÄpwm13pwm13m0-pins í ãÅpwm14pwm14m0-pins í ãÆpwm15pwm15m0-pins í ãÇrefclksatasata0sata1sata2sdiosdiom1-pins` íãççççç}sdmmcsdmmc-bus4@ íääääzsdmmc-clk íäwsdmmc-cmd íäxsdmmc-det íçyspdif0spdif1spi0spi0m0-pins0 íèèè£spi0m0-cs0 íè¡spi0m0-cs1 íè¢spi1spi1m1-pins0 íèèè¦spi1m1-cs0 íè¤spi1m1-cs1 íè¥spi2spi2m2-pins0 íè èè¨spi2m2-cs0 í è§spi3spi3m1-pins0 íè èè²spi3m1-cs0 íè°spi3m1-cs1 íè±spi4spi4m0-pins0 íèèèØspi4m0-cs0 íèÖspi4m0-cs1 íè×tsadctsadc-shut-org íãÎuart0uart0m1-xfer íç ç/uart1uart1m1-xfer í ç ç³uart2uart2m0-xfer í ç ç´uart3uart3m1-xfer í ç çµuart4uart4m1-xfer í ç ç¶uart5uart5m1-xfer í ç ç·uart6uart6m1-xfer í ç ç¸uart7uart7m1-xfer í ç ç¹uart8uart8m1-xfer í ç çºuart9uart9m1-xfer í ç ç»vopbt656gpio-functsadc-gpio-func íãÏeth0gmac0hym8563hym8563-int íãÒledsled-rgb-g íãÿled-rgb-r íãsoundhp-detect íãþusbvcc5v0-host-en íãusb@fc400000rockchip,rk3588-dwc3snps,dwc3 ü@@×Ý0—–•#ref_clksuspend_clkbus_clkPhost Xêë]usb2-phyusb3-phy gutmi_wide/ pSw¿à=okaysyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon ý[€ûsyscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon ý\úsyscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon ý\À@ùsyscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]@@+øusb2phy@4000rockchip,rk3588-usb2phy @½0 #phyclk òusb480m_phy1׊pnJphyapb=okay÷otg-portV=okayêi2s@fddc8000rockchip,rk3588-i2s-tdm ýÜ€×¼0ññî#mclk_txmclk_rxhclk7ïØLmQtx/ pºJtx-mï =disabledi2s@fddf4000rockchip,rk3588-i2s-tdm ýß@׺099?#mclk_txmclk_rxhclk76ØLmQtx/ pÚJtx-mï =disabledi2s@fddf8000rockchip,rk3588-i2s-tdm ý߀×»0++'#mclk_txmclk_rxhclk7(ØLmQrx/ pÇJrx-mï =disabledi2s@fde00000rockchip,rk3588-i2s-tdm ýà×¾0&&"#mclk_txmclk_rxhclk7#ØLmQrx/ pîJrx-mï =disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+00@E;JOt)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×syspmcmsglegacyerr `.ìììì<M\ídXî ]pcie-phy/ "Tððð ð à@ @0 @@þðŸdbiapbconfigp&+ Jpwrpipe=okay nï ûðlegacy-interrupt-controllerz  ×ìpcie-ep@fe150000rockchip,rk3588-pcie-epP @ @þ @ @0Ÿdbidbi2apbaddr_spaceatu00@E;JOt)#aclk_mstaclk_slvaclk_dbipclkauxpipe�× +syspmcmsglegacyerrdma0dma1dma2dma3MdXî ]pcie-phy/ "p&+ Jpwrpipe =disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+00AF<KPu)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ÿþsyspmcmsglegacyerr `.ññññ<M\ídXî ]pcie-phy/ "Tñññ ñ à@ @@0 @@@þñŸdbiapbconfigp', Jpwrpipe =disabledlegacy-interrupt-controllerz  ×ÿñpcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /00BG=LQ¯)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×óòñðïsyspmcmsglegacyerr `.òòòò<M\ p dXó ]pcie-phy/ "Tòòò ò à@ €@0 @€@þòŸdbiapbconfigp(- Jpwrpipe+=okay nïlegacy-interrupt-controllerz  ×ðòethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a þ ×ãâmacirqeth_wake_irq(067X]40#stmmacethclk_mac_refpclk_macaclk_macptp_ref/ !p# Jstmmacethli�+ ô°ÁõÔöç =disabledmdiosnps,dwmac-mdio+stmmac-axi-configðú ôrx-queues-configõqueue0queue1tx-queues-config0öqueue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci þ"×(0c`fUp#satapmaliverxoobrefasicF+ =disabledsata-port@0 X@Xó ]sata-phye t phy@fed90000rockchip,rk3588-usbdp-phy þÙV0¡mW÷#refclkimmortalpclkutmi(pJinitcmnlanepcs_apbpma_apb "ø 5Ü Fù \Þ=okayëphy@fee10000rockchip,rk3588-naneng-combphy þá0©wW #refapbpipe7©GõáVp=DJphyapb l+ ~ú=okayóphy@fee80000rockchip,rk3588-pcie3-phy þèV0y#pclkpHJphy l+ û=okayîopp-table-cluster0operating-points-v2  opp-1008000000 '<Ü . L¸ L¸~ð <œ@opp-1200000000 'G†Œ . ß4 ß4~ð <œ@opp-1416000000 'Tfr . ¢„ ¢„~ð <œ@ Mopp-1608000000 '_Ø" . øP øP~ð <œ@opp-1800000000 'kIÒ .~ð~ð~ð <œ@opp-table-cluster1operating-points-v2 opp-1200000000 'G†Œ . L¸ L¸B@ <œ@opp-1416000000 'Tfr .  B@ <œ@opp-1608000000 '_Ø" . ¢„ ¢„B@ <œ@opp-1800000000 'kIÒ . øP øPB@ <œ@opp-2016000000 'x)¸ .HHB@ <œ@opp-2208000000 'ƒ›h .llB@ <œ@opp-2400000000 '�  .B@B@B@ <œ@opp-table-cluster2operating-points-v2 opp-1200000000 'G†Œ . L¸ L¸B@ <œ@opp-1416000000 'Tfr .  B@ <œ@opp-1608000000 '_Ø" . ¢„ ¢„B@ <œ@opp-1800000000 'kIÒ . øP øPB@ <œ@opp-2016000000 'x)¸ .HHB@ <œ@opp-2208000000 'ƒ›h .llB@ <œ@opp-2400000000 '�  .B@B@B@ <œ@opp-tableoperating-points-v2!opp-300000000 'ᣠ. L¸ L¸ øPopp-400000000 'ׄ . L¸ L¸ øPopp-500000000 'Íe . L¸ L¸ øPopp-600000000 '#ÃF . L¸ L¸ øPopp-700000000 ')¹' . ®` ®` øPopp-800000000 '/¯ . q° q° øPopp-900000000 '5¤é . 5 5 øPopp-1000000000 ';šÊ . øP øP øPchosen Yserial2:1500000n8analog-soundaudio-graph-card eü jrk3588-es8316 pýƒdefaultyþ. |MIC2Mic JackHeadphonesHPOLHeadphonesHPOR) „MicrophoneMic JackHeadphoneHeadphonesleds gpio-ledsƒdefaultyÿled-0 Œ Ðstatus t© ’heartbeatled-1 Œ Ðstatus tï ’nonepwm-fanpwm-fan ¨_‘Ãÿ ·- ÂÃPïvcc3v3-pcie2x1l2-regulatorregulator-fixed®vcc3v3_pcie2x1l2ã2Z û2Z  Lj({vcc3v3-pcie30-regulatorregulator-fixed Ø tý®vcc3v3_pcie30ã2Z û2Z  Lj(-ðvcc5v0-host-regulatorregulator-fixed ®vcc5v0_hostѽãLK@ûLK@ Ø wïƒdefaulty(-*vcc5v0-sys-regulatorregulator-fixed ®vcc5v0_sys½ÑãLK@ûLK@-vcc-1v1-nldo-s3-regulatorregulator-fixed®vcc_1v1_nldo_s3½ÑãÈàûÈà(-¯ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapclock-namespower-domainsstatusmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs200-1_8vrockchip,trcm-sync-tx-onlydai-formatmclk-fsremote-endpointmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-csspi-max-frequencygpio-controller#gpio-cellssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplywakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsvpcie3v3-supplyrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathdaislabelhp-det-gpioroutingwidgetscolorlinux,default-triggercooling-levelsfan-supplypwmsstartup-delay-usenable-active-high