p8t( < 6,pine64,soquartz-cm4iopine64,soquartzrockchip,rk3566(7Pine64 SOQuartz on CM4-IO carrier boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000/mmc@fe310000/mmc@fe2c0000/ethernet@fe010000cpus cpu@0cpu,arm,cortex-a55 psci*>K@]jw@ cpu@100cpu,arm,cortex-a55 psci*>K@]jw@ cpu@200cpu,arm,cortex-a55 psci*>K@]jw@ cpu@300cpu,arm,cortex-a55 psci*>K@]jw@ l3-cache,cache@M@_opp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc" protocol@14(opp-table-1,operating-points-v2Aopp-200000000   P PB@opp-300000000  P PB@opp-400000000ׄ  P PB@opp-600000000#F  B@opp-700000000)' ~~B@opp-800000000/ B@B@B@hdmi-sound,simple-audio-card5HDMILi2seokaysimple-audio-card,codecsimple-audio-card,cpu pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0#smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24m(xin32k ,fixed-clockxin32kdefault(sram@10f000 ,mmio-sram sram@0,arm,scmi-shmemsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob _ sata-phy"4 disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ` sata-phy"4 disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkBotg Jutmi_wide4SZokay usb2-phys zhigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkBhost usb2-phyusb3-phy Jutmi_wide4SZ disabledinterrupt-controller@fd400000 ,arm,gic-v3 @F  A(usb@fd800000 ,generic-ehci usb disabledusb@fd840000 ,generic-ohci usb disabledusb@fd880000 ,generic-ehci usb disabledusb@fd8c0000 ,generic-ohci usb disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd[io-domains&,rockchip,rk3568-pmu-io-voltage-domainokay &4Bsyscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru(Pclock-controller@fdd20000,rockchip,rk3568-cruxin24m(P] mG i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclkdefault okayregulator@1c ,tcs,tcs4525vdd_cpu 50+= regulator-state-memHpmic@20,rockchip,rk809 !(rk808-clkout1rk808-clkout2default"a#########regulatorsDCDC_REG1 vdd_logic+ pqregulator-state-mem+ DCDC_REG2vdd_gpu+ pqBregulator-state-memHDCDC_REG3+vcc_ddrregulator-state-memDCDC_REG4+ pvdd_npuregulator-state-memHDCDC_REG5vcc_1v8+w@w@regulator-state-mem+w@LDO_REG1+  vdda0v9_imageWregulator-state-mem+ LDO_REG2+   vdda_0v9regulator-state-memHLDO_REG3+   vdda0v9_pmuregulator-state-mem+ LDO_REG4+2Z2Z vccio_acodecregulator-state-memHLDO_REG5+w@2Z vccio_sdregulator-state-memHLDO_REG6+2Z2Z vcc3v3_pmuregulator-state-mem+2ZLDO_REG7+w@w@ vcca_1v8regulator-state-memHLDO_REG8+w@w@ vcca1v8_pmuregulator-state-memHLDO_REG9+w@w@vcca1v8_imageXregulator-state-memHSWITCH_REG1vcc_3v3regulator-state-memHSWITCH_REG2 vcc3v3_sd disabledregulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclkG$$%defaultLY disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk&defaultc disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk'defaultc disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk(defaultc disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk)defaultc disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controllern power-domain@7*npower-domain@8 +,-npower-domain@9  ./0npower-domain@10 123456npower-domain@11 7npower-domain@13 8npower-domain@14 9:;npower-domain@15<=>?@ngpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpugpubus *A4okayBvideo-codec@fdea0400,rockchip,rk3568-vpu vdpu aclkhclkC4 iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface4 Crga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ZaclkhclksclkS&$% coreaxiahb4 video-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclkD4 iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface4 Dmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sampleрSreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refS stmmacethEFG%okay]H.input;FrgmiidefaultIJKLMN O!_ uN 0Omdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22okayOstmmac-axi-configErx-queues-configFqueue0tx-queues-configGqueue0vop@fe040000 0@vopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2P4 okay,rockchip,rk3566-vop]ports port@0 endpoint@2QYport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkiface4 okayPdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DpclkdphyR4 apbS disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi EpclkdphyS4 apbS disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefdefault TUV4 Lokay(W8Xports port@0endpointYQport@1endpointZqos@fe128000,rockchip,rk3568-qossyscon *qos@fe138080,rockchip,rk3568-qossyscon 9qos@fe138100,rockchip,rk3568-qossyscon :qos@fe138180,rockchip,rk3568-qossyscon ;qos@fe148000,rockchip,rk3568-qossyscon +qos@fe148080,rockchip,rk3568-qossyscon ,qos@fe148100,rockchip,rk3568-qossyscon -qos@fe150000,rockchip,rk3568-qossyscon 7qos@fe158000,rockchip,rk3568-qossyscon 1qos@fe158100,rockchip,rk3568-qossyscon 2qos@fe158180,rockchip,rk3568-qossyscon 3qos@fe158200,rockchip,rk3568-qossyscon 4qos@fe158280,rockchip,rk3568-qossyscon 5qos@fe158300,rockchip,rk3568-qossyscon 6qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon <qos@fe190280,rockchip,rk3568-qossyscon =qos@fe190300,rockchip,rk3568-qossyscon >qos@fe190380,rockchip,rk3568-qossyscon ?qos@fe190400,rockchip,rk3568-qossyscon @qos@fe198000,rockchip,rk3568-qossyscon 8qos@fe1a8000,rockchip,rk3568-qossyscon .qos@fe1a8080,rockchip,rk3568-qossyscon /qos@fe1a8100,rockchip,rk3568-qossyscon 0dfi@fe230000,rockchip,rk3568-dfi#  H[pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<KJIHGsyspmcmsglegacyerrU($aclk_mstaclk_slvaclk_dbipclkauxpci_`r\\\\ pcie-phy4T @@Spipe okaydefault] ^ legacy-interrupt-controller H\mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sampleрSresetokay  default_`ab  )cmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sampleрSresetokay  5 B Xd cdefault efg q )# spi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfchdefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 ]{}m n6(|zy{}corebusaxiblocktimerokay ~ c ) rng@fe388000,rockchip,rk3568-rng8@po coreahbSm disabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ 4]=AmFqFq?C9mclk_txmclk_rxhclkGi txSPQ tx-mrx-mokay i2s@fe410000,rockchip,rk3568-i2s-tdmA 5]EImFqFqGK:mclk_txmclk_rxhclkGii rxtxSRS tx-mrx-mdefault0jklmnopqrstu disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB 6]MmFqOO;mclk_txmclk_rxhclkGii txrxSTtx-mdefaultvwxy disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclkGii txrxSUV tx-mrx-m disabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclkGi  rxz{|}~defaultSXpdm-m disabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\Gi txdefault disableddma-controller@fe530000,arm,pl330arm,primecellS@    apb_pclk $dma-controller@fe550000,arm,pl330arm,primecellU@   apb_pclk ii2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclkdefault okayrtc@51 ,nxp,pcf85063Qi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclkdefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclkdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclkdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclkdefault  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclkG$$ txrxdefault   disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclkG$$ txrxdefault   disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclkG$$ txrxdefault   disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclkG$$ txrxdefault   disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclkG$$ defaultLYokay txrx bluetooth,brcm,bcm43438-btlpo   default  # serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclkG$$defaultLYokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclkG$$defaultLY disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclkG$$ defaultLY disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclkG$ $ defaultLY disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclkG$ $ defaultLY disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclkG$$defaultLYokayserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclkG$$defaultLY disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclkG$$defaultLY disabledthermal-zonescpu-thermal d - ;tripscpu_alert0 Kp Wpassivecpu_alert1 K$ Wpassivecpu_crit Ks W criticalcooling-mapsmap0 b0 g gpu-thermal  - ;tripsgpu-threshold Kp Wpassivegpu-target K$ Wpassivegpu-crit Ks W criticalcooling-mapsmap0 b gtsadc@fe710000,rockchip,rk3568-tsadcq s]mf@ `tsadcapb_pclkS vsdefaultsleep  okaysaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclkS saradc-apb  disabled pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultc disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultc disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefaultc disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefaultc disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultc disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultc disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefaultc disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefaultc disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultc disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultc disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefaultc disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefaultc disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe]"mSphy    disabledphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe]%mSphy   okay;#phy@fe870000,rockchip,rk3568-csi-dphyypclk Sapb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz 4 apbS disabledRmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ 4 apbS disabledSusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m  (okayhost-port  disabledotg-port okay;usb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m  ( disabledhost-port  disabledotg-port  disabledpinctrl,rockchip,rk3568-pinctrlH[ gpio@fdd60000,rockchip,gpio-bank !.     *!nextrst-hog 6 ?nEXTRST Igpio@fe740000,rockchip,gpio-bankt "cd    *^gpio@fe750000,rockchip,gpio-banku #ef  @  *gpio@fe760000,rockchip,gpio-bankv $gh  `  *gpio@fe770000,rockchip,gpio-bankw %ij    *pcfg-pull-up Tpcfg-pull-down apcfg-pull-none ppcfg-pull-none-drv-level-1 p }pcfg-pull-none-drv-level-2 p }pcfg-pull-none-drv-level-3 p }pcfg-pull-up-drv-level-1 T }pcfg-pull-up-drv-level-2 T }pcfg-pull-none-smt p acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 cpuebcedpdpemmceth0eth1flashfspifspi-pins` hgmac0gmac1gmac1m0-miim Igmac1m0-clkinout Mgmac1m0-rx-bus20    Kgmac1m0-tx-bus20  Jgmac1m0-rgmii-clk Lgmac1m0-rgmii-bus@ Ngpuhdmitxhdmitxm0-cec Vhdmitx-scl Thdmitx-sda Ui2c0i2c0-xfer  i2c1i2c1-xfer  i2c2i2c2m1-xfer   i2c3i2c3m0-xfer i2c4i2c4m1-xfer   i2c5i2c5m0-xfer   i2s1i2s1m1-lrckrx mi2s1m1-lrcktx li2s1m1-sclkrx ki2s1m1-sclktx ji2s1m1-sdi0 ni2s1m1-sdi1 oi2s1m1-sdi2 pi2s1m1-sdi3 qi2s1m1-sdo0 ri2s1m1-sdo1 si2s1m1-sdo2  ti2s1m1-sdo3  ui2s2i2s2m0-lrcktx wi2s2m0-sclktx vi2s2m0-sdi xi2s2m0-sdo yi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk zpdmm0-clk1 {pdmm0-sdi0  |pdmm0-sdi1  }pdmm0-sdi2  ~pdmm0-sdi3 pmicpmic-int-l "pmupwm0pwm0m0-pins &pwm1pwm1m0-pins 'pwm2pwm2m0-pins (pwm3pwm3-pins )pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ _sdmmc0-clk `sdmmc0-cmd asdmmc0-det bsdmmc1sdmmc1-bus4@ esdmmc1-clk gsdmmc1-cmd fsdmmc2spdifspdifm0-tx spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m0-pins0  spi1m0-cs0 spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer %uart1uart1m0-xfer   uart1m0-ctsn uart1m0-rtsn  uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m2-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2btbt-enable-h bt-host-wake-l bt-wake-l ledswork-led-enable-h diy-led-enable-h pciepcie-clkreq-h pcie-reset-h  ]sdio-pwrseqwifi-enable-h chosen serial2:1500000n8external-gmac1-clock ,fixed-clocksY@ gmac1_clkin(Hhdmi-con,hdmi-connectoraportendpointZleds ,gpio-ledsled-diy diy-led on ! heartbeatdefault okayled-work work-led off !default okaysdio-pwrseqokay,mmc-pwrseq-simple ext_clockdefault dvbus-regulator,regulator-fixedvbus+LK@LK@=vcc5v0-sys-regulator,regulator-fixed vcc5v0_sys+LK@LK@= vcc3v3-sys-regulator,regulator-fixed vcc3v3_sys+2Z2Z= #vcc12v-dcin-regulator,regulator-fixed vcc12v_dcin+vcc-5v-regulator,regulator-fixedvcc_5v+LK@LK@=vcc-sd-pwr-regulator,regulator-fixed vcc_sd_pwr+2Z2Z=#c interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1mmc2ethernet0device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplybroken-cdbus-widthcap-sd-highspeeddisable-wpvqmmc-supplyvmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr50mmc-hs200-1_8vdma-namesarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsgpio-hogline-nameoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathlabeldefault-statelinux,default-triggerretain-state-suspended