Ð þíè<8Ú0( Ùø ,powkiddy,x55rockchip,rk3566 7Powkiddy x55=handsetaliasesJ/pinctrl/gpio@fdd60000P/pinctrl/gpio@fe740000V/pinctrl/gpio@fe750000\/pinctrl/gpio@fe760000b/pinctrl/gpio@fe770000h/i2c@fdd40000m/i2c@fe5a0000r/i2c@fe5b0000w/i2c@fe5c0000|/i2c@fe5d0000�/i2c@fe5e0000†/serial@fdd50000Ž/serial@fe650000–/serial@fe660000ž/serial@fe670000¦/serial@fe680000®/serial@fe690000¶/serial@fe6a0000¾/serial@fe6b0000Æ/serial@fe6c0000Î/serial@fe6d0000Ö/spi@fe610000Û/spi@fe620000à/spi@fe630000å/spi@fe640000ê/mmc@fe310000ï/mmc@fe2b0000ô/mmc@fe000000ù/mmc@fe2c0000cpus cpu@0þcpu,arm,cortex-a55 $psci2F€S@e€r€@‘€ž¯º cpu@100þcpu,arm,cortex-a55 $psci2F€S@e€r€@‘€ž¯º cpu@200þcpu,arm,cortex-a55 $psci2F€S@e€r€@‘€ž¯º cpu@300þcpu,arm,cortex-a55 $psci2F€S@e€r€@‘€ž¯º l3-cache,cacheÂÎHU@gºopp-table-0,operating-points-v2ܺopp-408000000çQ– î »  » Œ0üœ@opp-600000000ç#ÃF î »  » Œ0opp-816000000ç0£, î »  » Œ0 opp-1104000000çAÍ´ î »  » Œ0opp-1416000000çTfr î »  » Œ0opp-1608000000ç_Ø" îà˜à˜Œ0opp-1800000000çkIÒ î��Œ0display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc‚* protocol@14 0ºopp-table-1,operating-points-v2ºFopp-200000000ç ëÂ î øP øPB@opp-300000000çá£ î øP øPB@opp-400000000çׄ î øP øPB@opp-600000000ç#ÃF î »  » B@opp-700000000ç)¹' î~ð~ðB@opp-800000000ç/¯ îB@B@B@hdmi-sound,simple-audio-card=HDMITi2sm‡okaysimple-audio-card,codecŽsimple-audio-card,cpuŽ pmu,arm,cortex-a55-pmu0˜äåæç£ psci ,arm,psci-1.0+smctimer,arm,armv8-timer0˜   ¶xin24m ,fixed-clockÍn6Ýxin24m0ºxin32k ,fixed-clockÍ€Ýxin32kðúdefault0sram@10f000 ,mmio-sram ð ðsram@0,arm,scmi-shmem ºsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci ü@›œ�satapmaliverxoob ˜_  sata-phy*< ‡disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci ü€ ¡¢satapmaliverxoob ˜`  sata-phy*< ‡disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3 üÀ@ ˜©¦§¥ref_clksuspend_clkbus_clkJotg Rutmi_wide<[”b‡okay  usb2-phy{ ‚high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3 ý@ ˜ª©ª¨ref_clksuspend_clkbus_clkJhost  usb2-phyusb3-phy Rutmi_wide<[•b‡okayinterrupt-controller@fd400000 ,arm,gic-v3  ý@ýF ˜ �¥¶ýAÀ(˺usb@fd800000 ,generic-ehci ý€ ˜‚½¾¼ usb ‡disabledusb@fd840000 ,generic-ohci ý„ ˜ƒ½¾¼ usb ‡disabledusb@fd880000 ,generic-ehci ýˆ ˜…¿À¼ usb ‡disabledusb@fd8c0000 ,generic-ohci ýŒ ˜†¿À¼ usb ‡disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd ýº`io-domains&,rockchip,rk3568-pmu-io-voltage-domain‡okayÚèö .<syscon@fdc50000 ýÅ ,rockchip,rk3566-pipe-grfsysconº°syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd ýƺ!syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsyscon ýȺ±syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsyscon ýɺ²syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsyscon ýÊ€º³syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsyscon ýÊ€€ºµclock-controller@fdd00000,rockchip,rk3568-pmucru ýÐ0Jº clock-controller@fdd20000,rockchip,rk3568-cru ýÒxin24m0J W  g€G†Œ 눶| “!ºi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c ýÔ ˜.  - i2cpclkð"údefault ‡okaypmic@20,rockchip,rk817 WH|–mclkÝrk808-clkout1rk808-clkout2H#˜údefaultð$% 0®¿&Ë&×&ã&ï&û&&&'ºÇregulatorsDCDC_REG1+?Q¡ i™p�q– ­vdd_logicregulator-state-mem¼Õ » DCDC_REG2+?Q¡ i™p�q–­vdd_gpuºGregulator-state-mem¼DCDC_REG3+?–­vcc_ddrregulator-state-memñDCDC_REG4+?Q2Z i2Z –­vcc_3v3ºregulator-state-memñÕ2Z LDO_REG1+?Qw@iw@ ­vcca1v8_pmuºregulator-state-memñÕw@LDO_REG2+?Q » i »  ­vdda_0v9regulator-state-mem¼LDO_REG3+?Q » i »  ­vdda0v9_pmuregulator-state-memñÕ » LDO_REG4+?Q2Z i2Z  ­vccio_acodecºregulator-state-mem¼LDO_REG5+?Qw@i2Z  ­vccio_sdºregulator-state-mem¼LDO_REG6+?Q2Z i2Z  ­vcc3v3_pmuºregulator-state-memñÕ2Z LDO_REG7+?Qw@iw@­vcc_1v8º£regulator-state-mem¼LDO_REG8+?Qw@iw@ ­vcc1v8_dvpºregulator-state-memñLDO_REG9+?Qw@i2Z  ­vcc2v8_dvpºregulator-state-mem¼BOOSTQG·`iReÀ­boostº'regulator-state-mem¼OTG_SWITCH ­otg_switchregulator-state-mem¼charger ('>Iðd† regulator@1c ,tcs,tcs4525 ‹+?Q ß4i5°­vdd_cpu�ü¨&ºregulator-state-mem¼serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart ýÕ ˜t ,baudclkapb_pclk³))ð*údefault¸Å ‡disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm ý× 0 pwmpclkð+údefaultÏ ‡disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm ý× 0 pwmpclkð,údefaultÏ ‡disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm ý×  0 pwmpclkð-údefaultÏ ‡disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm ý×0 0 pwmpclkð.údefaultÏ ‡disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfd ýÙpower-controller!,rockchip,rk3568-power-controllerÚ ºpower-domain@7 î/Úpower-domain@8 ÌÍ î012Úpower-domain@9 ÚÛÜ î345Úpower-domain@10 ñòî6789:;Úpower-domain@11 íî<Úpower-domain@13 î=Úpower-domain@14  î>?@Úpower-domain@15 îABCDEÚgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost ýæ@$˜()' õjobmmugpugpubus2F<‡okayGº video-codec@fdea0400,rockchip,rk3568-vpu ýê ˜‹õvdpuîï aclkhclkH< iommu@fdea0800,rockchip,rk3568-iommu ýê@ ˜Š aclkifaceîï< ºHrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ýë€ ˜Zóôõaclkhclksclk[&$% %coreaxiahb< video-codec@fdee0000,rockchip,rk3568-vepu ýî ˜@ýþ aclkhclkI< iommu@fdee0800,rockchip,rk3568-iommu ýî@ ˜?ýþ aclkiface< ºImmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc þ@ ˜d ÁÂŽ�biuciuciu-driveciu-sample1<ðÑ€[ë%reset‡okayJTfwðJKLMúdefault‚�ethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a þ˜ õmacirqeth_wake_irq@†‰‰ÇÃĉÈWstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref[ì %stmmaceth“!�N­¾OÑPä ‡disabledmdio,snps,dwmac-mdio stmmac-axi-configí÷ºNrx-queues-configºOqueue0tx-queues-config-ºPqueue0vop@fe040000  þ0þ@Cvopgamma-lut ˜”(ÝÞßàá%aclkhclkdclk_vp0dclk_vp1dclk_vp2Q< “!‡okay,rockchip,rk3566-vopWßà| ports ºport@0  endpoint@2 MRº^port@1  endpoint@4 MSºUport@2  iommu@fe043e00,rockchip,rk3568-iommu  þ>þ? ˜”ÝÞ aclkiface< ‡okayºQdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi þ ˜Dpclkè dphyT< %apb[“!‡okay ports port@0 endpointMUºSport@1 endpointMVºZpanel@0 ,powkiddy,x55-panelhimax,hx8394 ]WgXúdefaultðY t#€iXportendpointMZºVdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi þ ˜Epclké dphy[< %apb[“! ‡disabledports port@0 port@1 hdmi@fe0a0000,rockchip,rk3568-dw-hdmi þ  ˜-(æç“ (Úiahbisfrcecrefúdefaultð\< ¸“!®‡okay‰]ºports port@0 endpointM^ºRport@1 endpointM_ºÆqos@fe128000,rockchip,rk3568-qossyscon þ€ º/qos@fe138080,rockchip,rk3568-qossyscon þ€€ º>qos@fe138100,rockchip,rk3568-qossyscon þ� º?qos@fe138180,rockchip,rk3568-qossyscon þ�€ º@qos@fe148000,rockchip,rk3568-qossyscon þ€ º0qos@fe148080,rockchip,rk3568-qossyscon þ€€ º1qos@fe148100,rockchip,rk3568-qossyscon þ� º2qos@fe150000,rockchip,rk3568-qossyscon þ º<qos@fe158000,rockchip,rk3568-qossyscon þ€ º6qos@fe158100,rockchip,rk3568-qossyscon þ� º7qos@fe158180,rockchip,rk3568-qossyscon þ�€ º8qos@fe158200,rockchip,rk3568-qossyscon þ‚ º9qos@fe158280,rockchip,rk3568-qossyscon þ‚€ º:qos@fe158300,rockchip,rk3568-qossyscon þƒ º;qos@fe180000,rockchip,rk3568-qossyscon þ qos@fe190000,rockchip,rk3568-qossyscon þ ºAqos@fe190280,rockchip,rk3568-qossyscon þ€ ºBqos@fe190300,rockchip,rk3568-qossyscon þ ºCqos@fe190380,rockchip,rk3568-qossyscon þ€ ºDqos@fe190400,rockchip,rk3568-qossyscon þ ºEqos@fe198000,rockchip,rk3568-qossyscon þ€ º=qos@fe1a8000,rockchip,rk3568-qossyscon þ€ º3qos@fe1a8080,rockchip,rk3568-qossyscon þ€€ º4qos@fe1a8100,rockchip,rk3568-qossyscon þ� º5dfi@fe230000,rockchip,rk3568-dfi þ# ˜ •`pcie@fe260000,rockchip,rk3568-pcie0 À@þ&ôCdbiapbconfig<˜KJIHGõsyspmcmsglegacyerr¢(�‚ƒ„…$aclk_mstaclk_slvaclk_dbipclkauxþpci¥¬`¿aaaaÍÞíü    pcie-phy<Tôôô ô à@@[¡%pipe  ‡disabledlegacy-interrupt-controller¥� ˜Hºammc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc þ+@ ˜b °±Š‹biuciuciu-driveciu-sample1<ðÑ€[Ô%reset‡okayJTfwðbcdeúdefault‚�mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc þ,@ ˜c ²³Œ�biuciuciu-driveciu-sample1<ðÑ€[Ö%reset‡okayJf  * @f K ðghiúdefault Yjspi@fe300000 ,rockchip,sfc þ0@ ˜exvclk_sfchclk_sfcðkúdefault ‡disabledmmc@fe310000,rockchip,rk3568-dwcmshc þ1 ˜W{}g ëÂn6(|zy{}corebusaxiblocktimer‡okayJ e Kðlmnopúdefaultrng@fe388000,rockchip,rk3568-rng þ8€@po coreahb[m ‡disabledi2s@fe400000,rockchip,rk3568-i2s-tdm þ@ ˜4W=AgFÏqFÏq?C9mclk_txmclk_rxhclk³q ttx[PQ %tx-mrx-m“!®‡okayº i2s@fe410000,rockchip,rk3568-i2s-tdm þA ˜5WEIgFÏqFÏqGK:mclk_txmclk_rxhclk³qq trxtx[RS %tx-mrx-m“!údefaultðrstu®‡okay ~ºËi2s@fe420000,rockchip,rk3568-i2s-tdm þB ˜6WMgFÏqOO;mclk_txmclk_rxhclk³qq ttxrx[T%tx-m“!údefaultðvwxy® ‡disabledi2s@fe430000,rockchip,rk3568-i2s-tdm þC ˜7SW<mclk_txmclk_rxhclk³qq ttxrx[UV %tx-mrx-m“!® ‡disabledpdm@fe440000,rockchip,rk3568-pdm þD ˜LZYpdm_clkpdm_hclk³q  trxðz{|}~údefault[X%pdm-m® ‡disabledspdif@fe460000,rockchip,rk3568-spdif þF ˜f mclkhclk_\³q ttxúdefaultð€® ‡disableddma-controller@fe530000,arm,pl330arm,primecell þS@˜  ™  apb_pclk °º)dma-controller@fe550000,arm,pl330arm,primecell þU@˜ ™  apb_pclk °ºqi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þZ ˜/HG i2cpclkð�údefault  ‡disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þ[ ˜0JI i2cpclkð‚údefault  ‡disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þ\ ˜1LK i2cpclkðƒúdefault  ‡disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þ] ˜2NM i2cpclkð„údefault  ‡disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c þ^ ˜3PO i2cpclkð…údefault ‡okayº]watchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt þ` ˜• tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spi þa ˜gRQspiclkapb_pclk³)) ttxrxúdefault ð†‡ˆ  ‡disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spi þb ˜hTSspiclkapb_pclk³)) ttxrxúdefault ð‰Š‹  ‡disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spi þc ˜iVUspiclkapb_pclk³)) ttxrxúdefault ðŒ�Ž  ‡disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spi þd ˜jXWspiclkapb_pclk³)) ttxrxúdefault ð��‘  ‡disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uart þe ˜ubaudclkapb_pclk³)) ð’“”údefault¸Å‡okay »bluetooth*,realtek,rtl8821cs-btrealtek,rtl8723bs-bt Ë# Ý# ê# serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uart þf ˜v# baudclkapb_pclk³))ð•údefault¸Å‡okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uart þg ˜w'$baudclkapb_pclk³))ð–údefault¸Å ‡disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uart þh ˜x+(baudclkapb_pclk³)) ð—údefault¸Å ‡disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uart þi ˜y/,baudclkapb_pclk³) ) ð˜údefault¸Å ‡disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uart þj ˜z30baudclkapb_pclk³) ) ð™údefault¸Å ‡disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uart þk ˜{74baudclkapb_pclk³))ðšúdefault¸Å ‡disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uart þl ˜|;8baudclkapb_pclk³))ð›údefault¸Å ‡disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uart þm ˜}?<baudclkapb_pclk³))ðœúdefault¸Å ‡disabledthermal-zonescpu-thermal úd è �tripscpu_alert0 .p :ÐEpassiveºžcpu_alert1 .$ø :ÐEpassivecpu_crit .s :Ð Ecriticalcooling-mapsmap0 Ež0 J ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal ú è �tripsgpu-threshold .p :ÐEpassivegpu-target .$ø :ÐEpassiveºŸgpu-crit .s :Ð Ecriticalcooling-mapsmap0 EŸ J ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadc þq ˜sWgf@ ®`tsadcapb_pclk[�‚ד! Ysúdefaultsleepð¡ p¢ z‡okay � §º�saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradc þr ˜]saradcapb_pclk[€ %saradc-apb ‡okay Ô£º¿pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm þnZY pwmpclkð¤údefaultχokayºÀpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm þnZY pwmpclkð¥údefaultÏ ‡disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm þn ZY pwmpclkð¦údefaultÏ ‡disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm þn0ZY pwmpclkð§údefaultÏ ‡disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm þo]\ pwmpclkð¨údefaultÏ ‡disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm þo]\ pwmpclkð©údefaultÏ ‡disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm þo ]\ pwmpclkðªúdefaultÏ ‡disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm þo0]\ pwmpclkð«údefaultÏ ‡disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwm þp`_ pwmpclkð¬údefaultÏ ‡disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwm þp`_ pwmpclkð­údefaultÏ ‡disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwm þp `_ pwmpclkð®údefaultÏ ‡disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwm þp0`_ pwmpclkð¯údefaultÏ ‡disabledphy@fe830000,rockchip,rk3568-naneng-combphy þƒ "} refapbpipeW "gõá[Ç%phy à° ò± ‡okayºphy@fe840000,rockchip,rk3568-naneng-combphy þ„ %~ refapbpipeW %gõá[É%phy à° ò²  ‡disabledºphy@fe870000,rockchip,rk3568-csi-dphy þ‡ypclk [º%apb“! ‡disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy þ… refpclk z < %apb[»‡okayºTmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy þ† refpclk { < %apb[¼ ‡disabledº[usb2phy@fe8a0000,rockchip,rk3568-usb2phy þŠ phyclkÝclk_usbphy0_480m ˜‡ ³0‡okayºhost-port ‡okay #´ºotg-port ‡okayºusb2phy@fe8b0000,rockchip,rk3568-usb2phy þ‹ phyclkÝclk_usbphy1_480m ˜ˆ µ0 ‡disabledhost-port  ‡disabledºotg-port  ‡disabledºpinctrl,rockchip,rk3568-pinctrl“!•` º¶gpio@fdd60000,rockchip,gpio-bank ýÖ ˜! .  . >¶  J�¥º#gpio@fe740000,rockchip,gpio-bank þt ˜"cd . >¶  J�¥gpio@fe750000,rockchip,gpio-bank þu ˜#ef . >¶@  J�¥gpio@fe760000,rockchip,gpio-bank þv ˜$gh . >¶`  J�¥ºÂgpio@fe770000,rockchip,gpio-bank þw ˜%ij . >¶€  J�¥ºÃpcfg-pull-up Vº¹pcfg-pull-none cº·pcfg-pull-none-drv-level-1 c pº»pcfg-pull-none-drv-level-2 c pººpcfg-pull-none-drv-level-3 c pº¾pcfg-pull-up-drv-level-1 V pº½pcfg-pull-up-drv-level-2 V pº¸pcfg-pull-none-smt c º¼acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 ”·ºcpuebcedpdpemmcemmc-rstnout ”·ºpemmc-bus8€ ” ¸ ¸¸¸¸¸¸¸ºlemmc-clk ”¸ºmemmc-cmd ”¸ºnemmc-datastrobe ”·ºoeth0eth1flashfspifspi-pins` ”······ºkgmac0gmac1gpuhdmitxhdmitxm0-cec ”·º\i2c0i2c0-xfer ” ¼ ¼º"i2c1i2c1-xfer ” ¼ ¼º�i2c2i2c2m0-xfer ” ¼¼º‚i2c3i2c3m0-xfer ”¼¼ºƒi2c4i2c4m0-xfer ” ¼ ¼º„i2c5i2c5m1-xfer ”¼¼º…i2s1i2s1m0-lrcktx ”·ºsi2s1m0-mclk ”·º$i2s1m0-sclktx ”·ºri2s1m0-sdi0 ” ·ºti2s1m0-sdo0 ”·ºui2s2i2s2m0-lrcktx ”·ºwi2s2m0-sclktx ”·ºvi2s2m0-sdi ”·ºxi2s2m0-sdo ”·ºyi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk ”·ºzpdmm0-clk1 ”·º{pdmm0-sdi0 ” ·º|pdmm0-sdi1 ” ·º}pdmm0-sdi2 ” ·º~pdmm0-sdi3 ”·ºpmicpmic-int-l ”¹º%pmupwm0pwm0m0-pins ”·º+pwm1pwm1m0-pins ”·º,pwm2pwm2m0-pins ”·º-pwm3pwm3-pins ”·º.pwm4pwm4-pins ”·º¤pwm5pwm5-pins ”·º¥pwm6pwm6-pins ”·º¦pwm7pwm7-pins ”·º§pwm8pwm8m0-pins ” ·º¨pwm9pwm9m0-pins ” ·º©pwm10pwm10m0-pins ” ·ºªpwm11pwm11m0-pins ”·º«pwm12pwm12m0-pins ”·º¬pwm13pwm13m0-pins ”·º­pwm14pwm14m0-pins ”·º®pwm15pwm15m0-pins ”·º¯refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ”¸¸¸¸ºbsdmmc0-clk ”¸ºcsdmmc0-cmd ”¸ºdsdmmc0-det ”¹ºesdmmc1sdmmc1-bus4@ ”¸¸¸¸ºgsdmmc1-clk ”¸ºisdmmc1-cmd ”¸ºhsdmmc2sdmmc2m1-bus4@ ”¸¸¸¸ºJsdmmc2m1-clk ”¸ºLsdmmc2m1-cmd ”¸ºKsdmmc2m1-det ”¹ºMspdifspdifm0-tx ”·º€spi0spi0m0-pins0 ” ···ºˆspi0m0-cs0 ”·º†spi0m0-cs1 ”·º‡spi1spi1m0-pins0 ” ···º‹spi1m0-cs0 ”·º‰spi1m0-cs1 ”·ºŠspi2spi2m0-pins0 ”···ºŽspi2m0-cs0 ”·ºŒspi2m0-cs1 ”·º�spi3spi3m0-pins0 ” ·· ·º‘spi3m0-cs0 ”·º�spi3m0-cs1 ”·º�tsadctsadc-shutorg ”·º¡tsadc-pin ”·º¢uart0uart0-xfer ”¹¹º*uart1uart1m0-xfer ” ¹ ¹º’uart1m0-ctsn ”·º“uart1m0-rtsn ” ·º”uart2uart2m0-xfer ”¹¹º•uart3uart3m0-xfer ”¹¹º–uart4uart4m0-xfer ”¹¹º—uart5uart5m0-xfer ”¹¹º˜uart6uart6m0-xfer ”¹¹º™uart7uart7m0-xfer ”¹¹ºšuart8uart8m0-xfer ”¹¹º›uart9uart9m0-xfer ”¹¹ºœvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2audio-amplifierspk-amp-enable-h ”·ºÌgpio-controlbtn-pins-ctrl ”¹¹¹¹¹¹¹¹¹¹¹¹¹¹¹¹ºÁbtn-pins-vol ”¹¹ºÄgpio-lcdlcd-rst ”·ºYgpio-ledsled-pins0 ” · ··ºÅhp-detecthp-det ”¹ºÉsdio-pwrseqwifi-enable-h ”·ºÈusbvcc5v0-host-en ”¹ºÍvcc5v0-otg-en ”¹vcc-lcdvcc-lcd-en ”·ºÎvcc-wifivcc-wifi-h ”·ºÏchosen ¢serial2:1500000n8adc-joystick ,adc-joystick ®¿¿¿¿ º< axis@0  È Ñ Úÿ äaxis@1  È Ñ Úÿ äaxis@2  È Ñ Úÿ äaxis@3  È Ñ Úÿ äbacklight,pwm-backlight ï& üÀa¨ºWbattery,simple-battery =  #“à @„€ eAœà ‹cx ²?$ Ï3á@ ì¨ ?$d>M8_=ïxZ=´àU=~0P=W K= pF<› A<0<;’7;,p2:Úh-:£¸(:aP#9ÿ¨9~À8ýØ8F@7@ˆ 66è3á@º(gpio-keys-control ,gpio-keysðÁúdefaultbutton-a z EAST ä1button-b z SOUTH ä0button-down zà DPAD-DOWN ä!button-l1 z TL ä6button-l2 z TL2 ä8button-left z DPAD-LEFT ä"button-right z DPAD-RIGHT ä#button-select zà SELECT ä:button-start zà START ä;button-thumbl zà THUMBL ä=button-thumbr zà THUMBR ä>button-r1 z TR ä7button-r2 z TR2 ä9button-up zà DPAD-UP ä button-x z NORTH ä3button-y z WEST ä4gpio-keys-vol ,gpio-keys ðÄúdefaultbutton-voldown zà VOLUMEDOWN ärbutton-volup zà VOLUMEUP äsgpio-leds ,gpio-ledsúdefaultðÅled-0 ' -off zà  ;statusled-1 ' -on zà  ;powerled-2 ' zà ;charginghdmi-con,hdmi-connector‰]EcportendpointMƺ_sdio-pwrseq,mmc-pwrseq-simpleÇ ext_clockðÈúdefault DÈ t#ºfsound,simple-audio-cardðÉúdefault =rk817_ext [ÊTi2s vÃmC ”MicrophoneMic JackHeadphoneHeadphonesSpeakerInternal Speakersž ®MICLMic JackHeadphonesHPOLHeadphonesHPORInternal SpeakersSpeaker Amp OUTLInternal SpeakersSpeaker Amp OUTRSpeaker Amp INLHPOLSpeaker Amp INRHPOR ÈInternal Speakerssimple-audio-card,codecŽÇsimple-audio-card,cpuŽËaudio-amplifier,simple-audio-amplifier ÝÃðÌúdefault çSpeaker AmpºÊregulator-vcc5v0-host,regulator-fixed ù �ÃðÍúdefault ­vcc5v0_host¨'º´regulator-vcc-lcd,regulator-fixed ù �#ðÎúdefaultQ2Z i2Z ­vcc_lcdºXregulator-vcc-sys,regulator-fixed+?Q9ûÀi9ûÀ­vcc_sysº&regulator-vcc-wifi,regulator-fixed �#ðÏúdefaultQ2Z i2Z  ­vcc_wifiºj interrupt-parent#address-cells#size-cellscompatiblemodelchassis-typegpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1mmc2mmc3device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grfwakeup-source#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-initial-moderegulator-nameregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendmonitored-batteryrockchip,resistor-sense-micro-ohmsrockchip,sleep-enter-current-microamprockchip,sleep-filter-current-microampfcs,suspend-voltage-selectorvin-supplydmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr104vqmmc-supplysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointbacklightiovcc-supplyreset-gpiosrotationddc-i2c-busrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanescap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablevmmc-supplymmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathio-channelspoll-intervalabs-flatabs-fuzzabs-rangelinux,codepower-supplypwmscharge-full-design-microamp-hourscharge-term-current-microampconstant-charge-current-max-microampconstant-charge-voltage-max-microvoltfactory-internal-resistance-micro-ohmsvoltage-max-design-microvoltvoltage-min-design-microvoltocv-capacity-celsiusocv-capacity-table-0labelautorepeatcolordefault-statefunctionpost-power-on-delay-mssimple-audio-card,aux-devssimple-audio-card,hp-det-gpiosimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,pin-switchessound-name-prefixenable-active-high