Ð þíûö8î`( –î(3rockchip,rk3399-sapphire-excavatorrockchip,rk3399 +7Excavator-RK3399 Boardaliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000ƒ/i2c@ff3e0000ˆ/serial@ff180000�/serial@ff190000˜/serial@ff1a0000 /serial@ff1b0000¨/serial@ff370000°/spi@ff1c0000µ/spi@ff1d0000º/spi@ff1e0000¿/spi@ff350000Ä/spi@ff1f0000É/spi@ff200000Î/ethernet@fe300000Ø/mmc@fe320000Ý/mmc@fe330000â/mmc@fe310000cpus+cpu-mapcluster0core0çcore1çcore2çcore3çcluster1core0çcore1çcpu@0ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@1ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@2ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@3ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@100ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôcpu@101ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôl2-cache-cluster0cache^k@}ä l2-cache-cluster1cache^k@}äidle-states"pscicpu-sleeparm,idle-state/@Wxøúh„ä cluster-sleeparm,idle-state/@W�øôhÐä display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmcŒ¨›dmc_clk §disabledpmu_a53arm,cortex-a53-pmu®pmu_a72arm,cortex-a72-pmu®psci arm,psci-1.0smctimerarm,armv8-timer@®   ¹xin24m fixed-clockÐn6àxin24móä‘pcie@f8000000rockchip,rk3399-pcie ÷øýaxi-baseapb-baseëpci+ ' ÅÄG ›aclkaclk-perfhclkpm0®1231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38ˆ‚úúà�ûàûà8�‚ƒ„…†�€(–coremgmtmgmt-stickypipepmpclkaclk§okay ¢«µdefaultÃinterrupt-controllerÍ äpcie-ep@f8000000rockchip,rk3399-pcie-ep ÷ýúapb-basemem-base ÅÄG ›aclkaclk-perfhclkpmâ«8�‚ƒ„…†�€(–coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3ð µdefaultà §disabledethernet@fe300000rockchip,rk3399-gmac÷þ0® 1macirq8ighfjÕfM›stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac�‰ –stmmaceth)§okay4¦D[inputh srgmiiµdefaultÃ! |"Œ ¢'ÃP·(Àmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ1@®@Éúð€ îMœ�›biuciuciu-driveciu-sample×�y–reset§okayâìýÐúð€  #+µdefault Ã$%&9mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ2@®AÉðÑ€4ÍG ë ÎLš››biuciuciu-driveciu-sample×�z–reset§okay\âfìÐðÑ€xµdefaultÃ'()*ƒ+�,mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1÷þ3® œ4NG ëÂNð›clk_xinclk_ahbàemmc_cardclockóy- ~phy_arasan²§okayâÃÒ+ä•usb@fe380000 generic-ehci÷þ8®ÈÉ.y/~usb§okayusb@fe3a0000 generic-ohci÷þ:®ÈÉ.y/~usb§okayusb@fe3c0000 generic-ehci÷þ<®ÊË0y1~usb§okayusb@fe3e0000 generic-ohci÷þ>® ÊË0y1~usb§okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell÷þCM ›apb_pclkçdebug@fe432000&arm,coresight-cpu-debugarm,primecell÷þC M ›apb_pclkçdebug@fe434000&arm,coresight-cpu-debugarm,primecell÷þC@M ›apb_pclkçdebug@fe436000&arm,coresight-cpu-debugarm,primecell÷þC`M ›apb_pclkçdebug@fe610000&arm,coresight-cpu-debugarm,primecell÷þaL ›apb_pclkçdebug@fe710000&arm,coresight-cpu-debugarm,primecell÷þqL ›apb_pclkçusb@fe800000rockchip,rk3399-dwc3+ˆ0�ƒöøôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�% –usb3-otg§okayusb@fe800000 snps,dwc3÷þ€®i�öƒ›refbus_earlysuspendìhosty23~usb2-phyusb3-phy ôutmi_wideý6Op§okayusb@fe900000rockchip,rk3399-dwc3+ˆ0‚„÷øôùG›ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�& –usb3-otg§okayusb@fe900000 snps,dwc3÷þ�®n‚÷„›refbus_earlysuspendìhosty45~usb2-phyusb3-phy ôutmi_wideý6Op§okaydp@fec00000rockchip,rk3399-cdn-dp÷þÀ® 4r¡Gõá ë ru¡o›core-clkpclkspdifgrfy67 �HJý–spdifdptxapbcore’ §disabledportsport+endpoint@0÷£8ä¥endpoint@1÷£9äŸinterrupt-controller@fee00000 arm,gic-v3 +ˆÍP÷þàþð ÿðÿñÿò® ämsi-controller@fee20000arm,gic-v3-its³Â÷þâäppi-partitionsinterrupt-partition-0Íäinterrupt-partition-1Íäsaradc@ff100000rockchip,rk3399-saradc÷ÿ®>ÖPe›saradcapb_pclk�Ô –saradc-apb§okayè:äÅcrypto@ff8b0000rockchip,rk3399-crypto÷ÿ‹@®ÐÒ…›hclk_masterhclk_slavesclk�µ®¯–masterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto÷ÿ‹€@®‡ÑÓ†›hclk_masterhclk_slavesclk�º¸¹–masterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2c÷ÿ4AG ëÂAU ›i2cpclk®;µdefaultÃ;+§okayô, rt5651@1arealtek,rt5651÷Y›mclk #< /= ’äÌi2c@ff120000rockchip,rk3399-i2c÷ÿ4BG ëÂBV ›i2cpclk®#µdefaultÃ>+ §disabledi2c@ff130000rockchip,rk3399-i2c÷ÿ4CG ëÂCW ›i2cpclk®"µdefaultÃ?+§okayô ä¬i2c@ff140000rockchip,rk3399-i2c÷ÿ4DG ëÂDX ›i2cpclk®&µdefaultÃ@+ §disabledi2c@ff150000rockchip,rk3399-i2c÷ÿ4EG ëÂEY ›i2cpclk®%µdefaultÃA+ §disabledi2c@ff160000rockchip,rk3399-i2c÷ÿ4FG ëÂFZ ›i2cpclk®$µdefaultÃB+ §disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿQ`›baudclkapb_pclk®c<FµdefaultÃCD§okayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿRa›baudclkapb_pclk®b<FµdefaultÃE §disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿSb›baudclkapb_pclk®d<FµdefaultÃF§okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿTc›baudclkapb_pclk®e<FµdefaultÃG §disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿG[›spiclkapb_pclk®DSH H XtxrxµdefaultÃIJKL+ §disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿH\›spiclkapb_pclk®5SH H XtxrxµdefaultÃMNOP+ §disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿI]›spiclkapb_pclk®4SHHXtxrxµdefaultÃQRST+ §disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿJ^›spiclkapb_pclk®CSHHXtxrxµdefaultÃUVWX+ §disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿ K_›spiclkapb_pclk®„SYY XtxrxµdefaultÃZ[\]+ §disabledthermal-zonescpu-thermalbdxè†^tripscpu_alert0–p¢Ðòpassiveä_cpu_alert1–$ø¢Ðòpassiveä`cpu_crit–s¢Ð òcriticalcpu_hot¢'–ÖØòactiveäbcooling-mapsmap0­_²ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1­`H²ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap2 ²aÿÿÿÿÿÿÿÿ­bgpu-thermalbdxè†^tripsgpu_alert0–$ø¢Ðòpassiveäcgpu_crit–s¢Ð òcriticalcooling-mapsmap0­c ²dÿÿÿÿÿÿÿÿtsadc@ff260000rockchip,rk3399-tsadc÷ÿ&®a4OG q°Od›tsadcapb_pclk�è –tsadc-apbÁsµinitdefaultsleepÃeØfâeì§okayä^qos@ffa58000rockchip,rk3399-qossyscon÷ÿ¥€ änqos@ffa5c000rockchip,rk3399-qossyscon÷ÿ¥À äoqos@ffa60080rockchip,rk3399-qossyscon÷ÿ¦€ qos@ffa60100rockchip,rk3399-qossyscon÷ÿ¦ qos@ffa60180rockchip,rk3399-qossyscon÷ÿ¦€ qos@ffa70000rockchip,rk3399-qossyscon÷ÿ§ ärqos@ffa70080rockchip,rk3399-qossyscon÷ÿ§€ äsqos@ffa74000rockchip,rk3399-qossyscon÷ÿ§@ äpqos@ffa76000rockchip,rk3399-qossyscon÷ÿ§` äqqos@ffa90000rockchip,rk3399-qossyscon÷ÿ© ätqos@ffa98000rockchip,rk3399-qossyscon÷ÿ©€ ägqos@ffaa0000rockchip,rk3399-qossyscon÷ÿª äuqos@ffaa0080rockchip,rk3399-qossyscon÷ÿª€ ävqos@ffaa8000rockchip,rk3399-qossyscon÷ÿª€ äwqos@ffaa8080rockchip,rk3399-qossyscon÷ÿª€€ äxqos@ffab0000rockchip,rk3399-qossyscon÷ÿ« ähqos@ffab0080rockchip,rk3399-qossyscon÷ÿ«€ äiqos@ffab8000rockchip,rk3399-qossyscon÷ÿ«€ äjqos@ffac0000rockchip,rk3399-qossyscon÷ÿ¬ äkqos@ffac0080rockchip,rk3399-qossyscon÷ÿ¬€ älqos@ffac8000rockchip,rk3399-qossyscon÷ÿ¬€ äyqos@ffac8080rockchip,rk3399-qossyscon÷ÿ¬€€ äzqos@ffad0000rockchip,rk3399-qossyscon÷ÿ­ ä{qos@ffad8080rockchip,rk3399-qossyscon÷ÿ­€€ qos@ffae0000rockchip,rk3399-qossyscon÷ÿ® ämpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd÷ÿ1power-controller!rockchip,rk3399-power-controller4+äpower-domain@34÷"áÝHg4power-domain@33÷!ÜåHhi4power-domain@31÷ëêHj4power-domain@32÷  í쟞Hkl4power-domain@35÷#ÐHm4power-domain@25÷l4power-domain@23÷ðHn4power-domain@22÷ÕfHo4power-domain@27÷ÎLHp4power-domain@28÷îHq4power-domain@8÷~}4power-domain@9÷ €4power-domain@24÷ôHrs4power-domain@15÷4+power-domain@21÷ÞçrHt4power-domain@19÷åßHuv4power-domain@20÷æàHwx4power-domain@16÷4+power-domain@17÷ÙÙHyz4power-domain@18÷ÛÛH{4syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd÷ÿ2äio-domains&rockchip,rk3399-pmu-io-voltage-domain§okayO|spi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi÷ÿ5}}›spiclkapb_pclk®<µdefaultÃ~€�+ §disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿ7}}"›baudclkapb_pclk®f<Fµdefault §disabledi2c@ff3c0000rockchip,rk3399-i2c÷ÿ<4} G ëÂ} } ›i2cpclk®9µdefaultÃ+§okayЀô¨ pmic@1brockchip,rk808÷ „®óàxin32krk808-clkout2µdefaultÃ…^�†™†¥†±†½†ɆÕ‡á†í†ú† ‡ ˆäÍregulatorsDCDC_REG1 !vdd_center 0 D V q° n™p †qregulator-state-mem ›DCDC_REG2 !vdd_cpu_l 0 D V q° n™p †qä regulator-state-mem ›DCDC_REG3 !vcc_ddr 0 Dregulator-state-mem ´DCDC_REG4 !vcc_1v8 0 D Vw@ nw@ä¿regulator-state-mem ´ Ìw@LDO_REG1 !vcc1v8_dvp 0 D Vw@ nw@regulator-state-mem ›LDO_REG2 !vcc3v0_tp 0 D V-ÆÀ n-ÆÀregulator-state-mem ›LDO_REG3 !vcc1v8_pmu 0 D Vw@ nw@äˆregulator-state-mem ´ Ìw@LDO_REG4 !vcc_sdio 0 D Vw@ n2Z ä,regulator-state-mem ´ Ì-ÆÀLDO_REG5 !vcca3v0_codec 0 D V-ÆÀ n-ÆÀregulator-state-mem ›LDO_REG6 !vcc_1v5 0 D Vã` nã`regulator-state-mem ´ Ìã`LDO_REG7 !vcca1v8_codec 0 D Vw@ nw@ä’regulator-state-mem ›LDO_REG8 !vcc_3v0 0 D V-ÆÀ n-ÆÀä|regulator-state-mem ´ Ì-ÆÀSWITCH_REG1 !vcc3v3_s3 0 Dä regulator-state-mem ›SWITCH_REG2 !vcc3v3_s0 0 DäÉregulator-state-mem ›regulator@40silergy,syr827÷@ è !vdd_cpu_b V ß4 nã` †è 0 D †äregulator-state-mem ›regulator@41silergy,syr828÷A è !vdd_gpu V ß4 nã` †è 0 D †ä¸regulator-state-mem ›i2c@ff3d0000rockchip,rk3399-i2c÷ÿ=4} G ëÂ} } ›i2cpclk®8µdefaultÉ+§okayôX accelerometer@68invensense,mpu6500÷h „®i2c@ff3e0000rockchip,rk3399-i2c÷ÿ>4} G ëÂ} } ›i2cpclk®:µdefaultÊ+ §disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB µdefaultË}§okayäÆpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB µdefaultÃŒ} §disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB  µdefaultÃ�}§okayäÄpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm÷ÿB0 µdefaultÃŽ} §disableddfi@ff630000÷ÿc@rockchip,rk3399-dfi®ƒy ›pclk_ddr_monävideo-codec@ff650000rockchip,rk3399-vpu÷ÿe ®rq 1vepuvdpuëê ›aclkhclk �iommu@ff650800rockchip,iommu÷ÿe@®sëê ›aclkiface "ä�video-codec@ff660000rockchip,rk3399-vdec÷ÿf€®t í쟞›axiahbcabaccore � iommu@ff660480rockchip,iommu ÷ÿf€@ÿfÀ@®uíì ›aclkiface  "ä�iommu@ff670800rockchip,iommu÷ÿg@®*áÝ ›aclkiface " §disabledrga@ff680000rockchip,rk3399-rga÷ÿh®7Üåm›aclkhclksclk�jgi –coreaxiahb!efuse@ff690000rockchip,rk3399-efuse÷ÿi€+} ›pclk_efusecpu-id@7÷cpu-leakage@17÷gpu-leakage@18÷center-leakage@19÷cpu-leakage@1a÷logic-leakage@1b÷wafer-info@1c÷dma-controller@ff6d0000arm,pl330arm,primecell÷ÿm@ ® / :Ó ›apb_pclkäYdma-controller@ff6e0000arm,pl330arm,primecell÷ÿn@ ® / :Ô ›apb_pclkäHclock-controller@ff750000rockchip,rk3399-pmucru÷ÿu‘›xin24mó Q4}G(Jñä}clock-controller@ff760000rockchip,rk3399-cru÷ÿv‘›xin24mó Qˆ4ÀÀ@ÂÁBÉÂCãÞxíDG#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂׄäsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd÷ÿw+äio-domains"rockchip,rk3399-io-voltage-domain§okay ^| k’ x, …|mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0w¥o›dphy-refdphy-cfggrf • §disabledä§usb2phy@e450rockchip,rk3399-usb2phy÷äP{›phyclkóàclk_usbphy0_480m§okayä.host-port •® 1linestate§okayh“ä/otg-port •0®ghj1otg-bvalidotg-idlinestate§okayä2usb2phy@e460rockchip,rk3399-usb2phy÷ä`|›phyclkóàclk_usbphy1_480m§okayä0host-port •® 1linestate§okayh”ä1otg-port •0®lmo1otg-bvalidotg-idlinestate§okayä4phy@f780rockchip,rk3399-emmc-phy÷÷€$•›emmcclk  2 •§okayä-pcie-phyrockchip,rk3399-pcie-phyŠ›refclk •�‡–phy§okayäphy@ff7c0000rockchip,rk3399-typec-phy÷ÿ|~}›tcpdcoretcpdphy-ref4~Gúð€�•”L–uphyuphy-pipeuphy-tcphy§okaydp-port •ä6usb3-port •ä3phy@ff800000rockchip,rk3399-typec-phy÷ÿ€€›tcpdcoretcpdphy-ref4€Gúð€ ��œM–uphyuphy-pipeuphy-tcphy§okaydp-port •ä7usb3-port •ä5watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt÷ÿ„€|®xrktimer@ff850000rockchip,rk3399-timer÷ÿ…®QhZ ›pclktimerspdif@ff870000rockchip,rk3399-spdif÷ÿ‡®BSYXtx ›mclkhclkU×µdefaultÖ’§okayi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿˆ®'SYYXtxrx›i2s_clki2s_hclkVÔµbclk_onbclk_off×ؘ’§okay ´ ÏäËi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿ‰®(SYYXtxrx›i2s_clki2s_hclkWÕµdefaultÙ’ §disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿŠ®)SYYXtxrx›i2s_clki2s_hclkXÖ’§okayäªvop@ff8f0000rockchip,rk3399-vop-lit ÷ÿ� ÿ� ®w4ÛÛGׄõáÛµÛ›aclk_vopdclk_vophclk_vop š� –axiahbdclk§okayport+äendpoint@0÷£›ä°endpoint@1÷£œäµendpoint@2÷£�ä®endpoint@3÷£žä²endpoint@4÷£Ÿä9iommu@ff8f3f00rockchip,iommu÷ÿ�?®wÛÛ ›aclkiface "§okayäšvop@ff900000rockchip,rk3399-vop-big ÷ÿ� ÿ� ®v4ÙÙGׄõáÙ´Ù›aclk_vopdclk_vophclk_vop  � –axiahbdclk§okayport+äendpoint@0÷£¡ä´endpoint@1÷£¢ä¯endpoint@2÷££ä­endpoint@3÷£¤ä±endpoint@4÷£¥ä8iommu@ff903f00rockchip,iommu÷ÿ�?®vÙÙ ›aclkiface "§okayä isp0@ff910000rockchip,rk3399-cif-isp÷ÿ‘@®+néã›ispaclkhclk ¦y§~dphy §disabledports+port@0÷+iommu@ff914000rockchip,iommu ÷ÿ‘@ÿ‘P®+éã ›aclkiface " éä¦isp1@ff920000rockchip,rk3399-cif-isp÷ÿ’@®,oêä›ispaclkhclk ¨y©~dphy §disabledports+port@0÷+iommu@ff924000rockchip,iommu ÷ÿ’@ÿ’P®,êä ›aclkiface " éä¨hdmi-soundsimple-audio-card i2s  7hdmi-sound§okaysimple-audio-card,cpu Nªsimple-audio-card,codec N«hdmi@ff940000rockchip,rk3399-dw-hdmi÷ÿ”F®(tqpo›iahbisfrcecgrfref’§okay X¬ä«ports+port@0÷+endpoint@0÷£­ä£endpoint@1÷£®ä�port@1÷dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€®- ¢p£o›refpclkphy_cfggrf�û–apb+ §disabledports+port@0÷+endpoint@0÷£¯ä¢endpoint@1÷£°ä›port@1÷dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€€®. ¢q¤o›refpclkphy_cfggrf�ü–apb+ • §disabledä©ports+port@0÷+endpoint@0÷£±ä¤endpoint@1÷£²äžport@1÷dp@ff970000rockchip,rk3399-edp÷ÿ—€® jlo ›dppclkgrfµdefaultó�–dp§okayports+port@0÷+endpoint@0÷£´ä¡endpoint@1÷£µäœport@1÷+endpoint@0÷£¶äÊgpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860÷ÿš0® 1jobmmugpuÐ#2 P#§okayÅ· d¸ädpinctrlrockchip,rk3399-pinctrl+ˆgpio@ff720000rockchip,gpio-bank÷ÿr}® p €Í ä=gpio@ff730000rockchip,gpio-bank÷ÿs}® p €Í ä„gpio@ff780000rockchip,gpio-bank÷ÿxP® p €Í ägpio@ff788000rockchip,gpio-bank÷ÿx€Q® p €Í ä"gpio@ff790000rockchip,gpio-bank÷ÿyR® p €Í ä<pcfg-pull-up Œä¼pcfg-pull-down ™ä½pcfg-pull-none ¨ä¹pcfg-pull-none-12ma ¨ µ ä»pcfg-pull-none-13ma ¨ µ äºpcfg-pull-none-18ma ¨ µpcfg-pull-none-20ma ¨ µpcfg-pull-up-2ma Œ µpcfg-pull-up-8ma Œ µpcfg-pull-up-18ma Œ µpcfg-pull-up-20ma Œ µpcfg-pull-down-4ma ™ µpcfg-pull-down-8ma ™ µpcfg-pull-down-12ma ™ µ pcfg-pull-down-18ma ™ µpcfg-pull-down-20ma ™ µpcfg-output-high Äpcfg-output-low Ðpcfg-input-enable Ûpcfg-input-pull-up Û Œpcfg-input-pull-down Û ™clockclk-32k è¹cifcif-clkin è ¹cif-clkouta è ¹edpedp-hpd è¹ä³gmacrgmii-pinsð 躹 ¹ º ¹ ¹¹¹¹ºº¹¹ººä!rmii-pins  è ¹ º ¹ ¹ ¹¹¹¹ººi2c0i2c0-xfer è¹¹äƒi2c1i2c1-xfer è¹¹ä;i2c2i2c2-xfer è»»ä>i2c3i2c3-xfer è¹¹ä?i2c4i2c4-xfer è ¹ ¹ä‰i2c5i2c5-xfer è ¹ ¹ä@i2c6i2c6-xfer è ¹ ¹äAi2c7i2c7-xfer è¹¹äBi2c8i2c8-xfer è¹¹äŠi2s0i2s0-2ch-bus` è¹¹¹¹¹¹i2s0-2ch-bus-bclk-off` è¹¹¹¹¹¹i2s0-8ch-bus� è¹¹¹¹¹¹¹¹¹ä—i2s0-8ch-bus-bclk-off� è¹¹¹¹¹¹¹¹¹ä˜i2s1i2s1-2ch-busP è¹¹¹¹¹ä™i2s1-2ch-bus-bclk-offP è¹¹¹¹¹sdio0sdio0-bus1 è¼sdio0-bus4@ è¼¼¼¼ä$sdio0-cmd è¼ä%sdio0-clk è¹ä&sdio0-cd è¼sdio0-pwr è¼sdio0-bkpwr è¼sdio0-wp è¼sdio0-int è¼sdmmcsdmmc-bus1 è¼sdmmc-bus4@ è¼ ¼ ¼ ¼ä*sdmmc-clk è ¹ä'sdmmc-cmd è ¼ä(sdmmc-cd è¼ä)sdmmc-wp è¼suspendap-pwroff è¹ddrio-pwroff è¹spdifspdif-bus è¹ä–spdif-bus-1 è¹spi0spi0-clk è¼äIspi0-cs0 è¼äLspi0-cs1 è¼spi0-tx è¼äJspi0-rx è¼äKspi1spi1-clk è ¼äMspi1-cs0 è ¼äPspi1-rx è¼äOspi1-tx è¼äNspi2spi2-clk è ¼äQspi2-cs0 è ¼äTspi2-rx è ¼äSspi2-tx è ¼äRspi3spi3-clk è¼ä~spi3-cs0 è¼ä�spi3-rx è¼ä€spi3-tx è¼äspi4spi4-clk è¼äUspi4-cs0 è¼äXspi4-rx è¼äWspi4-tx è¼äVspi5spi5-clk è¼äZspi5-cs0 è¼ä]spi5-rx è¼ä\spi5-tx è¼ä[testclktest-clkout0 è¹test-clkout1 è¹test-clkout2 è¹tsadcotp-pin è¹äeotp-out è¹äfuart0uart0-xfer è¼¹äCuart0-cts è¹äDuart0-rts è¹uart1uart1-xfer è ¼ ¹äEuart2auart2a-xfer è¼ ¹uart2buart2b-xfer è¼¹uart2cuart2c-xfer è¼¹äFuart3uart3-xfer è¼¹äGuart3-cts è¹uart3-rts è¹uart4uart4-xfer è¼¹ä‚uarthdcpuarthdcp-xfer è¼¹pwm0pwm0-pin è¹ä‹pwm0-pin-pull-down è½vop0-pwm-pin è¹vop1-pwm-pin è¹pwm1pwm1-pin è¹äŒpwm1-pin-pull-down è½pwm2pwm2-pin è¹ä�pwm2-pin-pull-down è½pwm3apwm3a-pin è¹äŽpwm3bpwm3b-pin è¹hdmihdmi-i2c-xfer è¹¹hdmi-cec è¹pciepci-clkreqn-cpm è¹äpci-clkreqnb-cpm è¹äbuttonspwr-btn è¼ä¾fanmotor-pwr è¹pmicpmic-int-l è¼ä…vsel1-pin è½vsel2-pin è½sdsdmmc0-pwr-h è¹äÀusb2vcc5v0-host-en è¹äÁvcc5v0-typec0-en è¹äÂsdio-pwrseqwifi-enable-h è ¹äÎlcd-panellcd-panel-reset è¼äÈopp-table-0operating-points-v2 öä opp00 Q–  –¨ –¨Ð œ@opp01 #ÃF  –¨ –¨Ðopp02 0£,  øP øPÐopp03 <Ü HHÐopp04 G†Œ B@B@Ðopp05 Tfr *ˆ*ˆÐopp-table-1operating-points-v2 öäopp00 Q–  –¨ –¨Ð œ@opp01 #ÃF  –¨ –¨Ðopp02 0£,  –¨ –¨Ðopp03 <Ü  Yø YøÐopp04 G†Œ ~ð~ðÐopp05 Tfr £è£èÐopp06 _Ø" ÈàÈàÐopp07 kIÒ O€O€Ðopp-table-2operating-points-v2ä·opp00  ë  –¨ –¨Œ0opp01 ³Ü@  –¨ –¨Œ0opp02 ׄ  –¨ –¨Œ0opp03 Íe  Yø YøŒ0opp04 #ÃF HHŒ0opp05 /¯ ÈàÈàŒ0chosen 'serial2:1500000n8external-gmac-clock fixed-clockÐsY@ àclkin_gmacóädc-12vregulator-fixed !dc_12v 0 D V· n·äÃgpio-fan# gpio-fan 3 ¸ ¥„§okayäagpio-keys gpio-keys Fkey-power Qd ¥= cGPIO Power it tµdefaultþvcc1v8-s3regulator-fixed !vcc1v8_s3 0 D Vw@ nw@ ¿ä:vcc3v0-sdregulator-fixed … ‡=µdefaultÃÀ 0 n-ÆÀ V-ÆÀ !vcc3v0_sd ‡ä+vcc3v3-sysregulator-fixed !vcc3v3_sys 0 D V2Z  n2Z  †ä‡vcc5v0-host-regulatorregulator-fixed … ‡<µdefaultÃÁ !vcc5v0_host 0 †ä”vcc5v0-typec0-regulatorregulator-fixed … ‡µdefaultà!vcc5v0_typec0 †ä“vcc-sysregulator-fixed !vcc_sys 0 D VLK@ nLK@ Ãä†vdd-logpwm-regulator ˜Äa¨ �† !vdd_log 0 D V 5 n\Àadc-keys adc-keys ¨Å ´buttons Åw@ ßdbutton-up cVolume Up is 토button-down cVolume Down ir í“àbutton-back cBack iž í¨button-menu cMenu i‹ í Ðbacklightpwm-backlight   !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~€�‚ƒ„…†‡ˆ‰Š‹Œ�Ž��‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§¨©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚÛÜÝÞßàáâãäåæçèéêëìíîïðñòóôõö÷øùúûüýþÿ È 2„  ˜Æa¨§okayäÇedp-panellg,lp079qx1-sp0v ?Ç 2<µdefaultÃÈ IÉportendpoint£Êä¶rt5651-soundsimple-audio-card 7realtek,rt5651-codec i2s - VMicrophoneMic JackHeadphoneHeadphone JackH pMic JackMICBIAS1IN1PMic JackHeadphone JackHPOLHeadphone JackHPORsimple-audio-card,cpu NËsimple-audio-card,codec NÌsdio-pwrseqmmc-pwrseq-simpleÍ ›ext_clockµdefaultÃÎ Š= ä# compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllermax-functionsrockchip,max-outbound-regionspower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratesbroken-cdcap-mmc-highspeeddisable-wpvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nshp-det-gpiospk-con-gpioreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathgpio-fan,speed-mapautorepeatdebounce-intervallabellinux,codelinux,input-typeenable-active-highpwmspwm-supplyio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervalpress-threshold-microvoltbrightness-levelsdefault-brightness-levelenable-gpiosbacklightpower-supplysimple-audio-card,widgetssimple-audio-card,routingreset-gpios