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fixed-clockT1n6Axin24mM^grf@ff000000&rockchip,rk3308-grfsysconsimple-mfdËÿ€M9io-domains"rockchip,rk3308-io-voltage-domainaokayh v „ ’   ® reboot-modesyscon-reboot-mode¼ÃRBÃÓRBÃßRBÃëRBÃùRBà syscon@ff008000.rockchip,rk3308-usb2phy-grfsysconsimple-mfdËÿ€@+usb2phy@100rockchip,rk3308-usb2phyË ÝH.phyclk Ausb480m_phyTaokayM otg-port$CDE:otg-bvalidotg-idlinestateJaokayM?host-port J :linestateJaokayM@syscon@ff00b000-rockchip,rk3308-detect-grfsysconsimple-mfdËÿ°+syscon@ff00c000+rockchip,rk3308-core-grfsysconsimple-mfdËÿÀ+i2c@ff040000(rockchip,rk3308-i2crockchip,rk3399-i2cËÿÝÊ .i2cpclk  Udefaultc+ adisabledi2c@ff050000(rockchip,rk3308-i2crockchip,rk3399-i2cËÿÝË .i2cpclk  Udefaultc+ adisabledi2c@ff060000(rockchip,rk3308-i2crockchip,rk3399-i2cËÿÝÌ .i2cpclk  Udefaultc+ adisabledi2c@ff070000(rockchip,rk3308-i2crockchip,rk3399-i2cËÿÝÍ .i2cpclk Udefaultc+ adisabledwatchdog@ff080000 rockchip,rk3308-wdtsnps,dw-wdtËÿÝÖ  aokayserial@ff0a0000&rockchip,rk3308-uartsnps,dw-apb-uartËÿ  ÝÅ.baudclkapb_pclkmwUdefaultcaokayserial@ff0b0000&rockchip,rk3308-uartsnps,dw-apb-uartËÿ  ÝÆ.baudclkapb_pclkmwUdefault c adisabledserial@ff0c0000&rockchip,rk3308-uartsnps,dw-apb-uartËÿ  ÝÇ.baudclkapb_pclkmwUdefaultc adisabledserial@ff0d0000&rockchip,rk3308-uartsnps,dw-apb-uartËÿ  ÝÈ.baudclkapb_pclkmwUdefaultc adisabledserial@ff0e0000&rockchip,rk3308-uartsnps,dw-apb-uartËÿ ÝÉ.baudclkapb_pclkmwUdefault caokay„bluetoothbrcm,bcm43430a1-btÝ.lpo   :host-wakeup ”  ¨ Udefault c· à spi@ff120000(rockchip,rk3308-spirockchip,rk3066-spiËÿ +ÝÏ.spiclkapb_pclkÐÕtxrxUdefaultc !"# adisabledspi@ff130000(rockchip,rk3308-spirockchip,rk3066-spiËÿ +ÝÐ.spiclkapb_pclkÐÕtxrxUdefaultc$%&' adisabledspi@ff140000(rockchip,rk3308-spirockchip,rk3066-spiËÿ +ÝÑ.spiclkapb_pclkÐ((ÕtxrxUdefaultc)*+, adisabledpwm@ff160000(rockchip,rk3308-pwmrockchip,rk3328-pwmËÿÝyè .pwmpclkUdefaultc-ß adisabledpwm@ff160010(rockchip,rk3308-pwmrockchip,rk3328-pwmËÿÝyè .pwmpclkUdefaultc.ß adisabledpwm@ff160020(rockchip,rk3308-pwmrockchip,rk3328-pwmËÿ Ýyè .pwmpclkUdefaultc/ß adisabledpwm@ff160030(rockchip,rk3308-pwmrockchip,rk3328-pwmËÿ0Ýyè .pwmpclkUdefaultc0ß adisabledpwm@ff170000(rockchip,rk3308-pwmrockchip,rk3328-pwmËÿÝxç .pwmpclkUdefaultc1ß adisabledpwm@ff170010(rockchip,rk3308-pwmrockchip,rk3328-pwmËÿÝxç .pwmpclkUdefaultc2ß adisabledpwm@ff170020(rockchip,rk3308-pwmrockchip,rk3328-pwmËÿ Ýxç .pwmpclkUdefaultc3ß adisabledpwm@ff170030(rockchip,rk3308-pwmrockchip,rk3328-pwmËÿ0Ýxç .pwmpclkUdefaultc4ß adisabledpwm@ff180000(rockchip,rk3308-pwmrockchip,rk3328-pwmËÿÝÎ .pwmpclkUdefaultc5ßaokayMmpwm@ff180010(rockchip,rk3308-pwmrockchip,rk3328-pwmËÿÝÎ .pwmpclkUdefaultc6ß adisabledpwm@ff180020(rockchip,rk3308-pwmrockchip,rk3328-pwmËÿ ÝÎ .pwmpclkUdefaultc7ß adisabledpwm@ff180030(rockchip,rk3308-pwmrockchip,rk3328-pwmËÿ0ÝÎ .pwmpclkUdefaultc8ß adisabledrktimer@ff1a0000rockchip,rk3288-timerËÿ  ÝÔ .pclktimersaradc@ff1e0000.rockchip,rk3308-saradcrockchip,rk3399-saradcËÿ %Ý%Ò.saradcapb_pclkêüF saradc-apbaokay efuse@ff210000rockchip,rk3308-otpËÿ!@+Ý'Õå.otpapb_pclkphyüTphyid@7Ëcpu-leakage@17Ëlogic-leakage@18Ëdma-controller@ff2c0000arm,pl330arm,primecellËÿ,@ÝŠ .apb_pclk2Mdma-controller@ff2d0000arm,pl330arm,primecellËÿ-@Ý‹ .apb_pclk2M(i2s@ff320000rockchip,rk3308-i2s-tdmËÿ2 2.mclk_txmclk_rxhclkÝTV¦Ð((Õrxtxü�� tx-mrx-m=9 adisabledi2s@ff330000rockchip,rk3308-i2s-tdmËÿ3 3.mclk_txmclk_rxhclkÝXZ§Ð(Õrxü’“ tx-mrx-m=9 adisabledi2s@ff350000(rockchip,rk3308-i2srockchip,rk3066-i2sËÿ5 4Ý\¨.i2s_clki2s_hclkÐ(( Õtxrxü•”reset-mreset-hUdefaultc:;<= adisabledi2s@ff360000(rockchip,rk3308-i2srockchip,rk3066-i2sËÿ6 5Ý^©.i2s_clki2s_hclkÐ( Õrxü—–reset-mreset-h adisabledspdif-tx@ff3a0000,rockchip,rk3308-spdifrockchip,rk3066-spdifËÿ: 7Ýb¢ .mclkhclkÐ( ÕtxUdefaultc> adisabledusb@ff4000002rockchip,rk3308-usbrockchip,rk3066-usbsnps,dwc2Ëÿ@ BÝž.otg JperipheralRds€€@ ‚? ‡usb2-phyaokayusb@ff440000 generic-ehciËÿD GÝŸ  ‚@‡usbaokayusb@ff450000 generic-ohciËÿE HÝŸ  ‚@‡usbaokaymmc@ff4800000rockchip,rk3308-dw-mshcrockchip,rk3288-dw-mshcËÿH@ L‘ Ýš012.biuciuciu-driveciu-sample›¦ðÑ€UdefaultcABCDaokay´Æ×âEmmc@ff4900000rockchip,rk3308-dw-mshcrockchip,rk3288-dw-mshcËÿI@ M‘ Ýœ:;<.biuciuciu-driveciu-sample›¦ðÑ€aokay´îôüUdefaultcFGHIâ mmc@ff4a00000rockchip,rk3308-dw-mshcrockchip,rk3288-dw-mshcËÿJ@ N‘ Ý›567.biuciuciu-driveciu-sample›¦úð€Udefault cJKLaokay+Æ -M8îüâ ? wifi@1'brcm,bcm43430a1-fmacbrcm,bcm4329-fmacË N :host-wakeUdefaultcOnand-controller@ff4b0000(rockchip,rk3308-nfcrockchip,rv1108-nfcËÿK@ QÝ™-.ahbnfc-LðÑ€cPQRSTUVUdefault adisabledethernet@ff4e0000rockchip,rk3308-gmacËÿN @:macirq@Ý@BBA@†ÃC[.stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macclk_mac_speedarmiiUdefaultcWXü} stmmaceth=9aokayjoutputwY‚ mdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-ieee802.3-c22ËUdefaultcZ�N �ÃP ¯NMYspi@ff4c0000 rockchip,sfcËÿL@ RÝ=�.clk_sfchclk_sfc c[\]Udefault adisabledclock-controller@ff500000rockchip,rk3308-cruËÿPÝ^.xin24m=9T»L€Mcodec@ff560000rockchip,rk3308-codecËÿV=9.mclk_txmclk_rxhclkÝUWÄcodecü™È adisabledinterrupt-controller@ff580000 arm,gic-400@ËÿXÿX ÿX@ ÿX`   ÙêMsram@fff80000 mmio-sramËÿøÿÿø+ddr-sram@0Ë€vad-sram@8000Ë€€pinctrlrockchip,rk3308-pinctrl=9+ÿUdefaultc_gpio@ff220000rockchip,gpio-bankËÿ" (Ý×êÙMNgpio@ff230000rockchip,gpio-bankËÿ# )ÝØêÙgpio@ff240000rockchip,gpio-bankËÿ$ *ÝÙêÙgpio@ff250000rockchip,gpio-bankËÿ% +ÝÚêÙgpio@ff260000rockchip,gpio-bankËÿ& ,ÝÛêÙMpcfg-pull-up"Mipcfg-pull-down/Mfpcfg-pull-none>Mbpcfg-pull-none-2ma>Kpcfg-pull-up-2ma"Kpcfg-pull-up-4ma"KMhpcfg-pull-none-4ma>KMgpcfg-pull-down-4ma/Kpcfg-pull-none-8ma>KM`pcfg-pull-up-8ma"KMapcfg-pull-none-12ma>K Mdpcfg-pull-up-12ma"K Mcpcfg-pull-none-smt>ZMepcfg-output-highopcfg-output-low{pcfg-input-high"†pcfg-input†emmcemmc-clk“ `MGemmc-cmd“aMHemmc-pwren“ bMIemmc-rstn“ bemmc-bus1“aemmc-bus4@“aaaaemmc-bus8€“aaaaaaaaMFflashflash-csn0“ bMSflash-rdy“ bMUflash-ale“ bMPflash-cle“ bMRflash-wrn“bMVflash-rdn“ bMTflash-bus8€“ccccccccMQsfcsfc-bus4@“bbbbM]sfc-bus2 “bbsfc-cs0“bM\sfc-clk“bM[gmacrmii-pins�“dddbbbbb bMWmac-refclk-12ma“ dMXmac-refclk“ bmac-rst“bMZgmac-m1rmiim1-pins�“dddbbbbb bmacm1-refclk-12ma“ dmacm1-refclk“ bi2c0i2c0-xfer “eeMi2c1i2c1-xfer “ e eMi2c2i2c2-xfer “eeMi2c3-m0i2c3m0-xfer “eeMi2c3-m1i2c3m1-xfer “ e ei2c3-m2i2c3m2-xfer “eei2s_2ch_0i2s-2ch-0-mclk“ bi2s-2ch-0-sclk“ bM:i2s-2ch-0-lrck“bM;i2s-2ch-0-sdo“bM=i2s-2ch-0-sdi“bM<i2s_8ch_0i2s-8ch-0-mclk“bi2s-8ch-0-sclktx“bi2s-8ch-0-sclkrx“bi2s-8ch-0-lrcktx“bi2s-8ch-0-lrckrx“bi2s-8ch-0-sdo0“ bi2s-8ch-0-sdo1“ bi2s-8ch-0-sdo2“ bi2s-8ch-0-sdo3“ bi2s-8ch-0-sdi0“ bi2s-8ch-0-sdi1“bi2s-8ch-0-sdi2“bi2s-8ch-0-sdi3“bi2s_8ch_1_m0i2s-8ch-1-m0-mclk“bi2s-8ch-1-m0-sclktx“bi2s-8ch-1-m0-sclkrx“bi2s-8ch-1-m0-lrcktx“bi2s-8ch-1-m0-lrckrx“bi2s-8ch-1-m0-sdo0“bi2s-8ch-1-m0-sdo1-sdi3“bi2s-8ch-1-m0-sdo2-sdi2“ bi2s-8ch-1-m0-sdo3_sdi1“ bi2s-8ch-1-m0-sdi0“ bi2s_8ch_1_m1i2s-8ch-1-m1-mclk“ bi2s-8ch-1-m1-sclktx“ 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fpwm11pwm11-pin“bM0pwm11-pin-pull-down“frtcrtc-32k“bM_sdmmcsdmmc-clk“gMAsdmmc-cmd“hMBsdmmc-det“hMCsdmmc-pwren“gsdmmc-bus1“hsdmmc-bus4@“hhhhMDsdmmc-2030“bMlsdiosdio-clk“`MLsdio-cmd“aMKsdio-pwren“`sdio-wrpt“`sdio-intn“`sdio-bus1“asdio-bus4@“aaaaMJspdif_inspdif-in“bspdif_outspdif-out“bM>spi0spi0-clk“hM spi0-csn0“hM!spi0-miso“hM"spi0-mosi“hM#spi1spi1-clk“ hM$spi1-csn0“ hM%spi1-miso“ hM&spi1-mosi“ hM'spi1-m1spi1m1-miso“hspi1m1-mosi“hspi1m1-clk“hspi1m1-csn0“ hspi2spi2-clk“hM)spi2-csn0“hM*spi2-miso“hM+spi2-mosi“hM,tsadctsadc-otp-pin“ btsadc-otp-out“ buart0uart0-xfer “iiMuart0-cts“buart0-rts“buart0-rts-pin“buart1uart1-xfer “iiMuart1-cts“bMuart1-rts“bMuart2-m0uart2m0-xfer “iiMuart2-m1uart2m1-xfer “iiuart3uart3-xfer “ i iMuart3-m1uart3m1-xfer “iiuart4uart4-xfer “ iiMuart4-cts“bMuart4-rts“bMuart4-rts-pin“bbluetoothbt-reg-on“ bMbt-wake-host“ fMhost-wake-bt“ bMledspwr-led“bMjwifiwifi-reg-on“bMnwifi-wake-host“fMOchosen¡serial0:1500000n8leds gpio-ledsUdefaultcjled-green­³on Áheartbeat ¢N Êheartbeatregulator-1v04-vdd-logregulator-fixedàvdd_logïÞ€-Þ€Ekregulator-1v5-vcc-ddrregulator-fixedàvcc_ddrïã`-ã`Ekregulator-1v8-vccregulator-fixedàvcc_1v8ïw@-w@E M regulator-3v3-vcc-ioregulator-fixedàvcc_ioï2Z -2Z EkM regulator-3v3-vcc-sdregulator-fixed ¢Udefaultclàvcc_sdï2Z -2Z E MEregulator-5v0-vcc-sysregulator-fixed àvcc5v0_sysïLK@-LK@Mkregulator-vdd-corepwm-regulatorPmˆUk àvdd_coreï žx-r``úMsdio-pwrseqmmc-pwrseq-simpleUdefaultcn ¯NMM compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3serial0serial1serial2serial3serial4spi0spi1spi2ethernet0mmc0mmc1mmc2device_typeregenable-methodclocks#cooling-cellsdynamic-power-coefficientoperating-points-v2cpu-idle-statesnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsstatusvccio0-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyoffsetmode-bootloadermode-loadermode-normalmode-recoverymode-fastbootassigned-clocksassigned-clock-parentsclock-namesinterrupt-names#phy-cellspinctrl-namespinctrl-0reg-shiftreg-io-widthuart-has-rtsctsdevice-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplydmasdma-names#pwm-cells#io-channel-cellsresetsreset-namesvref-supplyarm,pl330-periph-burst#dma-cellsrockchip,grfdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesbus-widthfifo-depthmax-frequencycap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplyno-sdno-sdionon-removablecap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-mmcvqmmc-supplyassigned-clock-ratesphy-modeclock_in_outphy-handlephy-supplyreset-assert-usreset-deassert-usreset-gpios#reset-cells#sound-dai-cells#interrupt-cellsinterrupt-controllerrangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathcolordefault-statefunctionlinux,default-triggerregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplypwmspwm-supplyregulator-settling-time-up-us