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compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3serial0serial1serial2serial3serial4serial5spi0spi1mmc0mmc1rtc0rtc1ethernet0mmc2device_typeregenable-methodclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityportsstatusclock-frequencyclock-output-names#clock-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontribution#power-domain-cellspm_qospmuio1-supplypmuio2-supplyoffsetmode-bootloadermode-fastbootmode-loadermode-normalmode-recoveryclock-namesdmasdma-namesreg-shiftreg-io-widthpinctrl-namespinctrl-0rockchip,grfresetsreset-names#sound-dai-cellsrockchip,trcm-sync-tx-only#interrupt-cellsinterrupt-controllervccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio-oscgpi-supplyphysphy-namesrockchip,outputremote-endpointrts-gpiosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc9-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspendVDDA-supplyVDDIO-supplyVDDD-supplypagesizevcc-supplynum-cs#pwm-cellsarm,pl330-periph-burst#dma-cellsassigned-clocksassigned-clock-ratesrockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#io-channel-cellsvref-supplybits#reset-cellsassigned-clock-parents#phy-cellsinterrupt-namespower-domainsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usphy-supplyclock_in_outbus-widthfifo-depthmax-frequencyvqmmc-supplysd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50cap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpvmmc-supplymmc-hs200-1_8vmmc-pwrseqnon-removableiommus#iommu-cellsrockchip,disable-mmu-resetrockchip,pmurangesgpio-controller#gpio-cellsoutput-highline-namegpio-hoginputbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-lowinput-enablerockchip,pinsreset-gpiosfunctionlinux,default-triggercolorstdout-pathlabellinux,codelinux,input-typesimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssimple-audio-card,frame-mastersimple-audio-card,bitclock-mastersound-daisystem-clock-fixedvin-supply