Ð þíT¸8H@( xH.radxa,nio-12lmediatek,mt8395mediatek,mt8195 +7Radxa NIO 12L =embeddedaliasesJ/soc/dp-intf@1c015000S/soc/dp-intf@1c113000\/soc/mailbox@10320000a/soc/mailbox@10330000f/soc/hdr-engine@1c114000m/soc/mutex@1c016000t/soc/mutex@1c101000{/soc/vpp-merge@1c10c000‚/soc/vpp-merge@1c10d000‰/soc/vpp-merge@1c10e000�/soc/vpp-merge@1c10f000—/soc/vpp-merge@1c110000ž/soc/dma-controller@1c104000©/soc/dma-controller@1c105000´/soc/dma-controller@1c106000¿/soc/dma-controller@1c107000Ê/soc/dma-controller@1c108000Õ/soc/dma-controller@1c109000à/soc/dma-controller@1c10a000ë/soc/dma-controller@1c10b000ö/soc/i2c@11e02000û/soc/i2c@11e03000/soc/i2c@11e04000/soc/i2c@11e00000 /soc/i2c@11e01000/soc/ethernet@11021000/soc/serial@11001100!/soc/serial@11001200)/soc/spi@11010000./soc/spi@11012000cpus+cpu@03cpuarm,cortex-a55?CpsciQeec3@u4ˆ˜€¥@·€Ä€Ñ@ã€ð cpu@1003cpuarm,cortex-a55?CpsciQeec3@u4ˆ˜€¥@·€Ä€Ñ@ã€ð cpu@2003cpuarm,cortex-a55?CpsciQeec3@u4ˆ˜€¥@·€Ä€Ñ@ã€ð cpu@3003cpuarm,cortex-a55?CpsciQeec3@u4ˆ˜€¥@·€Ä€Ñ@ã€ðcpu@4003cpuarm,cortex-a78?CpsciQe�fÔÀuˆ˜¥@·ÄÑ@ãð  cpu@5003cpuarm,cortex-a78?CpsciQe�fÔÀuˆ˜¥@·ÄÑ@ãð  cpu@6003cpuarm,cortex-a78?CpsciQe�fÔÀuˆ˜¥@·ÄÑ@ãð  cpu@7003cpuarm,cortex-a78?CpsciQe�fÔÀuˆ˜¥@·ÄÑ@ãð  cpu-mapcluster0core0# core1# core2# core3#core4#core5#core6#core7#idle-states'pscicpu-retention-larm,idle-state4K\2m_}Dcpu-retention-barm,idle-state4K\-mŒ}äcpu-off-larm,idle-state4K\7m›}Hcpu-off-barm,idle-state4K\2mÈ}èl2-cache0cacheŽš§@¹ðšl2-cache1cacheŽš§@¹ðš l3-cachecacheŽš §@¹šdsu-pmu arm,dsu-pmu¨ ³ ¸faildmic-codec dmic-codec¿Ì2mt8195-soundÜ ¸disabledfixed-factor-clock-13mfixed-factor-clockîû clk13m,oscillator-26m fixed-clockîeŒº€clk26moscillator-32k fixed-clockîe€clk32kperformance-controller@11bc10mediatek,cpufreq-hw ?¼ ½0 *opp-table-gpuoperating-points-v2Duopp-390000000O>í€V ‰hopp-410000000Op€V ¡Òopp-431000000O°‰ÀV ¡Òopp-473000000O1h@V º<opp-515000000O²FÀV º<opp-556000000O!#ãV Ò¦opp-598000000O#¤Á€V ëopp-640000000O&% V ëopp-670000000O'ïc€V äopp-700000000O)¹'V L¸opp-730000000O+‚ê€V }Œopp-760000000O-L®V ®`opp-790000000O/q€V ß4opp-820000000O0à5V opp-850000000O2©ø€V @Üopp-880000000O4s¼V q°pmu-a55arm,cortex-a55-pmu ¨pmu-a78arm,cortex-a78-pmu ¨psci arm,psci-1.0Jsmctimerarm,armv8-timer @¨   soc+ simple-busdkinterrupt-controller@c000000 arm,gic-v3v‡ ž ?   ¨ ppi-partitionsinterrupt-partition-0³ interrupt-partition-1³syscon@10000000 mediatek,mt8195-topckgensyscon?îsyscon@10001000#mediatek,mt8195-infracfg_aosyscon?î¼syscon@10003000mediatek,mt8195-pericfgsyscon?0îBpinctrl@10005000mediatek,mt8195-pinctrl€?PÑÓÔâëô°BÉiocfg0iocfg_bmiocfg_bliocfg_briocfg_lmiocfg_rbiocfg_tleintÓãï�ž¨ëvûeth-default-pins>pins-ccUVWX&pins-mdioYZ5pins-power[\Bpins-rst]pins-rxdQRSTpins-txdMNOP&eth-sleep-pins?pins-ccUVWXpins-mdioYZN[pins-rxdQRSTpins-txdMNOPi2c2-pinscpins-bus  iè&vèi2c4-pinsfpins-busièvèi2c6-pins\pinsNmmc0-default-pinsGpins-clkzŽf&pins-cmd-dat$~}|{wvutyie&5pins-rstxie&mmc0-uhs-pinsHpins-clkzŽf&pins-cmd-dat$~}|{wvutyie&5pins-dsŽf&pins-rstxie&mmc1-default-pinsKpins-clkoŽf&pins-cmd-datnpqrsie&5mmc1-detect-pinsLpins-insert�imt6360-pins]pins-irqde5ipcie0-default-pinsWpins-bus ipcie1-default-pinsZpins-bus Nspi1-default-pins8pins-busˆ‰Š‹Nspi2-default-pins9pins-busŒ�Ž�Nuart0-pins3pins-busbcuart1-pins4pins-busfgusb3p0-default-pinsCpins-vbus?5usb2p0-default-pinsRpins-iddig‚5ipins-vbusƒ�wifi-vreg-pins´pins-wifi-pmu-enABpins-wifi-vreg-enCsyscon@10006000)mediatek,mt8195-scpsyssysconsimple-mfd?`power-controller!mediatek,mt8195-power-controller+¨/power-domain@8?+¨¼power-domain@9? ûÊmfgaltÖ+¨¼power-domain@10? ¨power-domain@11? ¨power-domain@12? ¨power-domain@13? ¨power-domain@14?¨power-domain@15?Øû @AKà   Êvppsysvppsys1vppsys2vppsys3vppsys4vppsys5vppsys6vppsys7vppsys0-0vppsys0-1vppsys0-2vppsys0-3vppsys0-4vppsys0-5vppsys0-6vppsys0-7vppsys0-8vppsys0-9vppsys0-10vppsys0-11vppsys0-12vppsys0-13vppsys0-14vppsys0-15vppsys0-16vppsys0-17vppsys0-18Ö+¨power-domain@16?8ûâ$%&'()DÊvdosys0vdosys0-0vdosys0-1vdosys0-2vdosys0-3vdosys0-4vdosys0-5Ö+¨power-domain@17?ûá  Êvppsys1vppsys1-0vppsys1-1Ö¨power-domain@22? û!!!!$Êwepsys-0wepsys-1wepsys-2wepsys-3Ö¨power-domain@23?û"Êvdec0-0Ö+¨power-domain@24?û#Êvdec1-0Ö¨power-domain@25?û$Êvdec2-0Ö¨power-domain@26?û% Êvenc0-larbÖ+¨power-domain@27?û& Êvenc1-larbÖ¨power-domain@18? ûã'''&Êvdosys1vdosys1-0vdosys1-1vdosys1-2Ö+¨power-domain@19?Ö¨power-domain@20?Ö¨power-domain@21?ûQÊhdmi_tx¨power-domain@28?û((  Êimg-0img-1Ö+¨power-domain@29?¨power-domain@30?û()Êipeipe-0ipe-1Ö¨power-domain@31?(û*****Êcam-0cam-1cam-2cam-3cam-4Ö+¨power-domain@32? ¨power-domain@33?!¨power-domain@34?"¨power-domain@0?Ö¨power-domain@1?Ö¨power-domain@2?¨power-domain@3?¨power-domain@4?û57Êcsi_rx_topcsi_rx_top1¨power-domain@5?û+ Êether¨power-domain@6?ûXn Êadspadsp1+Ö¨power-domain@7? ûg"n2Êaudioaudio1audio2audio3Ö¨watchdog@10007000mediatek,mt8195-wdtè?p¼2syscon@1000c000"mediatek,mt8195-apmixedsyssyscon?Àîtimer@10017000,mediatek,mt8195-timermediatek,mt6765-timer?p¨ û,pwrap@10024000mediatek,mt8195-pwrapsyscon?@Épwrap¨óû Êspiwrap$Ëpmicmediatek,mt6359žv 'Þadcmediatek,mt6359-auxadc;mt6359codecregulatorsmediatek,mt6359-regulatorbuck_vs1Mvs1\ 5t!‘ÀŒ¨buck_vgpu11Mvgpu11\€t7¼ˆŒÈ Ѩbuck_vmodemMvmodem\€tÈà¼*ŒÈbuck_vpuMvpu\€t7¼ˆŒÈ Ѩbuck_vcoreMvcore\€tÖ ¼ˆŒÈ Ѩbuck_vs2Mvs2\ 5tjŒ¨buck_vpaMvpa\¡ t7±ÐŒ,buck_vproc2Mvproc2\€t7¼LŒÈ Ѩbuck_vproc1Mvproc1\€t7¼LŒÈ Ѩbuck_vcore_sshub Mvcore_sshub\€t7buck_vgpu11_sshub Mvgpu11_sshub\€t7ldo_vaud18Mvaud18\w@tw@Œð¨ldo_vsim1Mvsim1\ð t/M`ldo_vibrMvibr\O€t2Z dldo_vrf12Mvrf12\ÈàtÖ ¨ldo_vusbMvusb\-ÆÀt-ÆÀŒÀ¨Dldo_vsram_proc2 Mvsram_proc2\¡ t½¶¼LŒð¨ldo_vio18Mvio18\ð týàŒÀ¨ldo_vcamioMvcamio\ð týà¨ldo_vcn18Mvcn18\w@tw@Œðldo_vfe28Mvfe28\*¹€t*¹€Œxldo_vcn13Mvcn13\ » tÖ ldo_vcn33_1_bt Mvcn33_1_bt\*¹€t5gàldo_vcn33_1_wifi Mvcn33_1_wifi\*¹€t5gàldo_vaux18Mvaux18\w@tw@Œð¨ldo_vsram_others Mvsram_others\ q°t q°¼ˆŒðldo_vefuseMvefuse\ð t„€ldo_vxo22Mvxo22\w@t!‘À¨ldo_vrfckMvrfck\ã`tð ldo_vrfck_1Mvrfck\ëÀtjldo_vbif28Mvbif28\*¹€t*¹€Œðldo_vio28Mvio28\*¹€t2Z ¨ldo_vemcMvemc\,@ t2Z ldo_vemc_1Mvemc\&% t2Z Ildo_vcn33_2_bt Mvcn33_2_bt\2Z t2Z ldo_vcn33_2_wifi Mvcn33_2_wifi\*¹€t5gàldo_va12Mva12\O€tÖ ¨ldo_va09Mva09\ 5tO€ldo_vrf18Mvrf18\ð tžPldo_vsram_md Mvsram_md\¡ t½¶¼*Œð¨ldo_vufsMvufs\ð týàJldo_vm18Mvm18\ð týà¨ldo_vbbckMvbbck\ÈàtO€¨ldo_vsram_proc1 Mvsram_proc1\¡ t½¶¼LŒð¨ldo_vsim2Mvsim2\ð t/M`ldo_vsram_others_sshubMvsram_others_sshub\¡ t½¶rtcmediatek,mt6358-rtcspmi@10027000mediatek,mt8195-spmi ?p� ÉpmifspmimstûE(Êpmif_sys_ckpmif_tmr_ckspmimst_clk_mux$Ë+pmic@6mediatek,mt6315-regulator?regulatorsvbuck1MVbcpu\“àt7Œ Ѩ pmic@7mediatek,mt6315-regulator?regulatorsvbuck1MVgpu\“àt7Œ Ñinfra-iommu@10315000mediatek,mt8195-iommu-infra?1PPP¨éTmailbox@10320000mediatek,mt8195-gce?2@¨âöû˜mailbox@10330000mediatek,mt8195-gce?3@¨äöûvscp@10500000mediatek,mt8195-scp0?Prp€Ésramcfgl1tcm¨Î¸okay-wclock-controller@10720000mediatek,mt8195-scp_adsp?rî.dsp@10803000mediatek,mt8195-dsp ?€0„ Écfgsram,ûXnŠ.#KÊadsp_selclk26m_ckaudio_local_busmainpll_d7_d2scp_adsp_audiodspaudio_h/rxtx)01 ¸disabledmailbox@10816000mediatek,mt8195-adsp-mboxö?�`¨¾0mailbox@10817000mediatek,mt8195-adsp-mboxö?�p¨¿1mt8195-afe-pcm@10890000mediatek,mt8195-audio?‰0/¨6B2 Iaudiosys”ûÚÛÜÝßg"#neabcd2.óÊclk26mapll1_ckapll2_ckapll12_div0apll12_div1apll12_div2apll12_div3apll12_div9a1sys_hp_selaud_intbus_selaudio_h_selaudio_local_bus_seldptx_m_seli2so1_m_seli2so2_m_seli2si1_m_seli2si2_m_selinfra_ao_audio_26m_bscp_adsp_audiodsp ¸disabledserial@11001100*mediatek,mt8195-uartmediatek,mt6577-uart?¨� û Êbaudbus¸okayU3_defaultserial@11001200*mediatek,mt8195-uartmediatek,mt6577-uart?¨Ž û Êbaudbus¸okayU4_defaultserial@11001300*mediatek,mt8195-uartmediatek,mt6577-uart?¨� û Êbaudbus ¸disabledserial@11001400*mediatek,mt8195-uartmediatek,mt6577-uart?¨Ó û Êbaudbus ¸disabledserial@11001500*mediatek,mt8195-uartmediatek,mt6577-uart?¨Ô û Êbaudbus ¸disabledserial@11001600*mediatek,mt8195-uartmediatek,mt6577-uart?¨Õ û Êbaudbus ¸disabledauxadc@11002000.mediatek,mt8195-auxadcmediatek,mt8173-auxadc? ûÊmain; ¸disabledsyscon@11003000"mediatek,mt8195-pericfg_aosyscon?0î+spi@1100a000(mediatek,mt8195-spimediatek,mt6765-spi+? ¨¿û™Êparent-clksel-clkspi-clk ¸disabledthermal-sensor@1100b000mediatek,mt8195-lvts-ap?° ¨©ûBm56$ylvts-calib-data-1lvts-calib-data-2гsvs@1100bc00mediatek,mt8195-svs?¼¨ÇûÊmainm75(ysvs-calibration-datat-calibration-dataBIsvs_rstpwm@1100e0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm?à¨Ë/ û*0Êmainmm ¸disabledpwm@1100f0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm?ð¨ û+NÊmainmm ¸disabledspi@11010000(mediatek,mt8195-spimediatek,mt6765-spi+?¨Àû™3Êparent-clksel-clkspi-clk¸okayU8_default«spi@11012000(mediatek,mt8195-spimediatek,mt6765-spi+? ¨Áû™4Êparent-clksel-clkspi-clk¸okayU9_default«spi@11013000(mediatek,mt8195-spimediatek,mt6765-spi+?0¨Âû™5Êparent-clksel-clkspi-clk ¸disabledspi@11018000(mediatek,mt8195-spimediatek,mt6765-spi+?€¨Ãû™<Êparent-clksel-clkspi-clk ¸disabledspi@11019000(mediatek,mt8195-spimediatek,mt6765-spi+?�¨Äû™=Êparent-clksel-clkspi-clk ¸disabledspi@1101d000mediatek,mt8195-spi-slave?ШÅûRÊspi˜ ¸disabledspi@1101e000mediatek,mt8195-spi-slave?à¨ÆûSÊspi˜ ¸disabledethernet@11021000&mediatek,mt8195-gmacsnps,dwmac-5.10a?@¨Ì¿macirq.Êaxiapbmac_mainptp_refrmii_internalmac_cg0û++RST+ RSTÂÃÄ/Ïà:ð;<!,¸okay 9rgmii-rxidB=_defaultsleepU>M?Wîl }] �N † mdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916?=stmmac-axi-config¢²Â:rx-queues-configÌâ;queue0óqueue1óqueue2óqueue3ótx-queues-config4<queue0FóRqueue1FóRqueue2FóRqueue3FóRusb@11201000#mediatek,mt8195-mtu3mediatek,mtu3 ? -ÿ > Émacippcd ?+¨€û/íBÊsys_ckref_ckmcu_ck`@Ae sBg¸okay_defaultUCŠhost£³Dusb@0'mediatek,mt8195-xhcimediatek,mtk-xhci?Émac¨�,-––$û/íB$Êsys_ckref_ckmcu_ckdma_ckxhci_ck¸okayÁEportendpointÍF`mmc@11230000(mediatek,mt8195-mmcmediatek,mt8183-mmc ?#õ¨ƒûÊsourcehclksource_cg¸okay_defaultstate_uhsUGMHÝç ëÂõL   ' 6 E M S aI mJmmc@11240000(mediatek,mt8195-mmcmediatek,mt8183-mmc ?$Ǩ‡û$Êsourcehclksource_cg¿¸okay_defaultstate_uhsUKLMKÝç ë z ‹� ” E › ¨ aM mNmmc@11250000(mediatek,mt8195-mmcmediatek,mt8183-mmc ?%樈û IÊsourcehclksource_cg ¿ ¸disabledthermal-sensor@11278000mediatek,mt8195-lvts-mcu?'€¨ªûBm56$ylvts-calib-data-1lvts-calib-data-2Šªusb@11290000'mediatek,mt8195-xhcimediatek,mtk-xhci ?))> Émacippc¨`O./––$û+ï+$Êsys_ckref_ckmcu_ckdma_ckxhci_ck sBhe¸okay ¶³DÁP Çusb@112a1000#mediatek,mt8195-mtu3mediatek,mtu3 ?*-ÿ*> Émacippcd*?+¨0–û+ñ+Êsys_ckref_ckmcu_ck`Qe sBi¸okay_defaultUR³Dusb@0'mediatek,mt8195-xhcimediatek,mtk-xhci?Émac¨1–û+Êsys_ck¸okayÁPusb@112b1000#mediatek,mt8195-mtu3mediatek,mtu3 ?+-ÿ+> Émacippcd+?+¨2–û+ó+ Êsys_ckref_ckmcu_ck`Se sBj ¸disabledusb@0'mediatek,mt8195-xhcimediatek,mtk-xhci?Émac¨3–û+ Êsys_ck ¸disabledpcie@112f0000*mediatek,mt8195-pciemediatek,mt8192-pcie3pci+?/@ Épcie-mac¨ Üÿ8d� ‚ à æT ð0ûV#&+K+/Êpl_250mtl_26mtl_96mtl_32kperi_26mperi_memG`U ÿpcie-phy/BImacv ` VVVV¸okay_defaultUWinterrupt-controlleržvVpcie@112f8000*mediatek,mt8195-pciemediatek,mt8192-pcie3pci+?/€@ Épcie-mac¨ Üÿ8d�$$ ‚$ $ à æT ð(ûWXQ+/Êpl_250mtl_26mtl_96mtl_32kperi_26mperi_memH`X ÿpcie-phy/v ` YYYY¸okay_defaultUZinterrupt-controlleržvYspi@1132c000(mediatek,mt8195-normediatek,mt8173-nor?2À¨9ûo++ Êspisfaxi+ ¸disabledefuse@11c10000%mediatek,mt8195-efusemediatek,efuse?Á+usb3-tx-imp@184,1?„ *lusb3-rx-imp@184,2?„ *kusb3-intr@185?… *jusb3-tx-imp@186,1?† *iusb3-rx-imp@186,2?† *husb3-intr@187?‡ *gusb2-intr-p0@188,1?ˆ *usb2-intr-p1@188,2?ˆ *usb2-intr-p2@189,1?‰ *usb2-intr-p3@189,2?‰ *pciephy-rx-ln1@190,1?� *spciephy-tx-ln1-nmos@190,2?� *rpciephy-tx-ln1-pmos@191,1?‘ *qpciephy-rx-ln0@191,2?‘ *ppciephy-tx-ln0-nmos@192,1?’ *opciephy-tx-ln0-pmos@192,2?’ *npciephy-glb-intr@193?“ *mdp-data@1ac?¬©lvts1-calib@1bc?¼5lvts2-calib@1d0?Ð86svs-calib@580?€d7socinfo-data1@7a0? t-phy@11c40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+dĸokayusb-phy@0?ûòÊref /Qt-phy@11c50000.mediatek,mt8195-tphymediatek,generic-tphy-v3+dÅ ¸disabledusb-phy@0?ûôÊref /Sdsi-phy@11c800000mediatek,mt8195-mipi-txmediatek,mt8183-mipi-tx?Èû mipi_tx0_pllî / ¸disabled™dsi-phy@11c900000mediatek,mt8195-mipi-txmediatek,mt8183-mipi-tx?Éû mipi_tx1_pllî / ¸disabledši2c@11d00000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?Ð"€€¨šû[; Êmaindma+ ¸disabledi2c@11d01000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?Ð"€¨›û[; Êmaindma+¸okaye€U\_defaultpmic@34mediatek,mt6360?4 'e¿IRQBžvU]chargermediatek,mt6360-chg :Ý@ usb-otg-vbus-regulator Musb-otg-vbus\C…(tXáèEregulatormediatek,mt6360-regulator S^ c_buck1 Memi_vdd2\“àtÖ  Ѩbuck2 Memi_vddq\“àtÖ  Ѩ_ldo1 Mext_lcd_3v3\2Z t2Z Ñ¨ldo2 Mpanel1_p1v8\w@tw@Ñldo3Mvmc_pmu\O€t6î€ÑNldo5 Mvmch_pmu\2Z t2Z Ñ¨Mldo6 Mmt6360_ldo6\¡ t Ñldo7 Memi_vmddr_en\¡ t Ѩtypecmediatek,mt6360-tcpc 'd¿PD_IRQBconnectorusb-c-connector sUSB-C ydual ƒ˜–€ •dual  sink ¯"�d »"‘,ports+port@0?endpointÍ`Fport@2?endpointÍaei2c@11d02000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?Ð "€€¨œû[; Êmaindma+ ¸disabledclock-controller@11d03000mediatek,mt8195-imp_iic_wrap_s?Ð0î[i2c@11e00000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?à"€€¨�ûb; Êmaindma+ ¸disabledi2c@11e01000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?à"€¨“ûb; Êmaindma+ ¸disabledi2c@11e02000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?à "€€¨–ûb; Êmaindma+¸okaye€Uc_defaulttypec-mux@48 ite,it5205?H Å Ñ ädportendpointÍeai2c@11e03000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?à0"€€¨˜ûb; Êmaindma+ ¸disabledi2c@11e04000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?à@"€¨™ûb; Êmaindma+¸okaye€Uf_defaultclock-controller@11e05000mediatek,mt8195-imp_iic_wrap_w?àPîbt-phy@11e30000.mediatek,mt8195-tphymediatek,generic-tphy-v3+dã/¸okayusb-phy@0? ûð Êrefda_ref /Ousb-phy@700?ûð Êrefda_ref mghiyintrrx_imptx_imp /Xt-phy@11e40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+dä¸okayusb-phy@0? ûî Êrefda_ref /@usb-phy@700?ûî Êrefda_ref mjklyintrrx_imptx_imp /Aphy@11e80000mediatek,mt8195-pcie-phy?èÉsifmmnopqrsGyglb_intrtx_ln0_pmostx_ln0_nmosrx_ln0tx_ln1_pmostx_ln1_nmosrx_ln1/ /¸okayUufs-phy@11fa0000.mediatek,mt8195-ufsphymediatek,mt8183-ufsphy?úÀû Êunipromp / ¸disabledgpu@13000000>mediatek,mt8195-malimediatek,mt8192-maliarm,mali-valhall-jm?@ût0¨�Œ‹ ¿jobmmugpu ïu(/ / / / / core0core1core2core3core4¸okay clock-controller@13fbf000mediatek,mt8195-mfgcfg?ûðîtsyscon@14000000mediatek,mt8195-vppsys0syscon?î "vdma-controller@14001000mediatek,mt8195-mdp3-rdma? "v :  Nw/ [x€û<)v v vvv bdisplay@14002000mediatek,mt8195-mdp3-fg?  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bdma-controller@1c10b000mediatek,mt8195-vdo1-rdma?°¨öû'/ [xc "˜° bvpp-merge@1c10c000mediatek,mt8195-disp-merge?À¨÷û' 'Êmergemerge_async/ "˜À šB'vpp-merge@1c10d000mediatek,mt8195-disp-merge?Шøû' 'Êmergemerge_async/ "˜Ð šB'vpp-merge@1c10e000mediatek,mt8195-disp-merge?à¨ùû' 'Êmergemerge_async/ "˜à šB'vpp-merge@1c10f000mediatek,mt8195-disp-merge?ð¨úû' 'Êmergemerge_async/ "˜ð šB'vpp-merge@1c110000mediatek,mt8195-disp-merge?¨ûû' 'Êmergemerge_async/ "˜ ®B'dp-intf@1c113000mediatek,mt8195-dp-intf?0¨/û'/'Êpixelenginepll ¸disabledhdr-engine@1c114000mediatek,mt8195-disp-ethdrp?@Pp� °À4Émixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsp "˜@˜P˜p˜�˜ ˜°˜Àhû'%' '#'!'$'"'1'&'''(')'*ƒÊmixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsvdo_fe0_asyncvdo_fe1_asyncgfx_fe0_asyncgfx_fe1_asyncvdo_be_asyncethdr_top/ [xdxe¨(B'3'4'5'6'7EIvdo_fe0_asyncvdo_fe1_asyncgfx_fe0_asyncgfx_fe1_asyncvdo_be_asyncedp-tx@1c500000mediatek,mt8195-edp-tx?P€m©ydp_calibration_data/¨¤ Ť ¸disableddp-tx@1c600000mediatek,mt8195-dp-tx?`€m©ydp_calibration_data/¨Ê Ť ¸disabledthermal-zonescpu0-thermal Öè äú úªtripstrip-alert L ÐEpassive«trip-crit †  Ð Ecriticalcooling-mapsmap0 !«0 & ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu1-thermal Öè äú úªtripstrip-alert L ÐEpassive¬trip-crit †  Ð Ecriticalcooling-mapsmap0 !¬0 & ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu2-thermal Öè äú úªtripstrip-alert L ÐEpassive­trip-crit †  Ð Ecriticalcooling-mapsmap0 !­0 & ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu3-thermal Öè äú úªtripstrip-alert L ÐEpassive®trip-crit †  Ð Ecriticalcooling-mapsmap0 !®0 & ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu4-thermal Öè äú úªtripstrip-alert L ÐEpassive¯trip-crit †  Ð Ecriticalcooling-mapsmap0 !¯0 &ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu5-thermal Öè äú úªtripstrip-alert L ÐEpassive°trip-crit †  Ð Ecriticalcooling-mapsmap0 !°0 &ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu6-thermal Öè äú úªtripstrip-alert L ÐEpassive±trip-crit †  Ð Ecriticalcooling-mapsmap0 !±0 &ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu7-thermal Öè äú úªtripstrip-alert L ÐEpassive²trip-crit †  Ð Ecriticalcooling-mapsmap0 !²0 &ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿvpu0-thermal Öè äú ú³tripstrip-alert L ÐEpassivetrip-crit †  Ð Ecriticalvpu1-thermal Öè äú ú³ tripstrip-alert L ÐEpassivetrip-crit †  Ð Ecriticalgpu-thermal Öè äú ú³ tripstrip-alert L ÐEpassivetrip-crit †  Ð Ecriticalgpu1-thermal Öè äú ú³ tripstrip-alert L ÐEpassivetrip-crit †  Ð Ecriticalvdec-thermal Öè äú ú³ tripstrip-alert L ÐEpassivetrip-crit †  Ð Ecriticalimg-thermal Öè äú ú³ tripstrip-alert L ÐEpassivetrip-crit †  Ð Ecriticalinfra-thermal Öè äú ú³tripstrip-alert L ÐEpassivetrip-crit †  Ð Ecriticalcam0-thermal Öè äú ú³tripstrip-alert L ÐEpassivetrip-crit †  Ð Ecriticalcam1-thermal Öè äú ú³tripstrip-alert L ÐEpassivetrip-crit †  Ð Ecriticalchosen 5serial0:921600n8firmwareopteelinaro,optee-tzJsmcmemory@400000003memory?@regulator-wifi-3v3-enregulator-fixed Mwifi_3v3_en¨\2Z t2Z  A ˆC_defaultU´ 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compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typedp-intf0dp-intf1gce0gce1ethdr0mutex0mutex1merge1merge2merge3merge4merge5vdo1-rdma0vdo1-rdma1vdo1-rdma2vdo1-rdma3vdo1-rdma4vdo1-rdma5vdo1-rdma6vdo1-rdma7i2c0i2c1i2c2i2c3i2c4ethernet0serial0serial1spi0spi1device_typeregenable-methodperformance-domainsclock-frequencycapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellscpu-supplyphandlecpuentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedinterruptscpusstatusnum-channelswakeup-delay-msmediatek,platform#clock-cellsclocksclock-divclock-multclock-output-names#performance-domain-cellsopp-sharedopp-hzopp-microvoltrangesdma-ranges#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangesmediatek,rsel-resistance-in-si-unitpinmuxdrive-strengthinput-enableoutput-highbias-disableinput-disablebias-pull-updrive-strength-microampbias-pull-downoutput-low#power-domain-cellsdomain-supplyclock-namesmediatek,infracfgmediatek,disable-extrstassigned-clocksassigned-clock-parentsinterrupts-extended#io-channel-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-always-onregulator-ramp-delayregulator-allowed-modes#iommu-cells#mbox-cellsmemory-regionpower-domainsmbox-namesmboxesmediatek,topckgenresetsreset-namespinctrl-0pinctrl-namesnvmem-cellsnvmem-cell-names#thermal-sensor-cells#pwm-cellsmediatek,pad-selectinterrupt-namesmediatek,pericfgsnps,axi-configsnps,mtl-rx-configsnps,mtl-tx-configsnps,txpblsnps,rxpblsnps,clk-csrphy-modephy-handlepinctrl-1mediatek,tx-delay-psmediatek,mac-wolsnps,reset-gpiosnps,reset-delays-ussnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blensnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,tx-queues-to-usesnps,tx-sched-wrrsnps,weightsnps,priorityphyswakeup-sourcemediatek,syscon-wakeuprole-switch-default-modeusb-role-switchvusb33-supplyvbus-supplyremote-endpointbus-widthmax-frequencyhs400-ds-delaycap-mmc-highspeedcap-mmc-hw-resetmmc-hs200-1_8vmmc-hs400-1_8vno-sdiono-sdnon-removablevmmc-supplyvqmmc-supplycap-sd-highspeedcd-gpiosno-mmcsd-uhs-sdr50sd-uhs-sdr104usb2-lpm-disablemediatek,u3p-dis-mskbus-rangeiommu-mapiommu-map-maskphy-namesinterrupt-map-maskinterrupt-mapbits#phy-cellsrichtek,vinovp-microvoltLDO_VIN1-supplyLDO_VIN3-supplylabeldata-roleop-sink-microwattpower-roletry-power-rolesource-pdossink-pdosmode-switchorientation-switchvcc-supplyoperating-points-v2power-domain-namesmali-supplymediatek,gce-client-regmediatek,gce-eventsmediatek,scpiommus#dma-cellsmediatek,smimediatek,larb-idmediatek,larbsmediatek,merge-mutemediatek,merge-fifo-enmax-linkrate-mhzpolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicestdout-pathenable-active-highvin-supplyregulator-boot-onno-map