Ð þí:Õ85È( 5�3hisilicon,hi3798cv200-poplarhisilicon,hi3798cv200 +#7HiSilicon Poplar Development Boardpsci arm,psci-0.2=smccpus+cpu@0arm,cortex-a53DcpuPTpscib€o@�€Ž€›@­ºcpu@1arm,cortex-a53DcpuPTpscib€o@�€Ž€›@­ºcpu@2arm,cortex-a53DcpuPTpscib€o@�€Ž€›@­ºcpu@3arm,cortex-a53DcpuPTpscib€o@�€Ž€›@­ºl2-cachecacheËdq@ƒÙåinterrupt-controller@f1001000 arm,gic-400@Pññ ñ@ ñ`  í ø åtimerarm,armv8-timer0í   soc@f0000000 simple-bus+ðclock-reset-controller@8a22000,hisilicon,hi3798cv200-crgsysconsimple-mfdP¢ %2åreset-controllerti,syscon-reset28?Ì Ì Ì Ì å system-controller@8000000%hisilicon,hi3798cv200-sysctrlsysconP%2åperipheral-controller@8a200001hisilicon,hi3798cv200-perictrlsysconsimple-mfdP¢+ ¢usb2_phy@120hisilicon,hi3798cv200-usb2-phyP M( T¼+phy@0P[ T¼åphy@1P[ T¼ usb2_phy@124hisilicon,hi3798cv200-usb2-phyP$M) T¼+phy@0P[ T¼ phy@850hisilicon,hi3798cv200-combphyPP[M* Tˆf*võá‹phy@858hisilicon,hi3798cv200-combphyPX[M! Tˆ f!võá   åpinconf@8a21000pinconf-singleP¢€» Ù°ö  VW"%&).6@GHNOPFXå gpio-rangeåemmc-pins-1H1 $E b}–°ðåemmc-pins-21(E b}–�ðåemmc-pins-31,E b}–00å emmc-pins-410E b}–00å serial@8b00000arm,pl011arm,primecellP° í1M´uartclkapb_pclkÀokayserial@8b02000arm,pl011arm,primecellP°  í3M´uartclkapb_pclkÀokay ÇLS-UART0i2c@8b10000hisilicon,hix5hd2-i2cP±+ í&Í€MÀokayÇLS-I2C0i2c@8b11000hisilicon,hix5hd2-i2cP±+ í'Í€M Àdisabledi2c@8b12000hisilicon,hix5hd2-i2cP± + í(Í€MÀokayÇLS-I2C1i2c@8b13000hisilicon,hix5hd2-i2cP±0+ í)Í€M  Àdisabledi2c@8b14000hisilicon,hix5hd2-i2cP±@+ í*Í€M  Àdisabledspi@8b1a000arm,pl022arm,primecellP±  í-Ý äM  ´sspclkapb_pclk+ÀokayÇLS-SPI0mmc@9820000 snps,dw-mshcP ‚ í"M´biuciu TœíresetÀokayùmmc@9830000hisilicon,hi3798cv200-dw-mshcP ƒ í# M´ciubiuciu-sampleciu-drive T íresetÀokaydefault" ,Í ëÂ7IVeùgpio@8b20000arm,pl061arm,primecellP² ílsƒ ø� M ´apb_pclk Àdisabledgpio@8b21000arm,pl061arm,primecellP² ímsƒ øP�       M ´apb_pclkÀokay›GPIO-EGPIO-FGPIO-Jgpio@8b22000arm,pl061arm,primecellP²  ínsƒ ø �  M ´apb_pclkÀokay&›GPIO-HGPIO-IGPIO-LGPIO-GGPIO-Kgpio@8b23000arm,pl061arm,primecellP²0 íosƒ ø@�   V WM ´apb_pclkÀokay›GPIO-CGPIO-Bgpio@8b24000arm,pl061arm,primecellP²@ ípsƒ ø0�  " %M ´apb_pclkÀokay›GPIO-Dågpio@8004000arm,pl061arm,primecellP@ íqsƒ øM ´apb_pclkÀokay"›USER-LED-1USER-LED-2GPIO-Aågpio@8b26000arm,pl061arm,primecellP²` írsƒ ø � & )M ´apb_pclkÀokay›USER-LED-0ågpio@8b27000arm,pl061arm,primecellP²p íssƒ ø� .M ´apb_pclk Àdisabledågpio@8b28000arm,pl061arm,primecellP²€ ítsƒ ø� 6M ´apb_pclk Àdisabledgpio@8b29000arm,pl061arm,primecellP²� íusƒ ø� @ GM ´apb_pclk Àdisabledgpio@8b2a000arm,pl061arm,primecellP²  ívsƒ ø0� H N OM ´apb_pclkÀokay›USER-LED-3ågpio@8b2b000arm,pl061arm,primecellP²° íwsƒ ø � P FM ´apb_pclk Àdisabledgpio@8b2c000arm,pl061arm,primecellP²À íxsƒ ø� XM ´apb_pclk Àdisabledethernet@98400002hisilicon,hi3798cv200-gmachisilicon,hisi-gmac-v2P „ „0  íGM´mac_coremac_ifc TÌÌ ímac_coremac_ifcphy Àdisabledethernet@98410002hisilicon,hi3798cv200-gmachisilicon,hisi-gmac-v2P „ „0 íHM ´mac_coremac_ifc TÌ Ì ímac_coremac_ifcphyÀokay+« ¶rgmii ¿''u0phy@3På ir@8001000hisilicon,hix5hd2-irP í/MÀokayÝrc-hisi-poplarpcie@9860000hisilicon,hi3798cv200-pcieP † ïcontrolrc-dbiconfig+Dpciùÿ0�ð‚ð í€ msiø 0ƒ M´auxpipesysbus$TŒŒŒ ísoftsysbus>CphyÀokay MYusb@9880000 generic-ohciP ˆ íCM"%&´busclk12clk48 T¸ íbus>CusbÀokayusb@9890000 generic-ehciP ‰ íBM"#$ ´busphyutmi$T¸ ¸¸  íbusphyutmi>CusbÀokayaliasesf/soc@f0000000/serial@8b00000n/soc@f0000000/serial@8b02000chosenvserial0:115200n8memory@0DmemoryP€leds gpio-ledsuser-led0 Çgreen:user1 ç ‚heartbeat˜offuser-led1 Çgreen:user2 ç‚mmc0˜offuser-led2 Çgreen:user3 ç‚mmc1˜offuser-led3 Çgreen:user4 ç‚none¦˜offregulator-pcieregulator-fixed ¶3V3_PCIE0Å2Z Ý2Z  õúå compatibleinterrupt-parent#address-cells#size-cellsmodelmethoddevice_typeregenable-methodd-cache-sized-cache-line-sized-cache-setsi-cache-sizei-cache-line-sizei-cache-setsnext-level-cachecache-unifiedcache-levelphandleinterrupts#interrupt-cellsinterrupt-controllerranges#clock-cells#reset-cellsti,reset-bitsclocksresets#phy-cellsassigned-clocksassigned-clock-rateshisilicon,fixed-modehisilicon,mode-select-bitspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,gpio-range#pinctrl-single,gpio-range-cellspinctrl-single,pinspinctrl-single,bias-pulldownpinctrl-single,bias-pulluppinctrl-single,slew-ratepinctrl-single,drive-strengthclock-namesstatuslabelclock-frequencynum-cscs-gpiosreset-namesbus-widthcap-sd-highspeedpinctrl-namespinctrl-0fifo-depthcap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vnon-removablegpio-controller#gpio-cellsgpio-rangesgpio-line-namesphy-handlephy-modehisilicon,phy-reset-delays-uslinux,rc-map-namereg-namesbus-rangenum-lanesinterrupt-namesinterrupt-map-maskinterrupt-mapphysphy-namesreset-gpiosvpcie-supplyserial0serial2stdout-pathlinux,default-triggerdefault-statepanic-indicatorregulator-nameregulator-min-microvoltregulator-max-microvoltgpioenable-active-high