Ð þí³s8®Ì(§®”!google,gs101-oriolegoogle,gs101 &7Oriolealiases=/soc@0/pinctrl@174d0000F/soc@0/pinctrl@174e0000O/soc@0/pinctrl@17a80000X/soc@0/pinctrl@17940000a/soc@0/pinctrl@10840000j/soc@0/pinctrl@10c40000s/soc@0/pinctrl@11840000|/soc@0/pinctrl@14440000$…/soc@0/usi@10a000c0/serial@10a00000cpus cpu-mapcluster0core0�core1�core2�core3�cluster1core0�core1�cluster2core0�core1� cpu@0‘cpuarm,cortex-a55�¡psci¯ ¿úÒFìcpu@100‘cpuarm,cortex-a55�¡psci¯ ¿úÒFìcpu@200‘cpuarm,cortex-a55�¡psci¯ ¿úÒFìcpu@300‘cpuarm,cortex-a55�¡psci¯ ¿úÒFìcpu@400‘cpuarm,cortex-a76�¡psci¯ ¿lÒìcpu@500‘cpuarm,cortex-a76�¡psci¯ ¿lÒìcpu@600‘cpuarm,cortex-x1�¡psci¯ ¿ÒŠìcpu@700‘cpuarm,cortex-x1�¡psci¯ ¿ÒŠì idle-statesôpscicpu-ananke-sleepc2arm,idle-state(F9 IÐì cpu-enyo-sleepc2arm,idle-state(–9¾I Äì cpu-hera-sleepc2arm,idle-state(ë9ÜI ¬ì ectclock-1 fixed-clockZgoscclkzwìclock-2 fixed-clockZ gext-200mz ëÂpmu-0arm,cortex-a55-pmuŠ pmu-1arm,cortex-a76-pmuŠpmu-2arm,cortex-x1-pmuŠpmu-3 arm,dsu-pmu • Špsci arm,psci-1.0¨smcreserved-memory šgsa@90200000 �� @¡tpu-fw@93000000 �“¡aoc@94000000 �”¡abl@f8800000 �ø€¡dss-log-reserved@fd3f0000 �ý?à¡debug-kinfo-reserved@fd3fe000 �ý?à¡bldr-log-reserved@fd800000 �ý€¡bldr-log-hist-reserved@fd900000 �ý� ¡soc@0 simple-bus š@clock-controller@10010000google,gs101-cmu-misc�€Z¨~¯bussssìtimer@10050000(google,gs101-mctsamsung,exynos4210-mct� ¨ ¯fin_pllmctÀŠñòóôõö÷øùúûüwatchdog@10060000google,gs101-wdt� ¨H¯watchdogwatchdog_srcŠý»Òèokayïwatchdog@10070000google,gs101-wdt� ¨I¯watchdogwatchdog_srcŠþ»Ò èdisabledinterrupt-controller@10400000 arm,gic-v3û �@DŠ ìppi-partitionsinterrupt-partition-0!ì interrupt-partition-1!ìinterrupt-partition-2! ìclock-controller@10800000google,gs101-cmu-peric0�€@Z¨ƒ„¯oscclkbusipìsyscon@10820000"google,gs101-peric0-sysregsyscon�‚¨Oìpinctrl@10840000google,gs101-pinctrl�„¨¯pclkŠqgpp0-gpio-bank*: ûìVgpp1-gpio-bank*: ûgpp2-gpio-bank*: ûgpp3-gpio-bank*: ûgpp4-gpio-bank*: ûgpp5-gpio-bank*: ûgpp6-gpio-bank*: ûgpp7-gpio-bank*: ûgpp8-gpio-bank*: ûgpp9-gpio-bank*: ûgpp10-gpio-bank*: ûgpp11-gpio-bank*: ûgpp12-gpio-bank*: ûgpp13-gpio-bank*: ûgpp14-gpio-bank*: ûgpp15-gpio-bank*: ûgpp16-gpio-bank*: ûgpp17-gpio-bank*: ûgpp18-gpio-bank*: ûgpp19-gpio-bank*: ûuart0-bus-pinsFgpp1-2gpp1-3Shì.disp-te-pri-on-pinsFgpp0-3Sdisp-te-pri-off-pinsFgpp0-3Sdisp-te-sec-on-pinsFgpp0-4Sdisp-te-sec-off-pinsFgpp0-4Ssensor-mclk1-out-pinsFgpp3-0Shxsensor-mclk1-fn-pinsFgpp3-0Shxsensor-mclk2-out-pinsFgpp5-0Shxsensor-mclk2-fn-pinsFgpp5-0Shxsensor-mclk3-out-pinsFgpp7-0Shxsensor-mclk3-fn-pinsFgpp7-0Shxsensor-mclk4-out-pinsFgpp9-0Shxsensor-mclk4-fn-pinsFgpp9-0Shxsensor-mclk5-out-pinsFgpp11-0Shxsensor-mclk5-fn-pinsFgpp11-0Shxsensor-mclk6-out-pinsFgpp13-0Shxsensor-mclk6-fn-pinsFgpp13-0Shxsensor-mclk7-out-pinsFgpp15-0Shxsensor-mclk7-fn-pinsFgpp15-0Shxsensor-mclk8-out-pinsFgpp17-0Shxsensor-mclk8-fn-pinsFgpp17-0Shxhsi2c14-bus-pinsFgpp18-0gpp18-1Shxì/uart14-bus-pins Fgpp18-0gpp18-1gpp18-2gpp18-3Shì0spi14-bus-pinsFgpp18-0gpp18-1gpp18-2Shxì1spi14-cs-pinsFgpp18-3Shxspi14-cs-func-pinsFgpp18-3Shxhsi2c8-bus-pinsFgpp16-0gpp16-1Shxˆì+uart8-bus-pins Fgpp16-0gpp16-1gpp16-2gpp16-3Shì,spi8-bus-pinsFgpp16-0gpp16-1gpp16-2Shxì-spi8-cs-pinsFgpp16-3Shxspi8-cs-func-pinsFgpp16-3Shxhsi2c7-bus-pinsFgpp14-0gpp14-1Shxì(uart7-bus-pins Fgpp14-0gpp14-1gpp14-2gpp14-3Shì)spi7-bus-pinsFgpp14-0gpp14-1gpp14-2Shxì*spi7-cs-pinsFgpp14-3Shxspi7-cs-func-pinsFgpp14-3Shxhsi2c6-bus-pinsFgpp12-0gpp12-1Shxì%uart6-bus-pins Fgpp12-0gpp12-1gpp12-2gpp12-3Shì&spi6-bus-pinsFgpp12-0gpp12-1gpp12-2Shxì'spi6-cs-pinsFgpp12-3Shxspi6-cs-func-pinsFgpp12-3Shxhsi2c5-bus-pinsFgpp10-0gpp10-1Shxì"uart5-bus-pins Fgpp10-0gpp10-1gpp10-2gpp10-3Shì#spi5-bus-pinsFgpp10-0gpp10-1gpp10-2xShœˆì$spi5-cs-func-pinsFgpp10-3xShœˆhsi2c4-bus-pinsFgpp8-0gpp8-1Shxìuart4-bus-pinsFgpp8-0gpp8-1gpp8-2gpp8-3Shì spi4-bus-pinsFgpp8-0gpp8-1gpp8-2Shxì!spi4-cs-pinsFgpp8-3Shxspi4-cs-func-pinsFgpp8-3Shxhsi2c3-bus-pinsFgpp6-0gpp6-1Shxìuart3-bus-pinsFgpp6-0gpp6-1gpp6-2gpp6-3Shìspi3-bus-pinsFgpp6-0gpp6-1gpp6-2Shxìspi3-cs-pinsFgpp6-3Shxspi3-cs-func-pinsFgpp6-3Shxhsi2c2-bus-pinsFgpp4-0gpp4-1Shxìuart2-bus-pinsFgpp4-0gpp4-1gpp4-2gpp4-3Shìspi2-bus-pinsFgpp4-0gpp4-1gpp4-2Shxìspi2-cs-pinsFgpp4-3Shxspi2-cs-func-pinsFgpp4-3Shxhsi2c1-bus-pinsFgpp2-0gpp2-1Shxìuart1-bus-pinsFgpp2-0gpp2-1gpp2-2gpp2-3Shìspi1-bus-pinsFgpp2-0gpp2-1gpp2-2Shxìspi1-cs-pinsFgpp2-3Shxspi1-cs-func-pinsFgpp2-3Shxusi@109000c0'google,gs101-usisamsung,exynos850-usi��À š ¨/ ¯pclkipclk° èdisabledi2c@10900000.google,gs101-hsi2csamsung,exynosautov9-hsi2c��À ¨/¯hsi2chsi2c_pclkŠ{¿Édefault èdisabledserial@10900000google,gs101-uart��À¨/¯uartclk_uart_baud0Š{¿Édefault×@ èdisabledspi@10900000google,gs101-spi��0 ¨/¯spispi_busclk0Š{¿Édefault èdisabledusi@109100c0'google,gs101-usisamsung,exynos850-usi�‘À š ¨0  ¯pclkipclk° èdisabledi2c@10910000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�‘À ¨ 0¯hsi2chsi2c_pclkŠ|¿Édefault èdisabledserial@10910000google,gs101-uart�‘À¨0 ¯uartclk_uart_baud0Š|¿Édefault×@ èdisabledspi@10910000google,gs101-spi�‘0 ¨0 ¯spispi_busclk0Š|¿Édefault èdisabledusi@109200c0'google,gs101-usisamsung,exynos850-usi�’À š ¨7' ¯pclkipclk° èdisabledi2c@10920000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�’À ¨'7¯hsi2chsi2c_pclkŠ}¿Édefault èdisabledserial@10920000google,gs101-uart�’À¨7'¯uartclk_uart_baud0Š}¿Édefault×@ èdisabledspi@10920000google,gs101-spi�’0 ¨7'¯spispi_busclk0Š}¿Édefault èdisabledusi@109300c0'google,gs101-usisamsung,exynos850-usi�“À š ¨8( ¯pclkipclk°  èdisabledi2c@10930000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�“À ¨(8¯hsi2chsi2c_pclkŠ~¿Édefault èdisabledserial@10930000google,gs101-uart�“À¨8(¯uartclk_uart_baud0Š~¿ Édefault×@ èdisabledspi@10930000google,gs101-spi�“0 ¨8(¯spispi_busclk0Š~¿!Édefault èdisabledusi@109400c0'google,gs101-usisamsung,exynos850-usi�”À š ¨9) ¯pclkipclk° èdisabledi2c@10940000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�”À ¨)9¯hsi2chsi2c_pclkŠ¿"Édefault èdisabledserial@10940000google,gs101-uart�”À¨9)¯uartclk_uart_baud0Š¿#Édefault×@ èdisabledspi@10940000google,gs101-spi�”0 ¨9)¯spispi_busclk0Š¿$Édefault èdisabledusi@109500c0'google,gs101-usisamsung,exynos850-usi�•À š ¨:* ¯pclkipclk° èdisabledi2c@10950000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�•À ¨*:¯hsi2chsi2c_pclkŠ€¿%Édefault èdisabledserial@10950000google,gs101-uart�•À¨:*¯uartclk_uart_baud0Š€¿&Édefault×@ èdisabledspi@10950000google,gs101-spi�•0 ¨:*¯spispi_busclk0Š€¿'Édefault èdisabledusi@109600c0'google,gs101-usisamsung,exynos850-usi�–À š ¨;+ ¯pclkipclk° èdisabledi2c@10960000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�–À ¨+;¯hsi2chsi2c_pclkŠ�¿(Édefault èdisabledserial@10960000google,gs101-uart�–À¨;+¯uartclk_uart_baud0Š�¿)Édefault×@ èdisabledspi@10960000google,gs101-spi�–0 ¨;+¯spispi_busclk0Š�¿*Édefault èdisabledusi@109700c0'google,gs101-usisamsung,exynos850-usi�—À š ¨<, ¯pclkipclk°èokayíi2c@10970000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�—À ¨,<¯hsi2chsi2c_pclkŠ‚¿+Édefaultèokayeeprom@50 atmel,24c08�Pserial@10970000google,gs101-uart�—À¨<,¯uartclk_uart_baud0Š‚¿,Édefault×@ èdisabledspi@10970000google,gs101-spi�—0 ¨<,¯spispi_busclk0Š‚¿-Édefault èdisabledusi@10a000c0'google,gs101-usisamsung,exynos850-usi� À š ¨A? ¯pclkipclk° íèokayúserial@10a00000google,gs101-uart� À¨A?¯uartclk_uart_baud0Šz¿.Édefault×èokayusi@10a200c0'google,gs101-usisamsung,exynos850-usi�¢À š ¨B@ ¯pclkipclk°( èdisabledi2c@10a20000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�¢À ¨@B¯hsi2chsi2c_pclkŠƒ¿/Édefault èdisabledserial@10a20000google,gs101-uart�¢À¨B@¯uartclk_uart_baud0Šƒ¿0Édefault×@ èdisabledspi@10a20000google,gs101-spi�¢0 ¨B@¯spispi_busclk0Šƒ¿1Édefault èdisabledclock-controller@10c00000google,gs101-cmu-peric1�À@Z¨…†¯oscclkbusipì2syscon@10c20000"google,gs101-peric1-sysregsyscon�¨2.ì3pinctrl@10c40000google,gs101-pinctrl�Ĩ2¯pclkŠ„gpp20-gpio-bank*: ûgpp21-gpio-bank*: ûgpp22-gpio-bank*: ûgpp23-gpio-bank*: ûgpp24-gpio-bank*: ûgpp25-gpio-bank*: ûgpp26-gpio-bank*: ûgpp27-gpio-bank*: ûhsi2c13-bus-pinsFgpp25-0gpp25-1ShxìCuart13-bus-pins Fgpp25-0gpp25-1gpp25-2gpp25-3ShìDspi13-bus-pinsFgpp25-0gpp25-1gpp25-2ShxìEspi13-cs-pinsFgpp25-3Shxspi13-cs-func-pinsFgpp25-3Shxhsi2c12-bus-pinsFgpp23-4gpp23-5Shxì@uart12-bus-pins Fgpp23-4gpp23-5gpp23-6gpp23-7ShìAspi12-bus-pinsFgpp23-4gpp23-5gpp23-6ShxìBspi14-cs2-pinsFgpp23-6Shxspi12-cs-pinsFgpp23-7Shxspi12-cs-func-pinsFgpp23-7Shxhsi2c11-bus-pinsFgpp23-0gpp23-1Shxì=uart11-bus-pins Fgpp23-0gpp23-1gpp23-2gpp23-3Shì>spi11-bus-pinsFgpp23-0gpp23-1gpp23-2Shxì?spi11-cs-pinsFgpp23-3Shxspi11-cs-func-pinsFgpp23-3Shxhsi2c10-bus-pinsFgpp21-0gpp21-1Shxì:uart10-bus-pins Fgpp21-0gpp21-1gpp21-2gpp21-3Shì;spi10-bus-pinsFgpp21-0gpp21-1gpp21-2Shxì<spi10-cs-pinsFgpp21-3Shxspi10-cs-func-pinsFgpp21-3Shxhsi2c9-bus-pinsFgpp20-4gpp20-5Shxì7uart9-bus-pins Fgpp20-4gpp20-5gpp20-6gpp20-7Shì8spi9-bus-pinsFgpp20-4gpp20-5gpp20-6Shxì9spi9-cs-pinsFgpp20-7Shxspi9-cs-func-pinsFgpp20-7Shxhsi2c0-bus-pinsFgpp20-0gpp20-1Shxì4uart0-bus-pins Fgpp20-0gpp20-1gpp20-2gpp20-3Shì5spi0-bus-pinsFgpp20-0gpp20-1gpp20-2Shxì6spi0-cs-pinsFgpp20-3Shxspi0-cs-func-pinsFgpp20-3Shxusi@10d100c0'google,gs101-usisamsung,exynos850-usi�ÑÀ š ¨22 ¯pclkipclk°3 èdisabledi2c@10d10000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�ÑÀ ¨22¯hsi2chsi2c_pclkŠ‹¿4Édefault èdisabledserial@10d10000google,gs101-uart�ÑÀ¨22¯uartclk_uart_baud0Š‹¿5Édefault×@ èdisabledspi@10d10000google,gs101-spi�Ñ0 ¨22¯spispi_busclk0Š‹¿6Édefault èdisabledusi@10d200c0'google,gs101-usisamsung,exynos850-usi�ÒÀ š ¨2!2 ¯pclkipclk°3 èdisabledi2c@10d20000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�ÒÀ ¨22!¯hsi2chsi2c_pclkŠŒ¿7Édefault èdisabledserial@10d20000google,gs101-uart�ÒÀ¨2!2¯uartclk_uart_baud0ŠŒ¿8Édefault×@ èdisabledspi@10d20000google,gs101-spi�Ò0 ¨2!2¯spispi_busclk0ŠŒ¿9Édefault èdisabledusi@10d300c0'google,gs101-usisamsung,exynos850-usi�ÓÀ š ¨2"2 ¯pclkipclk°3 èdisabledi2c@10d30000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�ÓÀ ¨22"¯hsi2chsi2c_pclkŠ�¿:Édefault èdisabledserial@10d30000google,gs101-uart�ÓÀ¨2"2¯uartclk_uart_baud0Š�¿;Édefault×@ èdisabledspi@10d30000google,gs101-spi�Ó0 ¨2"2¯spispi_busclk0Š�¿<Édefault èdisabledusi@10d400c0'google,gs101-usisamsung,exynos850-usi�ÔÀ š ¨2#2 ¯pclkipclk°3  èdisabledi2c@10d40000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�ÔÀ ¨22#¯hsi2chsi2c_pclkŠŽ¿=Édefault èdisabledserial@10d40000google,gs101-uart�ÔÀ¨2#2¯uartclk_uart_baud0ŠŽ¿>Édefault×@ èdisabledspi@10d40000google,gs101-spi�Ô0 ¨2#2¯spispi_busclk0ŠŽ¿?Édefault èdisabledusi@10d500c0'google,gs101-usisamsung,exynos850-usi�ÕÀ š ¨2$2 ¯pclkipclk°3èokayíi2c@10d50000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�ÕÀ ¨22$¯hsi2chsi2c_pclkŠ�¿@Édefaultèokayserial@10d50000google,gs101-uart�ÕÀ¨2$2¯uartclk_uart_baud0Š�¿AÉdefault×@ èdisabledspi@10d50000google,gs101-spi�Õ0 ¨2$2¯spispi_busclk0Š�¿BÉdefault èdisabledusi@10d600c0'google,gs101-usisamsung,exynos850-usi�ÖÀ š ¨2%2 ¯pclkipclk°3 èdisabledi2c@10d60000.google,gs101-hsi2csamsung,exynosautov9-hsi2c�ÖÀ ¨22%¯hsi2chsi2c_pclkŠ�¿CÉdefault èdisabledserial@10d60000google,gs101-uart�ÖÀ¨2%2¯uartclk_uart_baud0Š�¿DÉdefault×@ èdisabledspi@10d60000google,gs101-spi�Ö0 ¨2%2¯spispi_busclk0Š�¿EÉdefault èdisabledclock-controller@11000000google,gs101-cmu-hsi0�@Z$¨nopq#¯oscclkbusdpgtcusb31drdusbdpdbgìFphy@11100000google,gs101-usb31drd-phy�(  phypcspma(¨F)F+F%F&F.%¯phyrefctrl_aclkctrl_pclkscl_pclk!èokay4G?GQGcGvGˆGìHusb@11110000google,gs101-dwusb3 š ¨F*FF'F('¯bus_earlysusp_clklink_aclklink_pclk èokayšG§Gusb@0 snps,dwc3�¨F,¯refŠÏ´HH¹usb2-phyusb3-phyèokayÃotgË Ûperipheralôsuper-speed-pluspinctrl@11840000google,gs101-pinctrl�„¨¯pclkŠ×gph0-gpio-bank*: ûgph1-gpio-bank*: ûpcie0-clkreq-pinsFgph0-1Shxœˆpcie0-perst-pinsFgph0-0Sxœclock-controller@14400000google,gs101-cmu-hsi2�@@Z$¨tvwu¯oscclkbuspcieufsmmcìIsyscon@14420000 google,gs101-hsi2-sysregsyscon�B¨I/ìMpinctrl@14440000google,gs101-pinctrl�D¨I ¯pclkŠ÷gph2-gpio-bank*: ûgph3-gpio-bank*: ûgph4-gpio-bank*: ûsd2-clk-pinsFgph4-0Shxsd2-cmd-pinsFgph4-1Shxsd2-bus-width1-pinsFgph4-2Shxsd2-bus-width4-pinsFgph4-3gph4-4gph4-5Shxsd2-clk-fast-slew-rate-1x-pinsFgph4-0Shxsd2-clk-fast-slew-rate-2x-pinsFgph4-0Shxsd2-clk-fast-slew-rate-3x-pinsFgph4-0Shxsd2-clk-fast-slew-rate-4x-pinsFgph4-0Shxufs-rst-n-pinsFgph3-1ShœˆìJufs-refclk-out-pinsFgph3-0ShœˆìKpcie1-clkreq-pinsFgph2-1Shxœˆpcie1-perst-pinsFgph2-0Sxœufs@14700000google,gs101-ufs �ppx ` hcivs_hciuniproufspŠ0¨I8I9I:I(I)I//¯core_clksclk_unipro_mainfmpaclkpclksysreg0¿JKÉdefault´L¹ufs-phy°MèokayNphy@14704000google,gs101-ufs-phy�p@0 phy-pma!¨¯ref_clkèokayìLclock-controller@17400000google,gs101-cmu-apm�@€Z¨¯oscclkìOsyscon@174204e0google,gs101-apm-sysregsyscon�Bàsystem-controller@17460000google,gs101-pmusyscon�Fìsyscon-poweroffsyscon-poweroff">œ)syscon-rebootsyscon-reboot":).pinctrl@174d0000google,gs101-pinctrl�M¨O ¯pclkwakeup-interrupt-controllerSgoogle,gs101-wakeup-eintsamsung,exynos850-wakeup-eintsamsung,exynos7-wakeup-eintgpa0-gpio-bank*: û&€Šgpa1-gpio-bank*: û&pŠ     gpa2-gpio-bank*: û&PŠgpa3-gpio-bank*: û&@Šgpa4-gpio-bank*: û&@Šgpa5-gpio-bank*: ûpŠ !"gpa9-gpio-bank*: û€Š#$%&'()*gpa10-gpio-bank*: û Š+,ìUuart15-bus-pinsFgpa2-3gpa2-4Shuart16-bus-pinsFgpa3-0gpa3-1gpa3-2gpa3-3Shuart17-bus-pinsFgpa4-0gpa4-1gpa4-2gpa4-3Shspi15-bus-pinsFgpa4-0gpa4-1gpa4-2Shxspi15-cs-pinsFgpa4-3Shxkey-power-pinsFgpa10-1ShxìRpinctrl@174e0000google,gs101-pinctrl�N¨O ¯pclkwakeup-interrupt-controllerSgoogle,gs101-wakeup-eintsamsung,exynos850-wakeup-eintsamsung,exynos7-wakeup-eintgpa6-gpio-bank*: û&€Š-./01234gpa7-gpio-bank*: û&@Š5678ìSgpa8-gpio-bank*: û&€Š9:;<=>?@ìTgpa11-gpio-bank*: û& ŠABkey-voldown-pinsFgpa7-3ShxìPkey-volup-pinsFgpa8-1ShxìQpinctrl@17940000google,gs101-pinctrl�”¨¯pclkgps3-gpio-bank*: ûpinctrl@17a80000google,gs101-pinctrl�¨¨¯pclk èdisabledgps0-gpio-bank*: ûgps1-gpio-bank*: ûgps2-gpio-bank*: ûclock-controller@1e080000google,gs101-cmu-top�€Z¨¯oscclkìtimerarm,armv8-timer@Š ÿÿ ÿ ÿchosen4$=/soc@0/usi@10a000c0/serial@10a00000gpio-keys gpio-keys ¿PQRÉdefaultbutton-vol-downIKEY_VOLUMEDOWNOr ZS`button-vol-up IKEY_VOLUMEUPOs ZT`button-power IKEY_POWEROt ZU`regulator-0regulator-fixednplaceholder_regìGregulator-1regulator-fixednufs-vcc }V‚”ìN compatible#address-cells#size-cellsinterrupt-parentmodelpinctrl0pinctrl1pinctrl2pinctrl3pinctrl4pinctrl5pinctrl6pinctrl7serial0cpudevice_typeregenable-methodcpu-idle-statescapacity-dmips-mhzdynamic-power-coefficientphandleentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-us#clock-cellsclock-output-namesclock-frequencyinterruptscpusrangesno-mapclocksclock-namessamsung,syscon-phandlesamsung,cluster-indexstatustimeout-sec#interrupt-cellsinterrupt-controlleraffinitygpio-controller#gpio-cellssamsung,pinssamsung,pin-functionsamsung,pin-pudsamsung,pin-drvsamsung,pin-pud-pdnsamsung,pin-con-pdnsamsung,sysregpinctrl-0pinctrl-namessamsung,uart-fifosizesamsung,modesamsung,clkreq-onreg-names#phy-cellssamsung,pmu-sysconpll-supplydvdd-usb20-supplyvddh-usb20-supplyvdd33-usb20-supplyvdda-usbdp-supplyvddh-usbdp-supplyvdd10-supplyvdd33-supplyphysphy-namesdr_modeusb-role-switchrole-switch-default-modemaximum-speedfreq-table-hzvcc-supplyregmapoffsetmaskvaluebootargsstdout-pathlabellinux,codegpioswakeup-sourceregulator-namegpioregulator-boot-onenable-active-high