Ð þíiË8cÀ( cˆ ARM Juno development board (r0)arm,junoarm,vexpress"1clock-7372800 fixed-clock=Jp€ Zjuno:uartclkmDclock-48000000 fixed-clock=JÜl Zclk48mhzmHclock-50000000 fixed-clock=Júð€Zsmc_clkm clock-100000000 fixed-clock=Jõá Zapb_pclkm clock-400000000 fixed-clock=Jׄ Zfaxi_clkm>clock-24000000 fixed-clock=Jn6Zjuno_mb:clk24mhzmclock-25000000 fixed-clock=J}x@Zjuno_mb:clk25mhzmclock-1000000 fixed-clock=JB@Zjuno_mb:refclk1mhzmclock-32768 fixed-clock=J€Zjuno_mb:refclk32khzmregulator-3v3regulator-fixed uMCC_SB_3V3„2Z œ2Z ´mgpio-keys gpio-keyspower-buttonÈ2ÚètóPOWER ùhome-buttonÈ2ÚèfóHOME ùrlock-buttonÈ2Úè˜óRLOCK ùvol-up-buttonÈ2ÚèsóVOL+ ùvol-down-buttonÈ2ÚèróVOL- ùnmi-buttonÈ2ÚècóNMI ùbus@8000000 simple-bus"1ÿ  *DEF ¡¢£¤¥ ¦ § ¨ ©motherboard-bus@8000000arm,vexpress,v2p-p1simple-bus"1xÿ 8R@flash@0arm,vexpress-flashcfi-flash RV adisabledpartitionsarm,arm-firmware-suiteethernet@200000000smsc,lan9118smsc,lan9115 Rhsmii|‰ž±¸Æiofpga-bus@300000000 simple-bus"1ÿ sysctl@20000arm,sp810arm,primecellR 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0m2out-portsportendpointâ1m)cti@23320000:arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellR#2±  Öapb_pclk¸ 20cti@20020000 arm,coresight-ctiarm,primecellR ±  Öapb_pclk¸ "1trig-conns@0R+< N`3trig-conns@1R+< N`4trig-conns@2R+<N`5trig-conns@3RN`6cti@20110000 arm,coresight-ctiarm,primecellR ±  Öapb_pclk¸ "1trig-conns@0R+<N` ssys_profilertrig-conns@1RN` swatchdogtrig-conns@2RN` sg_countergpu@2d000000arm,juno-maliarm,mali-t624R-$h!"  †jobmmugpu±7¸ Æsram@2e000000arm,juno-sram-nsmmio-sramR.€"1ÿ.€scp-sram@0arm,juno-scp-shmemRscp-sram@200arm,juno-scp-shmemRm;pcie@40000000<arm,juno-r1-pcieplda,xpressrich3-axipci-host-ecam-generic–pciR@¢ÿ¬"1ÆTÿ_€€PPB@@8½€€€C�*ˆ‰Š‹È8 adisabledÓâ9scpi arm,scpiì:ó;clocksarm,scpi-clocksclocks-0arm,scpi-dvfs-clocks= ùZatlclkaplclkgpuclkm7clocks-1arm,scpi-variable-clocks=ùZpxlclkm@power-controllerarm,scpi-power-domainsm sensorsarm,scpi-sensors'm<thermal-zonespmic-thermal=èKda<tripstrip0q_�}Ð �criticalsoc-thermal=èKda<tripstrip0q8€}Ð �criticalbig-cl-thermal=èKda< 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modelcompatibleinterrupt-parent#address-cells#size-cells#clock-cellsclock-frequencyclock-output-namesphandleregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-ondebounce-intervalwakeup-sourcelinux,codelabelgpiosranges#interrupt-cellsinterrupt-map-maskinterrupt-maparm,hbiarm,vexpress,siteregbank-widthstatusinterruptsphy-modereg-io-widthsmsc,irq-active-highsmsc,irq-push-pullclocksvdd33a-supplyvddvario-supplyclock-namesassigned-clocksassigned-clock-parentsoffsetlinux,default-triggerdefault-statemax-frequencyvmmc-supplygpio-controller#gpio-cellsinterrupt-controllerframe-number#mbox-cells#iommu-cells#global-interruptspower-domainsdma-coherentmsi-controllerremote-endpointiommusarm,scatter-gatherreg-namescpuarm,cs-dev-assocarm,trig-in-sigsarm,trig-in-typesarm,trig-out-sigsarm,trig-out-typesarm,trig-conn-nameinterrupt-namesdevice_typebus-rangelinux,pci-domaindma-rangesmsi-parentiommu-map-maskiommu-mapmboxesshmemclock-indicesnum-domains#power-domain-cells#thermal-sensor-cellspolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresis#dma-cellsi2c-sda-hold-time-nsserial0stdout-pathmethodentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-idle-statescapacity-dmips-mhzdynamic-power-coefficientcache-unifiedcache-levelinterrupt-affinity