Ð þíPÀ8B(¤Aä(xunlong,orangepi-5-plusrockchip,rk3588 +7Xunlong Orange Pi 5 Plusaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000ƒ/i2c@feca0000ˆ/serial@fd890000�/serial@feb40000˜/serial@feb50000 /serial@feb60000¨/serial@feb70000°/serial@feb80000¸/serial@feb90000À/serial@feba0000È/serial@febb0000Ð/serial@febc0000Ø/spi@feb00000Ý/spi@feb10000â/spi@feb20000ç/spi@feb30000ì/spi@fecb0000ñ/mmc@fe2e0000ö/mmc@fe2c0000cpus+cpu-mapcluster0core0ûcore1ûcore2ûcore3ûcluster1core0ûcore1ûcluster2core0ûcore1û cpu@0ÿcpuarm,cortex-a55 psci0 7 G0£,\ l€y@‹€˜€¥@·€Ä Õäïþ cpu@100ÿcpuarm,cortex-a55 psci0 \ l€y@‹€˜€¥@·€ÄÕäïþ cpu@200ÿcpuarm,cortex-a55 psci0 \ l€y@‹€˜€¥@·€ÄÕäïþ cpu@300ÿcpuarm,cortex-a55 psci0 \ l€y@‹€˜€¥@·€ÄÕäïþ cpu@400ÿcpuarm,cortex-a76 psci0 7 G0£,\ ly@‹˜¥@·ÄÕ ïþcpu@500ÿcpuarm,cortex-a76 psci0 \ ly@‹˜¥@·ÄÕ ïþcpu@600ÿcpuarm,cortex-a76 psci0 7 G0£,\ ly@‹˜¥@·ÄÕ ïþcpu@700ÿcpuarm,cortex-a76 psci0 \ ly@‹˜¥@·ÄÕ ïþ idle-states%pscicpu-sleeparm,idle-state2CZdkx{è l2-cache-l0cachen{@�Œ˜Ä l2-cache-l1cachen{@�Œ˜Äl2-cache-l2cachen{@�Œ˜Äl2-cache-l3cachen{@�Œ˜Äl2-cache-b0cachen{@�Œ˜Äl2-cache-b1cachen{@�Œ˜Äl2-cache-b2cachen{@�Œ˜Äl2-cache-b3cachen{@�Œ˜Äl3-cachecachen0{@�Œ˜display-subsystemrockchip,display-subsystem¦firmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc¬‚·+protocol@14 ½ protocol@16 Êpmu-a55arm,cortex-a55-pmu×pmu-a76arm,cortex-a76-pmu×psci arm,psci-1.0smcclock-0 fixed-clockâ)׫€òspll½timerarm,armv8-timerP×    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockân6òxin24m½clock-2 fixed-clockâ€òxin32k½reserved-memory+shmem@10f000arm,scmi-shmem ðgpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf û ï7 G ëÂ0#corecoregroupstacksÕ ¦0×\]^ jobmmugpu/  =disabledþ!Îusb@fc000000rockchip,rk3588-dwc3snps,dwc3 ü@×Ü0”“’#ref_clksuspend_clkbus_clkDotg L"#Qusb2-phyusb3-phy [utmi_wide/ dRkƒ›³Ôõ =disabledusb@fc800000"rockchip,rk3588-ehcigeneric-ehci ü€××0Ž�À$L%Qusb/ =okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci ü„ר0Ž�À$L%Qusb/ =okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci üˆ×Ú0�‘À&L'Qusb/ =okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci üŒ×Û0�‘À&L'Qusb/ =okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3 üÐ@×Þ(0jihkr&#ref_clksuspend_clkbus_clkutmipipeDhostL( Qusb3-phy [utmi_wided4k³Ôõ =disablediommu@fc900000 arm,smmu-v3 ü� @×qsvoeventqgerrorpriqcmdq-sync1 =disablediommu@fcb00000 arm,smmu-v3 ü° @×}‚{eventqgerrorpriqcmdq-sync1 =disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfd ýX msyscon@fd58c000rockchip,rk3588-sys-grfsyscon ýXÀhsyscon@fd5a4000rockchip,rk3588-vop-grfsyscon ýZ@ isyscon@fd5a6000rockchip,rk3588-vo0-grfsyscon ýZ` 0éßsyscon@fd5a8000rockchip,rk3588-vo1-grfsyscon ýZ€@0Ñjsyscon@fd5ac000rockchip,rk3588-usb-grfsyscon ýZÀ@Ýsyscon@fd5b0000rockchip,rk3588-php-grfsyscon ý[*syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon ý[Ààsyscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon ý\@ásyscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon ý\€@Þsyscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]@+Üusb2phy@0rockchip,rk3588-usb2phy ½0 #phyclk òusb480m_phy0׉dm>phyapb =disabledÛotg-portJ =disabled"syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]€@+usb2phy@8000rockchip,rk3588-usb2phy €½0 #phyclk òusb480m_phy2ׇdo>phyapb=okay$host-portJ=okayU)%syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]À@+usb2phy@c000rockchip,rk3588-usb2phy À½0 #phyclk òusb480m_phy3׈dp >phyapb=okay&host-portJ=okayU)'syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon ý^Úsyscon@fd5f0000rockchip,rk3588-iocsyscon ý_âsram@fd600000 mmio-sram ý`ý`+clock-controller@fd7c0000rockchip,rk3588-cru ý|À€7ÌÎ͆‡]qà@GA�«.à2©ø€FÏq)׫€ׄÍe/¯õáׄõá ëÂÍeZ ÀðÑ€ ëÂ`*½Êi2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c ýˆ×=0ts #i2cpclkm+wdefault+=okayregulator@42rockchip,rk8602 B…¢vdd_cpu_big0_s0±Å×dpï�ü,regulator-state-mem'regulator@43 rockchip,rk8603rockchip,rk8602 C…¢vdd_cpu_big1_s0±Å×dpï�ü,regulator-state-mem'serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uart ý‰×K0›œ#baudclkapb_pclk@--Etxrxm.wdefaultOY =disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹0’‘ #pwmpclkm/wdefaultf =disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹0’‘ #pwmpclkm0wdefaultf =disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹ 0’‘ #pwmpclkm1wdefaultf=okaypwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹00’‘ #pwmpclkm2wdefaultf=okaypower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd ý�€kpower-controller!rockchip,rk3588-power-controllerq+=okay power-domain@8 q+power-domain@9  0!#" …345q+power-domain@10 0!#"…6qpower-domain@11 0!#"…7qpower-domain@12 0…89:;qpower-domain@13 +qpower-domain@14 (0€¯­�…<qpower-domain@15  0…¯­†…=qpower-domain@16 0µ¶ …>?@+qpower-domain@17  0ºµ¶» …ABCqpower-domain@21 �0¯®­°›š�žŸ ¡¢£¤¥¦¨§ …DEFGHIJK+qpower-domain@23 0CA¯…Lqpower-domain@14  0€¯­�…<qpower-domain@15 0…¯­…=qpower-domain@22 0«ª…Mqpower-domain@24 0[Z]…NO+qpower-domain@25 80çèæäßÞZ…Pqpower-domain@26 80Q…QRqpower-domain@27 00ÒÓÐÏÖÕ…STUV+qpower-domain@28  0ÒÓ…WXqpower-domain@29 (0ÇÆÊÉÓ…YZqpower-domain@30 0z{…[qpower-domain@31 @0WŒÀ�Ž��‘…\]^_qpower-domain@33 !0WZ[qpower-domain@34 "0WZ[qpower-domain@37 %0Š2…`qpower-domain@38 &045qpower-domain@40 (…aqvideo-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpu ýµ×wvdpu0±² #aclkhclkŒb/ iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu ýµ@×v #aclkiface0±²/ 1brga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rga ý¸€×t0¨§©#aclkhclksclkdrqp >coreaxiahb/ video-codec@fdba0000rockchip,rk3588-vepu121 ýº×z0�ž #aclkhclkŒc/ iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu ýº@×y0�ž #aclkiface/ 1cvideo-codec@fdba4000rockchip,rk3588-vepu121 ýº@×|0Ÿ  #aclkhclkŒd/ iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommu ýºH@×{0Ÿ  #aclkiface/ 1dvideo-codec@fdba8000rockchip,rk3588-vepu121 ýº€×~0¡¢ #aclkhclkŒe/ iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu ýºˆ@×}0¡¢ #aclkiface/ 1evideo-codec@fdbac000rockchip,rk3588-vepu121 ýºÀ×€0£¤ #aclkhclkŒf/ iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu ýºÈ@×0£¤ #aclkiface/ 1fvideo-codec@fdc70000rockchip,rk3588-av1-vpu ýÇ×lvdpu7ACGׄׄ0AC #aclkhclk/  dþýÿvop@fdd90000rockchip,rk3588-vop  ýÙBýÙP“vopgamma-lutל80]\abcd[7#aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vopŒg/ `h�i®j¿k =disabledports+port@0+ port@1+ port@2+ port@3+ iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu  ýÙ~ýÙל0]\ #aclkiface1/  =disabledgi2s@fddc0000rockchip,rk3588-i2s-tdm ýÜ׸0ììá#mclk_txmclk_rxhclk7êÌ@lEtx/ d¸>tx-mã =disabledi2s@fddf0000rockchip,rk3588-i2s-tdm ýß×¹0445#mclk_txmclk_rxhclk71Ì@lEtx/ dØ>tx-mã =disabledi2s@fddfc000rockchip,rk3588-i2s-tdm ýßÀ×½000,#mclk_txmclk_rxhclk7-Ì@lErx/ dì>rx-mã =disabledqos@fdf35000rockchip,rk3588-qossyscon ýóP 8qos@fdf35200rockchip,rk3588-qossyscon ýóR 9qos@fdf35400rockchip,rk3588-qossyscon ýóT :qos@fdf35600rockchip,rk3588-qossyscon ýóV ;qos@fdf36000rockchip,rk3588-qossyscon ýó` [qos@fdf39000rockchip,rk3588-qossyscon ýó� `qos@fdf3d800rockchip,rk3588-qossyscon ýóØ aqos@fdf3e000rockchip,rk3588-qossyscon ýóà ]qos@fdf3e200rockchip,rk3588-qossyscon ýóâ \qos@fdf3e400rockchip,rk3588-qossyscon ýóä ^qos@fdf3e600rockchip,rk3588-qossyscon ýóæ _qos@fdf40000rockchip,rk3588-qossyscon ýô Yqos@fdf40200rockchip,rk3588-qossyscon ýô Zqos@fdf40400rockchip,rk3588-qossyscon ýô Sqos@fdf40500rockchip,rk3588-qossyscon ýô Tqos@fdf40600rockchip,rk3588-qossyscon ýô Uqos@fdf40800rockchip,rk3588-qossyscon ýô Vqos@fdf41000rockchip,rk3588-qossyscon ýô Wqos@fdf41100rockchip,rk3588-qossyscon ýô Xqos@fdf60000rockchip,rk3588-qossyscon ýö >qos@fdf60200rockchip,rk3588-qossyscon ýö ?qos@fdf60400rockchip,rk3588-qossyscon ýö @qos@fdf61000rockchip,rk3588-qossyscon ýö Aqos@fdf61200rockchip,rk3588-qossyscon ýö Bqos@fdf61400rockchip,rk3588-qossyscon ýö Cqos@fdf62000rockchip,rk3588-qossyscon ýö <qos@fdf63000rockchip,rk3588-qossyscon ýö0 =qos@fdf64000rockchip,rk3588-qossyscon ýö@ Lqos@fdf66000rockchip,rk3588-qossyscon ýö` Dqos@fdf66200rockchip,rk3588-qossyscon ýöb Eqos@fdf66400rockchip,rk3588-qossyscon ýöd Fqos@fdf66600rockchip,rk3588-qossyscon ýöf Gqos@fdf66800rockchip,rk3588-qossyscon ýöh Hqos@fdf66a00rockchip,rk3588-qossyscon ýöj Iqos@fdf66c00rockchip,rk3588-qossyscon ýöl Jqos@fdf66e00rockchip,rk3588-qossyscon ýön Kqos@fdf67000rockchip,rk3588-qossyscon ýöp Mqos@fdf67200rockchip,rk3588-qossyscon ýör qos@fdf70000rockchip,rk3588-qossyscon ý÷ 6qos@fdf71000rockchip,rk3588-qossyscon ý÷ 7qos@fdf72000rockchip,rk3588-qossyscon ý÷ 3qos@fdf72200rockchip,rk3588-qossyscon ý÷" 4qos@fdf72400rockchip,rk3588-qossyscon ý÷$ 5qos@fdf80000rockchip,rk3588-qossyscon ýø Pqos@fdf81000rockchip,rk3588-qossyscon ýø Qqos@fdf81200rockchip,rk3588-qossyscon ýø Rqos@fdf82000rockchip,rk3588-qossyscon ýø Nqos@fdf82200rockchip,rk3588-qossyscon ýø" Odfi@fe060000 þrockchip,rk3588-dfi@×&0:¿mpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcieô0?00CH>MR°)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ø÷öõôsyspmcmsglegacyerrþ`"nnnn0AP0o0XL( Qpcie-phy/ "Tóóó ó à À À@0 @À@þó“dbiapbconfigd). >pwrpipe+=okay bp nqlegacy-interrupt-controller~þ ×õnpcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcieô@O00DI?NSs)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ýüûúùsyspmcmsglegacyerrþ`"rrrr0AP@o@XLs Qpcie-phy/ "Tôôô ô à @0 A@þô“dbiapbconfigd*/ >pwrpipe+=okay btnqlegacy-interrupt-controller~þ ×úrethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a þ ×êémacirqeth_wake_irq(067Y^50#stmmacethclk_mac_refpclk_macaclk_macptp_ref/ !d$ >stmmaceth`h“*¤u´ÅvØwë =disabledmdiosnps,dwmac-mdio+stmmac-axi-configôþurx-queues-configvqueue0queue1tx-queues-config4wqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci þ!×(0b_eTo#satapmaliverxoobrefasicJ+ =disabledsata-port@0 \@Ls Qsata-phyi x sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci þ#×(0dagVq#satapmaliverxoobrefasicJ+ =disabledsata-port@0 \@L( Qsata-phyi x spi@fe2b0000 rockchip,sfc þ+@×Î0/0#clk_sfchclk_sfc+=okaywdefaultmxflash@0jedec,spi-nor ‡õᙪmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc þ,@×Ë 0  ­®#biuciuciu-driveciu-sample»‹ðÑ€wdefaultmyz{|/ (=okay Æ ×}àëóú~mmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc þ-@×Ì 0Š‹«¬#biuciuciu-driveciu-sample»‹ ëÂwdefaultm€/ % =disabledmmc@fe2e0000rockchip,rk3588-dwcmshc þ.×Í7-., G ëÂn6 ëÂ(0,*+-.#corebusaxiblocktimer‹ ëÂm�‚ƒ„…wdefault(d>corebusaxiblocktimer=okay ë!'5Di2s@fe470000rockchip,rk3588-i2s-tdm þG×´0+/(#mclk_txmclk_rxhclk7)-Ì@--Etxrx/ &d*+ >tx-mrx-m^wdefaultm†‡ˆ‰Šã=okayi2s@fe480000rockchip,rk3588-i2s-tdm þH×µ0y}u#mclk_txmclk_rxhclk@--Etxrxd^_ >tx-mrx-m^wdefault(m‹Œ�Ž��‘’“”ã =disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2s þI×¶0#i2s_clki2s_hclk7Ì@••Etxrx/ &wdefaultm–—˜™ã=okayi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2s þJ×·0%#i2s_clki2s_hclk7"Ì@••Etxrx/ &wdefaultmš›œ�ã =disabledinterrupt-controller@fe600000 arm,gic-v3  þ`þh× ~yþaƒ¨8Žþ+msi-controller@fe640000arm,gic-v3-its þdŽ�omsi-controller@fe660000arm,gic-v3-its þfŽ�îppi-partitionsinterrupt-partition-0¨interrupt-partition-1¨ dma-controller@fea10000arm,pl330arm,primecell þ¡@ ×VW±0n #apb_pclkÈ-dma-controller@fea30000arm,pl330arm,primecell þ£@ ×XY±0o #apb_pclkÈ•i2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c þ©0ƒ{ #i2cpclk×>mžwdefault+ =disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c þª0„| #i2cpclk×?mŸwdefault+ =disabledi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c þ«0…} #i2cpclk×@m wdefault+ =disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c þ¬0†~ #i2cpclk×Am¡wdefault+ =disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c þ­0‡ #i2cpclk×Bm¢wdefault+ =disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer þ® ×!0TW #pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt þ¯0dc #tclkpclk×;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spi þ°×F0—’#spiclkapb_pclk@--EtxrxÓ m£¤¥wdefault+ =disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spi þ±×G0˜“#spiclkapb_pclk@--EtxrxÓ m¦§¨wdefault+ =disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spi þ²×H0™”#spiclkapb_pclk@••EtxrxÓm©ªwdefault+=okay7™G ëÂpmic@0rockchip,rk806  }×wdefaultm«¬­®‡B@Úò,þ, , , ", ., :, F, R, ^, k¯ x, …° ’° Ÿ, « »dvs1-null-pins Çgpio_pwrctrl1 Ìpin_fun0¬dvs2-null-pins Çgpio_pwrctrl2 Ìpin_fun0­dvs3-null-pins Çgpio_pwrctrl3 Ìpin_fun0®regulatorsdcdc-reg1 ¢vdd_gpu_s0Å Õ�×dpï~ð0Ôregulator-state-mem'dcdc-reg2¢vdd_cpu_lit_s0±Å×dpï~ð0Ôregulator-state-mem'dcdc-reg3 ¢vdd_log_s0±Å× L¸ï –¨0Ôregulator-state-mem' ñ q°dcdc-reg4 ¢vdd_vdenc_s0±Å×dpï –¨0Ôregulator-state-mem'dcdc-reg5 ¢vdd_ddr_s0±Å× L¸ï » 0Ôregulator-state-mem' ñ øPdcdc-reg6 ¢vdd2_ddr_s3±Å°regulator-state-mem dcdc-reg7¢vdd_2v0_pldo_s3±Åׄ€ï„€0Ô¯regulator-state-mem  ñ„€dcdc-reg8 ¢vcc_3v3_s3±Å×2Z ï2Z ~regulator-state-mem  ñ2Z dcdc-reg9 ¢vddq_ddr_s0±Åregulator-state-mem'dcdc-reg10 ¢vcc_1v8_s3±Å×w@ïw@regulator-state-mem  ñw@pldo-reg1 ¢avcc_1v8_s0±Å×w@ïw@regulator-state-mem' ñw@pldo-reg2 ¢vcc_1v8_s0±Å×w@ïw@Ñregulator-state-mem' ñw@pldo-reg3 ¢avdd_1v2_s0±Å×O€ïO€regulator-state-mem'pldo-reg4 ¢vcc_3v3_s0±Å×2Z ï2Z 0ÔÕregulator-state-mem'pldo-reg5 ¢vccio_sd_s0±Å×w@ï2Z 0Ôregulator-state-mem'pldo-reg6 ¢pldo6_s3±Å×w@ïw@regulator-state-mem  ñw@nldo-reg1 ¢vdd_0v75_s3±Å× q°ï q°regulator-state-mem  ñ q°nldo-reg2¢vdd_ddr_pll_s0±Å× øPï øPregulator-state-mem' ñ øPnldo-reg3 ¢avdd_0v75_s0±Å× –¨ï –¨regulator-state-mem'nldo-reg4 ¢vdd_0v85_s0±Å× øPï øPregulator-state-mem'nldo-reg5 ¢vdd_0v75_s0±Å× q°ï q°regulator-state-mem'spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spi þ³×I0š•#spiclkapb_pclk@••EtxrxÓ m±²³wdefault+ =disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uart þ´×L0«Ÿ#baudclkapb_pclk@-- Etxrxm´wdefaultYO =disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uart þµ×M0¯ #baudclkapb_pclk@- - EtxrxmµwdefaultYO=okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uart þ¶×N0³¡#baudclkapb_pclk@- - Etxrxm¶wdefaultYO =disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uart þ·×O0·¢#baudclkapb_pclk@• • Etxrxm·wdefaultYO =disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uart þ¸×P0»£#baudclkapb_pclk@• • Etxrxm¸wdefaultYO =disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uart þ¹×Q0¿¤#baudclkapb_pclk@• •Etxrxm¹wdefaultYO =disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uart þº×R0Ã¥#baudclkapb_pclk@llEtxrxmºwdefaultYO =disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uart þ»×S0Ǧ#baudclkapb_pclk@l l Etxrxm»wdefaultYO =disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uart þ¼×T0˧#baudclkapb_pclk@l l Etxrxm¼wdefaultYO=okaypwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½0LK #pwmpclkm½wdefaultf =disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½0LK #pwmpclkm¾wdefaultf =disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½ 0LK #pwmpclkm¿wdefaultf =disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½00LK #pwmpclkmÀwdefaultf =disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾0ON #pwmpclkmÁwdefaultf =disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾0ON #pwmpclkmÂwdefaultf =disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾ 0ON #pwmpclkmÃwdefaultf =disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾00ON #pwmpclkmÄwdefaultf =disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿0RQ #pwmpclkmÅwdefaultf =disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿0RQ #pwmpclkmÆwdefaultf =disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿ 0RQ #pwmpclkmÇwdefaultf =disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿00RQ #pwmpclkmÈwdefaultf =disabledthermal-zonespackage-thermal % ; IÉtripspackage-crit YÁ8 e criticalbigcore0-thermal %d ; IÉtripsbigcore0-alert YL eÐpassiveÊbigcore0-crit YÁ8 e criticalcooling-mapsmap0 pÊ uÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿbigcore2-thermal %d ; IÉtripsbigcore2-alert YL eÐpassiveËbigcore2-crit YÁ8 e criticalcooling-mapsmap0 pË uÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿlittlecore-thermal %d ; IÉtripslittlecore-alert YL eÐpassiveÌlittlecore-crit YÁ8 e criticalcooling-mapsmap0 pÌ0 uÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcenter-thermal % ; IÉtripscenter-crit YÁ8 e criticalgpu-thermal %d ; IÉtripsgpu-alert YL eÐpassiveÍgpu-crit YÁ8 e criticalcooling-mapsmap0 pÍ uÎÿÿÿÿÿÿÿÿnpu-thermal % ; IÉtripsnpu-crit YÁ8 e criticaltsadc@fec00000rockchip,rk3588-tsadc þÀ×�0ž�#tsadcapb_pclk7žG„€dVW>tsadc-apbtsadc „ÔÀ › ²mÏ ÍÐwdefaultsleep ×=okayÉadc@fec10000rockchip,rk3588-saradc þÁ׎ í0‘�#saradcapb_pclkdU >saradc-apb=okay ÿÑýi2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c þÈ0ˆ€ #i2cpclk×CmÒwdefault+=okayâ€rtc@51haoyu,hym8563 Q }×½òhym8563wdefaultmÓ i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c þÉ0‰� #i2cpclk×DmÔwdefault+=okayaudio-codec@11everest,es8388 01 Ñ %Ñ 1Õ 2Õ71G»€ãi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c þÊ0Š‚ #i2cpclk×EmÖwdefault+ =disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spi þË×J0›–#spiclkapb_pclk@l lEtxrxÓ mרÙwdefault+ =disabledefuse@fecc0000rockchip,rk3588-otp þÌ 0Œ‹��#otpapb_pclkphyarbd§¦¨ >otpapbarb+cpu-code@2 id@7 cpu-leakage@17 cpu-leakage@18 cpu-leakage@19 log-leakage@1a gpu-leakage@1b cpu-version@1c  >npu-leakage@28 (codec-leakage@29 )dma-controller@fed10000arm,pl330arm,primecell þÑ@ ×Z[±0p #apb_pclkÈlphy@fed60000rockchip,rk3588-hdptx-phy þÖ 0 T#refapbJ8d#cde!"">phyapbinitcmnlaneroplllcpll`Ú =disabledphy@fed80000rockchip,rk3588-usbdp-phy þØJ0¡lVÛ#refclkimmortalpclkutmi(d   >initcmnlanepcs_apbpma_apb CÜ VÝ gÞ }ß =disabled#phy@fee00000rockchip,rk3588-naneng-combphy þà0¨vW #refapbpipe7¨GõáJd<C>phyapb �* Ÿà=okaysphy@fee20000rockchip,rk3588-naneng-combphy þâ0ªxW #refapbpipe7ªGõáJd>E>phyapb �* Ÿá=okay(sram@ff001000 mmio-sram ÿðÿð+pinctrlrockchip,rk3588-pinctrl`â+ãgpio@fd8a0000rockchip,gpio-bank ýŠ×0qr « µã ~ »þ}gpio@fec20000rockchip,gpio-bank þÂ×0st « µã ~ »þgpio@fec30000rockchip,gpio-bank þÃ×0uv « µã@ ~ »þ gpio@fec40000rockchip,gpio-bank þÄ×0wx « µã` ~ »þpgpio@fec50000rockchip,gpio-bank þÅ×0yz « µã€ ~ »þtpcfg-pull-up Áèpcfg-pull-down Îæpcfg-pull-none Ýäpcfg-pull-none-drv-level-2 Ý êêpcfg-pull-up-drv-level-1 Á êépcfg-pull-up-drv-level-2 Á êåpcfg-pull-none-smt Ý ùçauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout ä�emmc-bus8€ åååååååå‚emmc-clk åƒemmc-cmd å„emmc-data-strobe æ…eth1fspifspim1-pins`  å åååå åxgmac1gpuhdmii2c0i2c0m2-xfer çç+i2c1i2c1m0-xfer  ç çži2c2i2c2m0-xfer  ç çŸi2c3i2c3m0-xfer  ç ç i2c4i2c4m0-xfer  ç ç¡i2c5i2c5m0-xfer  ç ç¢i2c6i2c6m0-xfer  ç çÒi2c7i2c7m0-xfer  ç çÔi2c8i2c8m0-xfer  ç çÖi2s0i2s0-lrck ä†i2s0-mclk ä‡i2s0-sclk äˆi2s0-sdi0 ä‰i2s0-sdo0 äŠi2s1i2s1m0-lrck ä‹i2s1m0-sclk äŒi2s1m0-sdi0 ä�i2s1m0-sdi1 äŽi2s1m0-sdi2 ä�i2s1m0-sdi3 ä�i2s1m0-sdo0  ä‘i2s1m0-sdo1  ä’i2s1m0-sdo2  ä“i2s1m0-sdo3  ä”i2s2i2s2m0-lrck ä–i2s2m0-sclk ä—i2s2m0-sdi ä˜i2s2m0-sdo ä™i2s3i2s3-lrck äši2s3-sclk ä›i2s3-sdi äœi2s3-sdo ä�jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp èääääää«pmupwm0pwm0m0-pins ä/pwm1pwm1m0-pins ä0pwm2pwm2m1-pins  ä1pwm3pwm3m1-pins  ä2pwm4pwm4m0-pins  ä½pwm5pwm5m0-pins  ä¾pwm6pwm6m0-pins  ä¿pwm7pwm7m0-pins  äÀpwm8pwm8m0-pins  äÁpwm9pwm9m0-pins  äÂpwm10pwm10m0-pins  äÃpwm11pwm11m0-pins  äÄpwm12pwm12m0-pins  äÅpwm13pwm13m0-pins  äÆpwm14pwm14m0-pins  äÇpwm15pwm15m0-pins  äÈrefclksatasata0sata1sata2sdiosdiom1-pins` äèèèèè€sdmmcsdmmc-bus4@ åååå|sdmmc-clk åysdmmc-cmd åzsdmmc-det è{spdif0spdif1spi0spi0m0-pins0 ééé¥spi0m0-cs0 é£spi0m0-cs1 é¤spi1spi1m1-pins0 ééé¨spi1m1-cs0 é¦spi1m1-cs1 é§spi2spi2m2-pins0 é ééªspi2m2-cs0  é©spi3spi3m1-pins0 é éé³spi3m1-cs0 é±spi3m1-cs1 é²spi4spi4m0-pins0 éééÙspi4m0-cs0 é×spi4m0-cs1 éØtsadctsadc-shut-org äÏuart0uart0m1-xfer è è.uart1uart1m1-xfer  è è´uart2uart2m0-xfer  è èµuart3uart3m1-xfer  è è¶uart4uart4m1-xfer  è è·uart5uart5m1-xfer  è è¸uart6uart6m1-xfer  è è¹uart7uart7m1-xfer  è èºuart8uart8m1-xfer  è è»uart9uart9m0-xfer  è è¼vopbt656gpio-functsadc-gpio-func äÐeth0gmac0hym8563hym8563-int äÓledsblue-led èÿir-receiverir-receiver-pin  äþsoundhp-detect äusbvcc5v0-usb20-en ä usb@fc400000rockchip,rk3588-dwc3snps,dwc3 ü@@×Ý0—–•#ref_clksuspend_clkbus_clkDotg LëìQusb2-phyusb3-phy [utmi_wide/ dSk³Ôõ =disabledsyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon ý[€üsyscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon ý\ûsyscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon ý\À@úsyscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]@@+ùusb2phy@4000rockchip,rk3588-usb2phy @½0 #phyclk òusb480m_phy1׊dn>phyapb =disabledøotg-portJ =disabledëi2s@fddc8000rockchip,rk3588-i2s-tdm ýÜ€×¼0ññî#mclk_txmclk_rxhclk7ïÌ@lEtx/ dº>tx-mã =disabledi2s@fddf4000rockchip,rk3588-i2s-tdm ýß@׺099?#mclk_txmclk_rxhclk76Ì@lEtx/ dÚ>tx-mã =disabledi2s@fddf8000rockchip,rk3588-i2s-tdm ý߀×»0++'#mclk_txmclk_rxhclk7(Ì@lErx/ dÇ>rx-mã =disabledi2s@fde00000rockchip,rk3588-i2s-tdm ýà×¾0&&"#mclk_txmclk_rxhclk7#Ì@lErx/ dî>rx-mã =disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+ô00@E;JOt)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×syspmcmsglegacyerrþ`"íííí0APîXLï Qpcie-phy/ "Tððð ð à @0 @@þð“dbiapbconfigd&+ >pwrpipe=okay btnðlegacy-interrupt-controller~þ ×ípcie-ep@fe150000rockchip,rk3588-pcie-epP @ @þ @ @0“dbidbi2apbaddr_spaceatu00@E;JOt)#aclk_mstaclk_slvaclk_dbipclkauxpipe�× +syspmcmsglegacyerrdma0dma1dma2dma3AXLï Qpcie-phy/ "d&+ >pwrpipe =disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+ô00AF<KPu)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ÿþsyspmcmsglegacyerrþ`"ññññ0APîXLï Qpcie-phy/ "Tñññ ñ à @ @@0 @@@þñ“dbiapbconfigd', >pwrpipe =disabledlegacy-interrupt-controller~þ ×ÿñpcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcieô /00BG=LQ¯)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×óòñðïsyspmcmsglegacyerrþ`"òòòò0AP o XLó Qpcie-phy/ "Tòòò ò à € €@0 @€@þò“dbiapbconfigd(- >pwrpipe+=okay btnôlegacy-interrupt-controller~þ ×ðòethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a þ ×ãâmacirqeth_wake_irq(067X]40#stmmacethclk_mac_refpclk_macaclk_macptp_ref/ !d# >stmmaceth`h“*¤õ´ÅöØ÷ë =disabledmdiosnps,dwmac-mdio+stmmac-axi-configôþõrx-queues-configöqueue0queue1tx-queues-config4÷queue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci þ"×(0c`fUp#satapmaliverxoobrefasicJ+ =disabledsata-port@0 \@Ló Qsata-phyi x phy@fed90000rockchip,rk3588-usbdp-phy þÙJ0¡mWø#refclkimmortalpclkutmi(d>initcmnlanepcs_apbpma_apb Cù VÝ gú }ß =disabledìphy@fee10000rockchip,rk3588-naneng-combphy þá0©wW #refapbpipe7©GõáJd=D>phyapb �* Ÿû=okayóphy@fee80000rockchip,rk3588-pcie3-phy þèJ0y#pclkdH>phy �* ü=okayïopp-table-cluster0operating-points-v2 - opp-1008000000 8<Ü ? L¸ L¸~ð Mœ@opp-1200000000 8G†Œ ? ß4 ß4~ð Mœ@opp-1416000000 8Tfr ? ¢„ ¢„~ð Mœ@ ^opp-1608000000 8_Ø" ? øP øP~ð Mœ@opp-1800000000 8kIÒ ?~ð~ð~ð Mœ@opp-table-cluster1operating-points-v2 -opp-1200000000 8G†Œ ? L¸ L¸B@ Mœ@opp-1416000000 8Tfr ?  B@ Mœ@opp-1608000000 8_Ø" ? ¢„ ¢„B@ Mœ@opp-1800000000 8kIÒ ? øP øPB@ Mœ@opp-2016000000 8x)¸ ?HHB@ Mœ@opp-2208000000 8ƒ›h ?llB@ Mœ@opp-2400000000 8�  ?B@B@B@ Mœ@opp-table-cluster2operating-points-v2 -opp-1200000000 8G†Œ ? L¸ L¸B@ Mœ@opp-1416000000 8Tfr ?  B@ Mœ@opp-1608000000 8_Ø" ? ¢„ ¢„B@ Mœ@opp-1800000000 8kIÒ ? øP øPB@ Mœ@opp-2016000000 8x)¸ ?HHB@ Mœ@opp-2208000000 8ƒ›h ?llB@ Mœ@opp-2400000000 8�  ?B@B@B@ Mœ@opp-table-gpuoperating-points-v2!opp-300000000 8ᣠ? L¸ L¸ øPopp-400000000 8ׄ ? L¸ L¸ øPopp-500000000 8Íe ? L¸ L¸ øPopp-600000000 8#ÃF ? L¸ L¸ øPopp-700000000 8)¹' ? ®` ®` øPopp-800000000 8/¯ ? q° q° øPopp-900000000 85¤é ? 5 5 øPopp-1000000000 8;šÊ ? øP øP øPchosen jserial2:1500000n8adc-keys-0 adc-keys vý ‚buttons “w@ ­dbutton-maskrom »Mask Rom Á� ÌÐadc-keys-1 adc-keys vý ‚buttons “w@ ­dbutton-recovery »Recovery Áh ÌÐspeaker-audio-amplifiersimple-audio-amplifier æp óSpeaker Ampheadphones-audio-amplifiersimple-audio-amplifier æp óHeadphones Ampir-receivergpio-ir-receiver ht wdefaultmþgpio-leds gpio-ledswdefaultmÿled  Ìindicator  hppwm-fanpwm-fan FKPd ., 9ÃPïpwm-leds pwm-ledsled  Ìindicator  >ÿ 9a¨rfkill rfkill-gpio »rfkill-pcie-wlan Mwlan X}soundsimple-audio-cardwdefaultm gAnalog ~ ™i2s ² Ì ê ^+MicrophoneOnboard MicrophoneMicrophoneMicrophone JackSpeakerSpeakerHeadphoneHeadphonesrEHeadphonesLOUT1HeadphonesROUT1SpeakerLOUT2SpeakerROUT2HeadphonesHeadphones Amp OUTLHeadphonesHeadphones Amp OUTRHeadphones Amp INLLOUT1Headphones Amp INRROUT1SpeakerSpeaker Amp OUTLSpeakerSpeaker Amp OUTRSpeaker Amp INLLOUT2Speaker Amp INRROUT2LINPUT1Microphone JackRINPUT1Microphone JackLINPUT2Onboard MicrophoneRINPUT2Onboard Microphonesimple-audio-card,cpu_i»€simple-audio-card,codec_i»€vcc3v3-pcie30-regulatorregulator-fixed€ h ¢vcc3v3_pcie30×2Z ï2Z “ˆ,ðvcc3v3-pcie-eth-regulatorregulator-fixed hp ¢vcc3v3_pcie_eth×2Z ï2Z “ÃP,qvcc3v3-wf-regulatorregulator-fixed€ h  ¢vcc3v3_wf×2Z ï2Z “ÃP,ôvcc5v0-sys-regulatorregulator-fixed ¢vcc5v0_sys±Å×LK@ïLK@,vcc5v0-usb20-regulatorregulator-fixed€ åpwdefaultm  ¢vcc5v0_usb20×LK@ïLK@,) compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapclock-namespower-domainsstatusdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthfifo-depthcap-sd-highspeedcd-gpiosdisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-cssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplywakeup-sourceAVDD-supplyDVDD-supplyHPVDD-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltenable-gpiossound-name-prefixcolorfunction-enumeratorcooling-levelsfan-supplypwmsmax-brightnessradio-typeshutdown-gpiossimple-audio-card,namesimple-audio-card,aux-devssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,hp-det-gpiosimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-daisystem-clock-frequencyenable-active-highstartup-delay-us