Ð þíYU8Jü(YJÄ*friendlyarm,nanopc-t6-ltsrockchip,rk3588 +7FriendlyElec NanoPC-T6 LTSaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000ƒ/i2c@feca0000ˆ/serial@fd890000�/serial@feb40000˜/serial@feb50000 /serial@feb60000¨/serial@feb70000°/serial@feb80000¸/serial@feb90000À/serial@feba0000È/serial@febb0000Ð/serial@febc0000Ø/spi@feb00000Ý/spi@feb10000â/spi@feb20000ç/spi@feb30000ì/spi@fecb0000ñ/mmc@fe2e0000ö/mmc@fe2c0000cpus+cpu-mapcluster0core0ûcore1ûcore2ûcore3ûcluster1core0ûcore1ûcluster2core0ûcore1û cpu@0ÿcpuarm,cortex-a55 psci0 7 G0£,\ l€y@‹€˜€¥@·€Ä Õäïþ cpu@100ÿcpuarm,cortex-a55 psci0 \ l€y@‹€˜€¥@·€ÄÕäïþ cpu@200ÿcpuarm,cortex-a55 psci0 \ l€y@‹€˜€¥@·€ÄÕäïþ cpu@300ÿcpuarm,cortex-a55 psci0 \ l€y@‹€˜€¥@·€ÄÕäïþ cpu@400ÿcpuarm,cortex-a76 psci0 7 G0£,\ ly@‹˜¥@·ÄÕ ïþcpu@500ÿcpuarm,cortex-a76 psci0 \ ly@‹˜¥@·ÄÕ ïþcpu@600ÿcpuarm,cortex-a76 psci0 7 G0£,\ ly@‹˜¥@·ÄÕ ïþcpu@700ÿcpuarm,cortex-a76 psci0 \ ly@‹˜¥@·ÄÕ ïþ idle-states%pscicpu-sleeparm,idle-state2CZdkx{è l2-cache-l0cachen{@�Œ˜Ä l2-cache-l1cachen{@�Œ˜Äl2-cache-l2cachen{@�Œ˜Äl2-cache-l3cachen{@�Œ˜Äl2-cache-b0cachen{@�Œ˜Äl2-cache-b1cachen{@�Œ˜Äl2-cache-b2cachen{@�Œ˜Äl2-cache-b3cachen{@�Œ˜Äl3-cachecachen0{@�Œ˜display-subsystemrockchip,display-subsystem¦firmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc¬‚·+protocol@14 ½ protocol@16 Êpmu-a55arm,cortex-a55-pmu×pmu-a76arm,cortex-a76-pmu×psci arm,psci-1.0smcclock-0 fixed-clockâ)׫€òspll½timerarm,armv8-timerP×    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockân6òxin24m½clock-2 fixed-clockâ€òxin32k½reserved-memory+shmem@10f000arm,scmi-shmem ðgpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf û ï7 G ëÂ0#corecoregroupstacksÕ ¦0×\]^ jobmmugpu/ =okayþ!D"Óusb@fc000000rockchip,rk3588-dwc3snps,dwc3 ü@×Ü0”“’#ref_clksuspend_clkbus_clkPhost X#$]usb2-phyusb3-phy gutmi_wide/ pRw�§¿à=okay#portendpoint3%Úusb@fc800000"rockchip,rk3588-ehcigeneric-ehci ü€××0Ž�À&X']usb/ =okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci ü„ר0Ž�À&X']usb/ =okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci üˆ×Ú0�‘À(X)]usb/ =okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci üŒ×Û0�‘À(X)]usb/ =okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3 üÐ@×Þ(0jihkr&#ref_clksuspend_clkbus_clkutmipipePhostX* ]usb3-phy gutmi_widep4w¿àC =disablediommu@fc900000 arm,smmu-v3 ü� @×qsvoeventqgerrorpriqcmdq-sync] =disablediommu@fcb00000 arm,smmu-v3 ü° @×}‚{eventqgerrorpriqcmdq-sync] =disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfd ýX osyscon@fd58c000rockchip,rk3588-sys-grfsyscon ýXÀjsyscon@fd5a4000rockchip,rk3588-vop-grfsyscon ýZ@ ksyscon@fd5a6000rockchip,rk3588-vo0-grfsyscon ýZ` 0éésyscon@fd5a8000rockchip,rk3588-vo1-grfsyscon ýZ€@0Ñlsyscon@fd5ac000rockchip,rk3588-usb-grfsyscon ýZÀ@çsyscon@fd5b0000rockchip,rk3588-php-grfsyscon ý[,syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon ý[Àìsyscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon ý\@ísyscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon ý\€@èsyscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]@+æusb2phy@0rockchip,rk3588-usb2phy ½0 #phyclk òusb480m_phy0׉pmjphyapb=okayåotg-portv=okay#syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]€@+usb2phy@8000rockchip,rk3588-usb2phy €½0 #phyclk òusb480m_phy2ׇpojphyapb=okay&host-portv=okay�+'syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]À@+usb2phy@c000rockchip,rk3588-usb2phy À½0 #phyclk òusb480m_phy3׈pp jphyapb=okay(host-portv=okay)syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon ý^äsyscon@fd5f0000rockchip,rk3588-iocsyscon ý_îsram@fd600000 mmio-sram ý`ý`+clock-controller@fd7c0000rockchip,rk3588-cru ý|À€7ÌÎ͆‡]qà@GA�«.à2©ø€FÏq)׫€ׄÍe/¯õáׄõá ëÂÍeZ ÀðÑ€ ëÂŒ,½Êi2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c ýˆ×=0ts #i2cpclk™-£default+=okayregulator@42rockchip,rk8602 B±Îvdd_cpu_big0_s0Ýñdp�3üH.regulator-state-memSregulator@43 rockchip,rk8603rockchip,rk8602 C±Îvdd_cpu_big1_s0Ýñdp�3üH.regulator-state-memSserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uart ý‰×K0›œ#baudclkapb_pclkl//qtxrx™0£default{… =disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹0’‘ #pwmpclk™1£default’ =disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹0’‘ #pwmpclk™2£default’=okaypwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹ 0’‘ #pwmpclk™3£default’ =disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm ý‹00’‘ #pwmpclk™4£default’ =disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd ý�€mpower-controller!rockchip,rk3588-power-controller�+=okay power-domain@8 �+power-domain@9  0!#" ±567�+power-domain@10 0!#"±8�power-domain@11 0!#"±9�power-domain@12 0±:;<=�power-domain@13 +�power-domain@14 (0€¯­�±>�power-domain@15  0…¯­†±?�power-domain@16 0µ¶ ±@AB+�power-domain@17  0ºµ¶» ±CDE�power-domain@21 �0¯®­°›š�žŸ ¡¢£¤¥¦¨§ ±FGHIJKLM+�power-domain@23 0CA¯±N�power-domain@14  0€¯­�±>�power-domain@15 0…¯­±?�power-domain@22 0«ª±O�power-domain@24 0[Z]±PQ+�power-domain@25 80çèæäßÞZ±R�power-domain@26 80Q±ST�power-domain@27 00ÒÓÐÏÖÕ±UVWX+�power-domain@28  0ÒÓ±YZ�power-domain@29 (0ÇÆÊÉÓ±[\�power-domain@30 0z{±]�power-domain@31 @0WŒÀ�Ž��‘±^_`a�power-domain@33 !0WZ[�power-domain@34 "0WZ[�power-domain@37 %0Š2±b�power-domain@38 &045�power-domain@40 (±c�video-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpu ýµ×wvdpu0±² #aclkhclk¸d/ iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu ýµ@×v #aclkiface0±²/ ]drga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rga ý¸€×t0¨§©#aclkhclksclkprqp jcoreaxiahb/ video-codec@fdba0000rockchip,rk3588-vepu121 ýº×z0�ž #aclkhclk¸e/ iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu ýº@×y0�ž #aclkiface/ ]evideo-codec@fdba4000rockchip,rk3588-vepu121 ýº@×|0Ÿ  #aclkhclk¸f/ iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommu ýºH@×{0Ÿ  #aclkiface/ ]fvideo-codec@fdba8000rockchip,rk3588-vepu121 ýº€×~0¡¢ #aclkhclk¸g/ iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu ýºˆ@×}0¡¢ #aclkiface/ ]gvideo-codec@fdbac000rockchip,rk3588-vepu121 ýºÀ×€0£¤ #aclkhclk¸h/ iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu ýºÈ@×0£¤ #aclkiface/ ]hvideo-codec@fdc70000rockchip,rk3588-av1-vpu ýÇ×lvdpu7ACGׄׄ0AC #aclkhclk/  pþýÿvop@fdd90000rockchip,rk3588-vop  ýÙBýÙP¿vopgamma-lutל80]\abcd[7#aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vop¸i/ ŒjÉkÚlëm =disabledports+port@0+ port@1+ port@2+ port@3+ iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu  ýÙ~ýÙל0]\ #aclkiface]/  =disabledii2s@fddc0000rockchip,rk3588-i2s-tdm ýÜ׸0ììá#mclk_txmclk_rxhclk7êølnqtx/ p¸jtx-m =disabledi2s@fddf0000rockchip,rk3588-i2s-tdm ýß×¹0445#mclk_txmclk_rxhclk71ølnqtx/ pØjtx-m =disabledi2s@fddfc000rockchip,rk3588-i2s-tdm ýßÀ×½000,#mclk_txmclk_rxhclk7-ølnqrx/ pìjrx-m =disabledqos@fdf35000rockchip,rk3588-qossyscon ýóP :qos@fdf35200rockchip,rk3588-qossyscon ýóR ;qos@fdf35400rockchip,rk3588-qossyscon ýóT <qos@fdf35600rockchip,rk3588-qossyscon ýóV =qos@fdf36000rockchip,rk3588-qossyscon ýó` ]qos@fdf39000rockchip,rk3588-qossyscon ýó� bqos@fdf3d800rockchip,rk3588-qossyscon ýóØ cqos@fdf3e000rockchip,rk3588-qossyscon ýóà _qos@fdf3e200rockchip,rk3588-qossyscon ýóâ ^qos@fdf3e400rockchip,rk3588-qossyscon ýóä `qos@fdf3e600rockchip,rk3588-qossyscon ýóæ aqos@fdf40000rockchip,rk3588-qossyscon ýô [qos@fdf40200rockchip,rk3588-qossyscon ýô \qos@fdf40400rockchip,rk3588-qossyscon ýô Uqos@fdf40500rockchip,rk3588-qossyscon ýô Vqos@fdf40600rockchip,rk3588-qossyscon ýô Wqos@fdf40800rockchip,rk3588-qossyscon ýô Xqos@fdf41000rockchip,rk3588-qossyscon ýô Yqos@fdf41100rockchip,rk3588-qossyscon ýô Zqos@fdf60000rockchip,rk3588-qossyscon ýö @qos@fdf60200rockchip,rk3588-qossyscon ýö Aqos@fdf60400rockchip,rk3588-qossyscon ýö Bqos@fdf61000rockchip,rk3588-qossyscon ýö Cqos@fdf61200rockchip,rk3588-qossyscon ýö Dqos@fdf61400rockchip,rk3588-qossyscon ýö Eqos@fdf62000rockchip,rk3588-qossyscon ýö >qos@fdf63000rockchip,rk3588-qossyscon ýö0 ?qos@fdf64000rockchip,rk3588-qossyscon ýö@ Nqos@fdf66000rockchip,rk3588-qossyscon ýö` Fqos@fdf66200rockchip,rk3588-qossyscon ýöb Gqos@fdf66400rockchip,rk3588-qossyscon ýöd Hqos@fdf66600rockchip,rk3588-qossyscon ýöf Iqos@fdf66800rockchip,rk3588-qossyscon ýöh Jqos@fdf66a00rockchip,rk3588-qossyscon ýöj Kqos@fdf66c00rockchip,rk3588-qossyscon ýöl Lqos@fdf66e00rockchip,rk3588-qossyscon ýön Mqos@fdf67000rockchip,rk3588-qossyscon ýöp Oqos@fdf67200rockchip,rk3588-qossyscon ýör qos@fdf70000rockchip,rk3588-qossyscon ý÷ 8qos@fdf71000rockchip,rk3588-qossyscon ý÷ 9qos@fdf72000rockchip,rk3588-qossyscon ý÷ 5qos@fdf72200rockchip,rk3588-qossyscon ý÷" 6qos@fdf72400rockchip,rk3588-qossyscon ý÷$ 7qos@fdf80000rockchip,rk3588-qossyscon ýø Rqos@fdf81000rockchip,rk3588-qossyscon ýø Sqos@fdf81200rockchip,rk3588-qossyscon ýø Tqos@fdf82000rockchip,rk3588-qossyscon ýø Pqos@fdf82200rockchip,rk3588-qossyscon ýø" Qdfi@fe060000 þrockchip,rk3588-dfi@×&0:ëopcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie 0?00CH>MR°)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ø÷öõôsyspmcmsglegacyerr*;`Npppp\m|0q0„X* ]pcie-phy/ "Tóóó ó à À À@0 @À@þó¿dbiapbconfigp). jpwrpipe+=okay Žršs£default™tlegacy-interrupt-controllerª* ×õppcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie @O00DI?NSs)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ýüûúùsyspmcmsglegacyerr*;`Nuuuu\m|@q@„Xv ]pcie-phy/ "Tôôô ô à @0 A@þô¿dbiapbconfigp*/ jpwrpipe+=okay Žršw£default™xlegacy-interrupt-controllerª* ×úuethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a þ ×êémacirqeth_wake_irq(067Y^50#stmmacethclk_mac_refpclk_macaclk_macptp_ref/ !p$ jstmmacethŒj¿,Ðyàñz{ =disabledmdiosnps,dwmac-mdio+stmmac-axi-config *:yrx-queues-configJzqueue0queue1tx-queues-config`{queue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci þ!×(0b_eTo#satapmaliverxoobrefasicv+ =disabledsata-port@0 ˆ@Xv ]sata-phy• ¤ sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci þ#×(0dagVq#satapmaliverxoobrefasicv+ =disabledsata-port@0 ˆ@X* ]sata-phy• ¤ spi@fe2b0000 rockchip,sfc þ+@×Î0/0#clk_sfchclk_sfc+=okay£default™|flash@0jedec,spi-nor ³2êÅÖmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc þ,@×Ë 0  ­®#biuciuciu-driveciu-sampleç· ë£default™}~€/ (=okayÌò �)08F‚Rƒmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc þ-@×Ì 0Š‹«¬#biuciuciu-driveciu-sampleç· ë£default™„/ % =disabledmmc@fe2e0000rockchip,rk3588-dwcmshc þ.×Í7-., G ëÂn6 ëÂ(0,*+-.#corebusaxiblocktimer· ë™…†‡ˆ‰£default(pjcorebusaxiblocktimer=okayÌ0_es‚i2s@fe470000rockchip,rk3588-i2s-tdm þG×´0+/(#mclk_txmclk_rxhclk7)-øl//qtxrx/ &p*+ jtx-mrx-mœ£default™Š‹Œ�Ž=okayportendpoint·i2sÂ3�ßi2s@fe480000rockchip,rk3588-i2s-tdm þH×µ0y}u#mclk_txmclk_rxhclkl//qtxrxp^_ jtx-mrx-mœ£default(™�‘’“”•–—˜™ =disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2s þI×¶0#i2s_clki2s_hclk7ølššqtxrx/ &£default™›œ�ž =disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2s þJ×·0%#i2s_clki2s_hclk7"ølššqtxrx/ &£default™Ÿ ¡¢ =disabledinterrupt-controller@fe600000 arm,gic-v3  þ`þh× ªÊþaÔ¨8ß*+msi-controller@fe640000arm,gic-v3-its þdßîqmsi-controller@fe660000arm,gic-v3-its þfßîúppi-partitionsinterrupt-partition-0ùinterrupt-partition-1ù dma-controller@fea10000arm,pl330arm,primecell þ¡@ ×VW 0n #apb_pclk /dma-controller@fea30000arm,pl330arm,primecell þ£@ ×XY 0o #apb_pclk ši2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c þ©0ƒ{ #i2cpclk×>™££default+ =disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c þª0„| #i2cpclk×?™¤£default+=okayregulator@42rockchip,rk8602 B± Îvdd_npu_s0Ýñdp~ð3üH.regulator-state-memSi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c þ«0…} #i2cpclk×@™¥£default+ =disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c þ¬0†~ #i2cpclk×A™¦£default+ =disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c þ­0‡ #i2cpclk×B™§£default+ =disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer þ® ×!0TW #pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt þ¯0dc #tclkpclk×;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spi þ°×F0—’#spiclkapb_pclkl//qtxrx $ ™¨©ª£default+ =disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spi þ±×G0˜“#spiclkapb_pclkl//qtxrx $ ™«¬­£default+ =disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spi þ²×H0™”#spiclkapb_pclklššqtxrx $™®¯£default+=okay7™G ëÂpmic@0rockchip,rk806³B@  �×£default™°±²³ + C. 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Îvdd_0v75_s3regulator-state-mem ^ B q°nldo-reg2Ýñ øP øPÎvdd_ddr_pll_s0regulator-state-memS B øPnldo-reg3Ýñ q° q° Îavdd_0v75_s0regulator-state-memSnldo-reg4Ýñ øP øP Îvdd_0v85_s0regulator-state-memSnldo-reg5Ýñ q° q° Îvdd_0v75_s0regulator-state-memSspi@feb30000(rockchip,rk3588-spirockchip,rk3066-spi þ³×I0š•#spiclkapb_pclklššqtxrx $ ™¶·¸£default+ =disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uart þ´×L0«Ÿ#baudclkapb_pclkl// qtxrx™¹£default…{ =disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uart þµ×M0¯ #baudclkapb_pclkl/ / qtxrx™º£default…{=okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uart þ¶×N0³¡#baudclkapb_pclkl/ / qtxrx™»£default…{ =disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uart þ·×O0·¢#baudclkapb_pclklš š qtxrx™¼£default…{ =disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uart þ¸×P0»£#baudclkapb_pclklš š qtxrx™½£default…{ =disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uart þ¹×Q0¿¤#baudclkapb_pclklš šqtxrx™¾£default…{ =disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uart þº×R0Ã¥#baudclkapb_pclklnnqtxrx™¿£default…{ =disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uart þ»×S0Ǧ#baudclkapb_pclkln n qtxrx™À£default…{ =disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uart þ¼×T0˧#baudclkapb_pclkln n qtxrx™Á£default…{ =disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½0LK #pwmpclk™Â£default’ =disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½0LK #pwmpclk™Ã£default’ =disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½ 0LK #pwmpclk™Ä£default’ =disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½00LK #pwmpclk™Å£default’ =disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾0ON #pwmpclk™Æ£default’ =disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾0ON #pwmpclk™Ç£default’ =disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾ 0ON #pwmpclk™È£default’ =disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾00ON #pwmpclk™É£default’ =disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿0RQ #pwmpclk™Ê£default’ =disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿0RQ #pwmpclk™Ë£default’ =disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿ 0RQ #pwmpclk™Ì£default’ =disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿00RQ #pwmpclk™Í£default’ =disabledthermal-zonespackage-thermal v Œ šÎtripspackage-crit ªÁ8 ¶ criticalbigcore0-thermal vd Œ šÎtripsbigcore0-alert ªL ¶ÐpassiveÏbigcore0-crit ªÁ8 ¶ criticalcooling-mapsmap0 ÁÏ Æÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿbigcore2-thermal vd Œ šÎtripsbigcore2-alert ªL ¶ÐpassiveÐbigcore2-crit ªÁ8 ¶ criticalcooling-mapsmap0 ÁÐ Æÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿlittlecore-thermal vd Œ šÎtripslittlecore-alert ªL ¶ÐpassiveÑlittlecore-crit ªÁ8 ¶ criticalcooling-mapsmap0 ÁÑ0 Æÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcenter-thermal v Œ šÎtripscenter-crit ªÁ8 ¶ criticalgpu-thermal vd Œ šÎtripsgpu-alert ªL ¶ÐpassiveÒgpu-crit ªÁ8 ¶ criticalcooling-mapsmap0 ÁÒ ÆÓÿÿÿÿÿÿÿÿnpu-thermal v Œ šÎtripsnpu-crit ªÁ8 ¶ criticaltsadc@fec00000rockchip,rk3588-tsadc þÀ×�0ž�#tsadcapb_pclk7žG„€pVWjtsadc-apbtsadc ÕÔÀ ì ™Ô Õ£defaultsleep (=okayÎadc@fec10000rockchip,rk3588-saradc þÁ׎ >0‘�#saradcapb_pclkpU jsaradc-apb=okay PÖ i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c þÈ0ˆ€ #i2cpclk×C™×£default+=okayâ @typec-portc@22 fcs,fusb302 " �יأdefault \Ùconnectorusb-c-connector hdual rUSB-C xsource ƒ�Èports+port@0 endpoint3Ú%port@1 endpoint3Ûêport@2 endpoint3Üërtc@51haoyu,hym8563 Q½òhym8563£default™Ý �× �i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c þÉ0‰� #i2cpclk×D™Þ£default+=okayâ @codec@1brealtek,rt5616 01#mclk71G»€portendpoint3ß�i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c þÊ0Š‚ #i2cpclk×E™à£default+ =disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spi þË×J0›–#spiclkapb_pclkln nqtxrx $ ™áâã£default+ =disabledefuse@fecc0000rockchip,rk3588-otp þÌ 0Œ‹��#otpapb_pclkphyarbp§¦¨ jotpapbarb+cpu-code@2 id@7 cpu-leakage@17 cpu-leakage@18 cpu-leakage@19 log-leakage@1a gpu-leakage@1b cpu-version@1c  �npu-leakage@28 (codec-leakage@29 )dma-controller@fed10000arm,pl330arm,primecell þÑ@ ×Z[ 0p #apb_pclk nphy@fed60000rockchip,rk3588-hdptx-phy þÖ 0 T#refapbv8p#cde!""jphyapbinitcmnlaneroplllcpllŒä =disabledphy@fed80000rockchip,rk3588-usbdp-phy þØv0¡lVå#refclkimmortalpclkutmi(p   jinitcmnlanepcs_apbpma_apb ¢æ µç Æè Üé=okay ì ø r r$port+endpoint@0 3êÛendpoint@1 3ëÜphy@fee00000rockchip,rk3588-naneng-combphy þà0¨vW #refapbpipe7¨Gõávp<Cjphyapb ', 9ì=okayvphy@fee20000rockchip,rk3588-naneng-combphy þâ0ªxW #refapbpipe7ªGõávp>Ejphyapb ', 9í=okay*sram@ff001000 mmio-sram ÿðÿð+pinctrlrockchip,rk3588-pinctrlŒî+ïgpio@fd8a0000rockchip,gpio-bank ýŠ×0qr ü Oï ª *S [HEADER_10HEADER_08HEADER_32IR receiver [PWM3_IR_M0]�gpio@fec20000rockchip,gpio-bank þÂ×0st ü Oï ª *ƒ [HEADER_27HEADER_28HEADER_15HEADER_26HEADER_21HEADER_19HEADER_23HEADER_24HEADER_22HEADER_05HEADER_03gpio@fec30000rockchip,gpio-bank þÃ×0uv ü Oï@ ª *. [CSI1_11CSI1_12 gpio@fec40000rockchip,gpio-bank þÄ×0wx ü Oï` ª *Á [HEADER_35HEADER_38HEADER_40HEADER_36HEADER_37DSI0_12HEADER_33DSI0_10HEADER_07HEADER_16HEADER_18HEADER_29HEADER_31HEADER_12DSI0_08DSI0_14HEADER_11HEADER_13DSI1_10gpio@fec50000rockchip,gpio-bank þÅ×0yz ü Oï€ ª *C [DSI1_08DSI1_14DSI1_12CSI0_11CSI0_12rpcfg-pull-up kôpcfg-pull-down xòpcfg-pull-none ‡ðpcfg-pull-none-drv-level-2 ‡ ”öpcfg-pull-up-drv-level-1 k ”õpcfg-pull-up-drv-level-2 k ”ñpcfg-pull-none-smt ‡ £óauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout ¸ð…emmc-bus8€ ¸ññññññññ†emmc-clk ¸ñ‡emmc-cmd ¸ñˆemmc-data-strobe ¸ò‰eth1fspifspim1-pins` ¸ ñ ññññ ñ|gmac1gpuhdmii2c0i2c0m2-xfer ¸óó-i2c1i2c1m0-xfer ¸ ó ó£i2c2i2c2m0-xfer ¸ ó ó¤i2c3i2c3m0-xfer ¸ ó ó¥i2c4i2c4m0-xfer ¸ ó ó¦i2c5i2c5m0-xfer ¸ ó ó§i2c6i2c6m0-xfer ¸ ó ó×i2c7i2c7m0-xfer ¸ ó óÞi2c8i2c8m2-xfer ¸ ó óài2s0i2s0-lrck ¸ðŠi2s0-mclk ¸ð‹i2s0-sclk ¸ðŒi2s0-sdi0 ¸ð�i2s0-sdo0 ¸ðŽi2s1i2s1m0-lrck ¸ð�i2s1m0-sclk ¸ð‘i2s1m0-sdi0 ¸ð’i2s1m0-sdi1 ¸ð“i2s1m0-sdi2 ¸ð”i2s1m0-sdi3 ¸ð•i2s1m0-sdo0 ¸ ð–i2s1m0-sdo1 ¸ ð—i2s1m0-sdo2 ¸ ð˜i2s1m0-sdo3 ¸ ð™i2s2i2s2m1-lrck ¸ð›i2s2m1-sclk ¸ ðœi2s2m1-sdi ¸ ð�i2s2m1-sdo ¸ ðži2s3i2s3-lrck ¸ðŸi2s3-sclk ¸ð i2s3-sdi ¸ð¡i2s3-sdo ¸ð¢jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp ¸ôðððððð°pmupwm0pwm0m0-pins ¸ð1pwm1pwm1m1-pins ¸ ð2pwm2pwm2m0-pins ¸ð3pwm3pwm3m0-pins ¸ð4pwm4pwm4m0-pins ¸ ðÂpwm5pwm5m0-pins ¸ ðÃpwm6pwm6m0-pins ¸ ðÄpwm7pwm7m0-pins ¸ ðÅpwm8pwm8m0-pins ¸ ðÆpwm9pwm9m0-pins ¸ ðÇpwm10pwm10m0-pins ¸ ðÈpwm11pwm11m0-pins ¸ ðÉpwm12pwm12m0-pins ¸ ðÊpwm13pwm13m0-pins ¸ ðËpwm14pwm14m0-pins ¸ ðÌpwm15pwm15m0-pins ¸ ðÍrefclksatasata0sata1sata2sdiosdiom1-pins` ¸ðôôôôô„sdmmcsdmmc-bus4@ ¸ññññ€sdmmc-clk ¸ñ}sdmmc-cmd ¸ñ~sdmmc-det ¸ôspdif0spdif1spi0spi0m0-pins0 ¸õõõªspi0m0-cs0 ¸õ¨spi0m0-cs1 ¸õ©spi1spi1m1-pins0 ¸õõõ­spi1m1-cs0 ¸õ«spi1m1-cs1 ¸õ¬spi2spi2m2-pins0 ¸õ õõ¯spi2m2-cs0 ¸ õ®spi3spi3m1-pins0 ¸õ õõ¸spi3m1-cs0 ¸õ¶spi3m1-cs1 ¸õ·spi4spi4m0-pins0 ¸õõõãspi4m0-cs0 ¸õáspi4m0-cs1 ¸õâtsadctsadc-shut-org ¸ðÔuart0uart0m1-xfer ¸ô ô0uart1uart1m1-xfer ¸ ô ô¹uart2uart2m0-xfer ¸ ô ôºuart3uart3m1-xfer ¸ ô ô»uart4uart4m1-xfer ¸ ô ô¼uart5uart5m1-xfer ¸ ô ô½uart6uart6m1-xfer ¸ ô ô¾uart7uart7m1-xfer ¸ ô ô¿uart8uart8m1-xfer ¸ ô ôÀuart9uart9m1-xfer ¸ ô ôÁvopbt656gpio-functsadc-gpio-func ¸ðÕeth0gmac0gpio-ledssys-led-pin ¸ð usr-led-pin ¸ð headphonehp-det ¸ðhym8563hym8563-int ¸ôÝir-receiverir-receiver-pin ¸ð pciepcie2-0-rst ¸ ðpcie2-1-rst ¸ðtpcie2-2-rst ¸ðxpcie-m20-pwren ¸ðpcie-m21-pwren ¸ðusbtypec5v-pwren ¸ðusbc0-int ¸ôØusb20-host-pwren ¸ðusb@fc400000rockchip,rk3588-dwc3snps,dwc3 ü@@×Ý0—–•#ref_clksuspend_clkbus_clkPhost X÷ø]usb2-phyusb3-phy gutmi_wide/ pSw¿à=okaysyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon ý[€syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon ý\syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon ý\À@syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]@@+usb2phy@4000rockchip,rk3588-usb2phy @½0 #phyclk òusb480m_phy1׊pnjphyapb=okayotg-portv=okay÷i2s@fddc8000rockchip,rk3588-i2s-tdm ýÜ€×¼0ññî#mclk_txmclk_rxhclk7ïølnqtx/ pºjtx-m =disabledi2s@fddf4000rockchip,rk3588-i2s-tdm ýß@׺099?#mclk_txmclk_rxhclk76ølnqtx/ pÚjtx-m =disabledi2s@fddf8000rockchip,rk3588-i2s-tdm ý߀×»0++'#mclk_txmclk_rxhclk7(ølnqrx/ pÇjrx-m =disabledi2s@fde00000rockchip,rk3588-i2s-tdm ýà×¾0&&"#mclk_txmclk_rxhclk7#ølnqrx/ pîjrx-m =disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+ 00@E;JOt)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×syspmcmsglegacyerr*;`Nùùùù\m|ú„Xû ]pcie-phy/ "Tððð ð à @0 @@þð¿dbiapbconfigp&+ jpwrpipe=okay Žršülegacy-interrupt-controllerª* ×ùpcie-ep@fe150000rockchip,rk3588-pcie-epP @ @þ @ @0¿dbidbi2apbaddr_spaceatu00@E;JOt)#aclk_mstaclk_slvaclk_dbipclkauxpipe�× +syspmcmsglegacyerrdma0dma1dma2dma3m„Xû ]pcie-phy/ "p&+ jpwrpipe =disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+ 00AF<KPu)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ÿþsyspmcmsglegacyerr*;`Nýýýý\m|ú„Xû ]pcie-phy/ "Tñññ ñ à @ @@0 @@@þñ¿dbiapbconfigp', jpwrpipe =disabledlegacy-interrupt-controllerª* ×ÿýpcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /00BG=LQ¯)#aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×óòñðïsyspmcmsglegacyerr*;`Nþþþþ\m| q „Xÿ ]pcie-phy/ "Tòòò ò à € €@0 @€@þò¿dbiapbconfigp(- jpwrpipe+=okay Žr šw£default™legacy-interrupt-controllerª* ×ðþethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a þ ×ãâmacirqeth_wake_irq(067X]40#stmmacethclk_mac_refpclk_macaclk_macptp_ref/ !p# jstmmacethŒj¿,Ðàñ =disabledmdiosnps,dwmac-mdio+stmmac-axi-config *:rx-queues-configJqueue0queue1tx-queues-config`queue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci þ"×(0c`fUp#satapmaliverxoobrefasicv+ =disabledsata-port@0 ˆ@Xÿ ]sata-phy• ¤ phy@fed90000rockchip,rk3588-usbdp-phy þÙv0¡mW#refclkimmortalpclkutmi(pjinitcmnlanepcs_apbpma_apb ¢ µç Æ Üé=okayøphy@fee10000rockchip,rk3588-naneng-combphy þá0©wW #refapbpipe7©Gõávp=Djphyapb ', 9=okayÿphy@fee80000rockchip,rk3588-pcie3-phy þèv0y#pclkpHjphy ', Æ=okayûopp-table-cluster0operating-points-v2 × opp-1008000000 â<Ü é L¸ L¸~ð ÷œ@opp-1200000000 âG†Œ é ß4 ß4~ð ÷œ@opp-1416000000 âTfr é ¢„ ¢„~ð ÷œ@ opp-1608000000 â_Ø" é øP øP~ð ÷œ@opp-1800000000 âkIÒ é~ð~ð~ð ÷œ@opp-table-cluster1operating-points-v2 ×opp-1200000000 âG†Œ é L¸ L¸B@ ÷œ@opp-1416000000 âTfr é  B@ ÷œ@opp-1608000000 â_Ø" é ¢„ ¢„B@ ÷œ@opp-1800000000 âkIÒ é øP øPB@ ÷œ@opp-2016000000 âx)¸ éHHB@ ÷œ@opp-2208000000 ⃛h éllB@ ÷œ@opp-2400000000 â�  éB@B@B@ ÷œ@opp-table-cluster2operating-points-v2 ×opp-1200000000 âG†Œ é L¸ L¸B@ ÷œ@opp-1416000000 âTfr é  B@ ÷œ@opp-1608000000 â_Ø" é ¢„ ¢„B@ ÷œ@opp-1800000000 âkIÒ é øP øPB@ ÷œ@opp-2016000000 âx)¸ éHHB@ ÷œ@opp-2208000000 ⃛h éllB@ ÷œ@opp-2400000000 â�  éB@B@B@ ÷œ@opp-table-gpuoperating-points-v2!opp-300000000 âᣠé L¸ L¸ øPopp-400000000 âׄ é L¸ L¸ øPopp-500000000 âÍe é L¸ L¸ øPopp-600000000 â#ÃF é L¸ L¸ øPopp-700000000 â)¹' é ®` ®` øPopp-800000000 â/¯ é q° q° øPopp-900000000 â5¤é é 5 5 øPopp-1000000000 â;šÊ é øP øP øPadc-keys-0 adc-keys   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compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapclock-namespower-domainsstatusmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthfifo-depthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlydai-formatmclk-fsmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-cssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyvbus-supplydata-rolelabelpower-rolesource-pdoswakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfmode-switchorientation-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltstdout-pathlinux,default-triggersimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,hp-det-gpiosimple-audio-card,widgetssimple-audio-card,routingsound-daienable-active-high