Ð þíüf8ï( Nîà(xunlong,rk3399-orangepirockchip,rk3399 +7Orange Pi RK3399 Boardaliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000ƒ/i2c@ff3e0000ˆ/serial@ff180000�/serial@ff190000˜/serial@ff1a0000 /serial@ff1b0000¨/serial@ff370000°/spi@ff1c0000µ/spi@ff1d0000º/spi@ff1e0000¿/spi@ff350000Ä/spi@ff1f0000É/spi@ff200000Î/ethernet@fe300000Ø/mmc@fe310000Ý/mmc@fe320000â/mmc@fe330000cpus+cpu-mapcluster0core0çcore1çcore2çcore3çcluster1core0çcore1çcpu@0ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@1ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@2ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@3ëcpuarm,cortex-a53÷ûpsci å#2dL \€i@{ˆ€•@§€´ Å Ù äcpu@100ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôcpu@101ëcpuarm,cortex-a72÷ûpsci  #2´L \Ài@{ˆ€•@§´ÅÙäthermal-idle#ì'øôl2-cache-cluster0cache^k@}ä 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§disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart÷ÿ7„„"›baudclkapb_pclk®f!ídefaultû‰ §disabledi2c@ff3c0000rockchip,rk3399-i2c÷ÿ<+„ G ë„ „ ›i2cpclk®9ídefaultûŠ+§okayЀè¨ÿpmic@1brockchip,rk808÷ ‹®óàrtc_clko_socrtc_clko_wifiídefaultûŒ‡¨¶LÂLÎLÚLæLòLþL L L #L 0LoƒäGregulatorsDCDC_REG1 =vdd_center L ` r ®` Šã` ¢qregulator-state-mem ·DCDC_REG2 =vdd_cpu_l L ` r ®` Šã` ¢qä regulator-state-mem ·DCDC_REG3 =vcc_ddr L `regulator-state-mem ÐDCDC_REG4 =vcc_1v8 L ` rw@ Š2Z äMregulator-state-mem Ð èw@LDO_REG1 =vcc1v8_dvp L ` rw@ Š3á@regulator-state-mem ·LDO_REG2 =vcc3v0_tp L ` rw@ Š3á@regulator-state-mem ·LDO_REG3 =vcc1v8_pmupll L ` r 5 Š&% regulator-state-mem Ð èw@LDO_REG4 =vcc_sdio L ` rw@ Š3á@ä/regulator-state-mem Ð è-ÆÀLDO_REG5 =vcca3v0_codec L ` rw@ Š3á@regulator-state-mem ·LDO_REG6 =vcc_1v5 L ` r 5 Š&% regulator-state-mem Ð èã`LDO_REG7 =vcca1v8_codec L ` r 5 Š&% ä¡regulator-state-mem ·LDO_REG8 =vcc_3v0 L ` rw@ Š3á@äƒregulator-state-mem Ð è-ÆÀSWITCH_REG1 =vcc3v3_s3 L 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rockchip,rk3399-wdtsnps,dw-wdt÷ÿ„€|®xrktimer@ff850000rockchip,rk3399-timer÷ÿ…®QhZ ›pclktimerspdif@ff870000rockchip,rk3399-spdif÷ÿ‡®B|b�tx ›mclkhclkU×ídefaultû§† §disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿˆ®'|bb�txrx›i2s_clki2s_hclkVÔíbclk_onbclk_offû¨©† §disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿ‰®(|bb�txrx›i2s_clki2s_hclkWÕídefaultûª† §disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s÷ÿŠ®)|bb�txrx›i2s_clki2s_hclkXÖ† §disabledä»vop@ff8f0000rockchip,rk3399-vop-lit ÷ÿ� ÿ� ®w+ÛÛGׄõáÛµÛ›aclk_vopdclk_vophclk_vop ««� –axiahbdclk§okayport+äendpoint@0÷—¬äÁendpoint@1÷—­äÆendpoint@2÷—®ä¿endpoint@3÷—¯äÃendpoint@4÷—°ä<iommu@ff8f3f00rockchip,iommu÷ÿ�?®wÛÛ ›aclkiface ²§okayä«vop@ff900000rockchip,rk3399-vop-big ÷ÿ� ÿ� ®v+ÙÙGׄõáÙ´Ù›aclk_vopdclk_vophclk_vop «±� –axiahbdclk§okayport+äendpoint@0÷—²äÅendpoint@1÷—³äÀendpoint@2÷—´ä¾endpoint@3÷—µäÂendpoint@4÷—¶ä;iommu@ff903f00rockchip,iommu÷ÿ�?®vÙÙ ›aclkiface ²§okayä±isp0@ff910000rockchip,rk3399-cif-isp÷ÿ‘@®+néã›ispaclkhclk «·y¸~dphy §disabledports+port@0÷+iommu@ff914000rockchip,iommu ÷ÿ‘@ÿ‘P®+éã ›aclkiface ² Dä·isp1@ff920000rockchip,rk3399-cif-isp÷ÿ’@®,oêä›ispaclkhclk «¹yº~dphy §disabledports+port@0÷+iommu@ff924000rockchip,iommu ÷ÿ’@ÿ’P®,êä ›aclkiface ² Dä¹hdmi-soundsimple-audio-card _i2s x ’hdmi-sound§okaysimple-audio-card,cpu ©»simple-audio-card,codec ©¼hdmi@ff940000rockchip,rk3399-dw-hdmi÷ÿ”!®(tqpo›iahbisfrcecgrfref†§okay ³½ä¼ports+port@0÷+endpoint@0÷—¾ä´endpoint@1÷—¿ä®port@1÷dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€®- ¢p£o›refpclkphy_cfggrf�û–apb+ §disabledports+port@0÷+endpoint@0÷—Àä³endpoint@1÷—Áä¬port@1÷dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€€®. ¢q¤o›refpclkphy_cfggrf�ü–apb+ % §disabledäºports+port@0÷+endpoint@0÷—Âäµendpoint@1÷—Ãä¯port@1÷dp@ff970000rockchip,rk3399-edp÷ÿ—€® jlo ›dppclkgrfídefaultûÄ�–dp §disabledports+port@0÷+endpoint@0÷—Åä²endpoint@1÷—Æä­port@1÷gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860÷ÿš0® 1jobmmugpuÐ#2 P#§okayÅÇ ¿Èäkpinctrlrockchip,rk3399-pinctrl+ˆgpio@ff720000rockchip,gpio-bank÷ÿr„® Ë Û¢ ä(gpio@ff730000rockchip,gpio-bank÷ÿs„® Ë Û¢ ä‹gpio@ff780000rockchip,gpio-bank÷ÿxP® Ë Û¢ äHgpio@ff788000rockchip,gpio-bank÷ÿx€Q® Ë Û¢ ä#gpio@ff790000rockchip,gpio-bank÷ÿyR® Ë Û¢ ä’pcfg-pull-up çäËpcfg-pull-down ôäÍpcfg-pull-none äÉpcfg-pull-none-12ma   äÌpcfg-pull-none-13ma   äÊpcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma ç pcfg-pull-up-8ma ç pcfg-pull-up-18ma ç pcfg-pull-up-20ma ç pcfg-pull-down-4ma ô pcfg-pull-down-8ma ô pcfg-pull-down-12ma ô  pcfg-pull-down-18ma ô pcfg-pull-down-20ma ô pcfg-output-high pcfg-output-low +pcfg-input-enable 6pcfg-input-pull-up 6 çpcfg-input-pull-down 6 ôclockclk-32k CÉcifcif-clkin C Écif-clkouta C Éedpedp-hpd CÉäÄgmacrgmii-pinsð CÊÉ É Ê É ÉÉÉÉÊÊÉÉÊÊä rmii-pins  C É Ê É É ÉÉÉÉÊÊphy-intb C Ëä!phy-rstb CÉä"i2c0i2c0-xfer CÉÉäŠi2c1i2c1-xfer CÉÉä>i2c2i2c2-xfer CÌÌä?i2c3i2c3-xfer CÉÉä@i2c4i2c4-xfer C É Éä�i2c5i2c5-xfer C É ÉäAi2c6i2c6-xfer C É ÉäBi2c7i2c7-xfer CÉÉäCi2c8i2c8-xfer CÉÉä™i2s0i2s0-2ch-bus` CÉÉÉÉÉÉi2s0-2ch-bus-bclk-off` CÉÉÉÉÉÉi2s0-8ch-bus� CÉÉÉÉÉÉÉÉÉä¨i2s0-8ch-bus-bclk-off� CÉÉÉÉÉÉÉÉÉä©i2s1i2s1-2ch-busP CÉÉÉÉÉäªi2s1-2ch-bus-bclk-offP CÉÉÉÉÉsdio0sdio0-bus1 CËsdio0-bus4@ CËËËËä%sdio0-cmd CËä&sdio0-clk CÉä'sdio0-cd CËsdio0-pwr CËsdio0-bkpwr CËsdio0-wp CËsdio0-int CËsdmmcsdmmc-bus1 CËsdmmc-bus4@ CË Ë Ë Ëä-sdmmc-clk C Éä*sdmmc-cmd C Ëä+sdmmc-cd CËä,sdmmc-wp CËsuspendap-pwroff CÉddrio-pwroff CÉspdifspdif-bus CÉä§spdif-bus-1 CÉspi0spi0-clk CËäRspi0-cs0 CËäUspi0-cs1 CËspi0-tx CËäSspi0-rx CËäTspi1spi1-clk C ËäVspi1-cs0 C ËäYspi1-rx CËäXspi1-tx CËäWspi2spi2-clk C ËäZspi2-cs0 C Ëä]spi2-rx C Ëä\spi2-tx C Ëä[spi3spi3-clk CËä…spi3-cs0 CËäˆspi3-rx CËä‡spi3-tx CËä†spi4spi4-clk CËä^spi4-cs0 CËäaspi4-rx CËä`spi4-tx CËä_spi5spi5-clk CËäcspi5-cs0 CËäfspi5-rx CËäespi5-tx CËädtestclktest-clkout0 CÉtest-clkout1 CÉtest-clkout2 CÉtsadcotp-pin CÉälotp-out CÉämuart0uart0-xfer CËÉäDuart0-cts CÉäEuart0-rts CÉäFuart1uart1-xfer C Ë ÉäNuart2auart2a-xfer CË Éuart2buart2b-xfer CËÉuart2cuart2c-xfer CËÉäOuart3uart3-xfer CËÉäPuart3-cts CÉuart3-rts CÉuart4uart4-xfer CËÉä‰uarthdcpuarthdcp-xfer CËÉpwm0pwm0-pin CÉäšpwm0-pin-pull-down CÍvop0-pwm-pin CÉvop1-pwm-pin CÉpwm1pwm1-pin CÉä›pwm1-pin-pull-down CÍpwm2pwm2-pin CÉäœpwm2-pin-pull-down CÍpwm3apwm3a-pin CÉä�pwm3bpwm3b-pin CÉhdmihdmi-i2c-xfer CÉÉhdmi-cec CÉpciepci-clkreqn-cpm CÉpci-clkreqnb-cpm CÉäbuttonspwr-btn CËäÏpmiccpu-b-sleep CÍä�gpu-sleep CÍäŽpmic-int-l CËäŒsdsdmmc0-pwr-h CÉäÑusb2vcc5v0-host-en CÉäÓvcc5v0-typec-en CÉäÔsdio-pwrseqwifi-reg-on-h C ÉäÐwifiwifi-host-wake-l CÉä)bluetoothbt-enable-h C ÉäKbt-host-wake-l CÉäIbt-wake-l CÉäJmpu6500gsensor-int-l CÉä�lsm6ds3gyr-int-l CÉä‘cm32181light-int-l CÉä“fusb302chg-cc-int-l CËä”opp-table-0operating-points-v2 Qä opp00 \Q– c –¨ –¨Ð qœ@opp01 \#ÃF c –¨ –¨Ðopp02 \0£, c øP øPÐopp03 \<Ü cHHÐopp04 \G†Œ cB@B@Ðopp05 \Tfr c*ˆ*ˆÐopp-table-1operating-points-v2 Qäopp00 \Q– c –¨ –¨Ð qœ@opp01 \#ÃF c –¨ –¨Ðopp02 \0£, c –¨ –¨Ðopp03 \<Ü c Yø YøÐopp04 \G†Œ c~ð~ðÐopp05 \Tfr c£è£èÐopp06 \_Ø" cÈàÈàÐopp07 \kIÒ cO€O€Ðopp-table-2operating-points-v2äÇopp00 \ ë c –¨ –¨Œ0opp01 \³Ü@ c –¨ –¨Œ0opp02 \ׄ c –¨ –¨Œ0opp03 \Íe c Yø YøŒ0opp04 \#ÃF cHHŒ0opp05 \/¯ cÈàÈàŒ0chosen ‚serial2:1500000n8external-gmac-clock fixed-clockÐsY@ àclkin_gmacóäadc-keys adc-keys ŽÎ šbuttons «w@ Ådbutton-up XVolume Up Ós Þ† button-down XVolume Down Ór Þ“àbutton-back XBack Óž Þ¨button-menu XMenu Ó‹ Þ Ðdc-12vregulator-fixed =dc_12v L ` r· Š·äÕgpio-keys gpio-keys økey-power d ¸( XGPIO Power Ót ídefaultûϨsdio-pwrseqmmc-pwrseq-simpleG ›ext_clockídefaultûÐ ²( ä$vcc1v8-s3regulator-fixed =vcc1v8_s3 L ` rw@ Šw@ !Mä=vcc3v0-sdregulator-fixed & 9(ídefaultûÑ ` Š-ÆÀ r-ÆÀ =vcc3v0_sd !Lä.vcc3v3-sysregulator-fixed =vcc3v3_sys L ` r2Z  Š2Z  !ÒäLvcc5v0-host-regulatorregulator-fixed & 9’ídefaultûÓ =vcc5v0_host L !Òä¢vbus-typec-regulatorregulator-fixed & 9‹ídefaultûÔ =vbus_typec !Òä•vcc-sysregulator-fixed =vcc_sys L ` rLK@ ŠLK@ !ÕäÒvdd-logpwm-regulator >Öa¨ CÒ =vdd_log L ` r 5 Š\À compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modephy-handletx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqdisable-wpkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supplyvdd-supplyvid-supplyvbus-supplydata-rolelabelop-sink-microwattpower-rolesink-pdossource-pdostry-power-role#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltautorepeatdebounce-intervallinux,input-typeenable-active-highgpiopwmspwm-supply