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™'ÃP®(·mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ1@®@ÀðÑ€ îMœ�›biuciuciu-driveciu-sampleÎ�y–reset§okay+ÙÐúð€ãð!"ídefault û"#$0wifi@1brcm,bcm4329-fmac÷ %® 1host-wakeídefaultû&mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc÷þ2@®AÀðÑ€+Í> ë ÎLš››biuciuciu-driveciu-sampleÎ�z–reset§okayÙSð e%nídefault û'()mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1÷þ3® y+N> ëÂNð›clk_xinclk_ahbàemmc_cardclockóy* ~phy_arasan�§okayÙ"ä�usb@fe380000 generic-ehci÷þ8®ÈÉ+y,~usb§okayusb@fe3a0000 generic-ohci÷þ:®ÈÉ+y,~usb§okayusb@fe3c0000 generic-ehci÷þ<®ÊË-y.~usb§okayusb@fe3e0000 generic-ohci÷þ>® ÊË-y.~usb§okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell÷þCM ›apb_pclkçdebug@fe432000&arm,coresight-cpu-debugarm,primecell÷þC M ›apb_pclkçdebug@fe434000&arm,coresight-cpu-debugarm,primecell÷þC@M ›apb_pclkçdebug@fe436000&arm,coresight-cpu-debugarm,primecell÷þC`M ›apb_pclkçdebug@fe610000&arm,coresight-cpu-debugarm,primecell÷þaL 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F±y²~dphy §disabledports+port@0÷+iommu@ff924000rockchip,iommu ÷ÿ’@ÿ’P®,êä ›aclkiface M 'ä±hdmi-soundsimple-audio-card Bi2s [ uhdmi-sound §disabledsimple-audio-card,cpu Œ³simple-audio-card,codec Œ´hdmi@ff940000rockchip,rk3399-dw-hdmi÷ÿ” ®(tqpo›iahbisfrcecgrfreff§okay –µídefaultû¶ä´ports+port@0÷+endpoint@0÷V·ä¬endpoint@1÷V¸ä¦port@1÷dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€®- ¢p£o›refpclkphy_cfggrf�û–apb+ §disabledports+port@0÷+endpoint@0÷V¹ä«endpoint@1÷Vºä¤port@1÷dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi÷ÿ–€€®. ¢q¤o›refpclkphy_cfggrf�ü–apb+ À §disabledä²ports+port@0÷+endpoint@0÷V»ä­endpoint@1÷V¼ä§port@1÷dp@ff970000rockchip,rk3399-edp÷ÿ—€® jlo ›dppclkgrfídefaultû½�–dp §disabledports+port@0÷+endpoint@0÷V¾äªendpoint@1÷V¿ä¥port@1÷gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860÷ÿš0® 1jobmmugpuÐ#2 P#§okayÅÀ ¢Áägpinctrlrockchip,rk3399-pinctrl+ˆgpio@ff720000rockchip,gpio-bank÷ÿr€® ® ¾¢ ä%gpio@ff730000rockchip,gpio-bank÷ÿs€® ® ¾¢ ä‡gpio@ff780000rockchip,gpio-bank÷ÿxP® ® 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compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmddr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpoint#sound-dai-cellsmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nshp-det-gpiospk-con-gpioreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supplyvbus-supplydata-rolelabel#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmorientation-switchrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nspwmsbrightness-levelsdefault-brightness-levelautorepeatdebounce-intervallinux,codedefault-statelinux,default-triggersimple-audio-card,widgetssimple-audio-card,routingreset-gpiosenable-active-high