Ð þíkê8eh(‚e0#geekbuying,geekboxrockchip,rk3368 +7GeekBoxaliases=/pinctrl/gpio@ff750000C/pinctrl/gpio@ff780000I/pinctrl/gpio@ff790000O/pinctrl/gpio@ff7a0000U/i2c@ff650000Z/i2c@ff660000_/i2c@ff140000d/i2c@ff150000i/i2c@ff160000n/i2c@ff170000s/serial@ff180000{/serial@ff190000ƒ/serial@ff690000‹/serial@ff1b0000“/serial@ff1c0000›/spi@ff110000 /spi@ff120000¥/spi@ff130000ª/ethernet@ff290000´/mmc@ff0f0000cpus+cpu-mapcluster0core0¹core1¹core2¹core3¹cluster1core0¹core1¹core2¹core3¹ cpu@0½cpuarm,cortex-a53ÉÍpsciÛêcpu@1½cpuarm,cortex-a53ÉÍpsciÛêcpu@2½cpuarm,cortex-a53ÉÍpsciÛêcpu@3½cpuarm,cortex-a53ÉÍpsciÛê cpu@100½cpuarm,cortex-a53ÉÍpsciÛêcpu@101½cpuarm,cortex-a53ÉÍpsciÛêcpu@102½cpuarm,cortex-a53ÉÍpsciÛêcpu@103½cpuarm,cortex-a53ÉÍpsciÛêarm-pmuarm,cortex-a53-pmu`òpqrstuvw ý psci arm,psci-0.2Ôsmctimerarm,armv8-timer0ò ÿÿ ÿ ÿoscillator fixed-clockn6 xin24m3êAmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshcÉÿ @@ðÑ€ N È D r vUbiuciuciu-driveciu-samplea ò l €sreset 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disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uartÉÿn6N M UUbaudclkapb_pclk ò7óý disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uartÉÿn6N N VUbaudclkapb_pclk ò8óý disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uartÉÿn6N P XUbaudclkapb_pclk ò:óý disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uartÉÿn6N Q YUbaudclkapb_pclk ò;óý disableddma-controller@ff250000arm,pl330arm,primecellÉÿ%@ò 0N à Uapb_pclkthermal-zonescpu-thermalGd]ˆk tripscpu_alert0{$ø‡ÐÄpassiveê!cpu_alert1{8€‡ÐÄpassiveê"cpu_crit{s‡Ð Äcriticalcooling-mapsmap0’!0—ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1’"0—ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermalGd]ˆk tripsgpu_alert0{8€‡ÐÄpassiveê#gpu_crit{Á8‡Ð Äcriticalcooling-mapsmap0’#0—ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3368-tsadcÉÿ( ò%N H ZUtsadcapb_pclkl Ÿ stsadc-apbÉinitdefaultsleep×$¦%°$ºÐsokayçþê ethernet@ff290000rockchip,rk3368-gmacÉÿ) òmacirq)&8N  f g c € Å ]MUstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macokay6'ArgmiiJinputW g(Édefault×)~0‡usb@ff500000 generic-ehciÉÿP òN Âokayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2ÉÿX òN ÁUotg�otg˜ª¹€€@@ okaydma-controller@ff600000arm,pl330arm,primecellÉÿ`@ò 0N  Uapb_pclkêBi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2cÉÿeN LUi2c ò<Édefault×*+okaypmic@1brockchip,rk808ÉÉdefault×+, -òÈé.õ.. ..%.1 =.I.V.c  xin32krk808-clkout23regulatorsDCDC_REG1p„– ®`®ã`Ævdd_cpuDCDC_REG2p„– ®`®ã`Ævdd_logDCDC_REG3p„Ævcc_ddrDCDC_REG4p„–2Z ®2Z Ævcc_ioê LDO_REG1p„–w@®w@ Ævcc18_flashê LDO_REG2p„–2Z ®2Z  Ævcc33_lcdLDO_REG3p„–B@®B@Ævdd_10LDO_REG4„–w@®w@Ævcca_18LDO_REG5p„–w@®2Z  Ævccio_sdLDO_REG6p„–B@®B@ Ævdd10_lcdLDO_REG7p„–w@®w@Ævcc_18LDO_REG8p„–w@®w@ Ævcc18_lcdSWITCH_REG1Ævcc_sdSWITCH_REG2p„Ævcc_lanê'i2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cÉÿf ò=+Ui2cN MÉdefault×/ disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmÉÿhÕÉdefault×0N _ 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disabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdtÉÿ€N p òOokaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timerÉÿ�  òBN a U Upclktimerspdif@ff880000rockchip,rk3368-spdifÉÿˆ ò6N S Ð UmclkhclkQBVtxÉdefault×C` disabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2sÉÿ‰ ò(Ui2s_clki2s_hclkN T ÎQBBVtxrx` disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2sÉÿ‰€ ò5Ui2s_clki2s_hclkN R ÏQBBVtxrxÉdefault×D` disablediommu@ff900800rockchip,iommuÉÿ� òN Ê Ô UaclkifaceqE  disablediommu@ff914000rockchip,iommu Éÿ‘@ÿ‘P òN Í Õ UaclkifaceqE Œ disablediommu@ff930300rockchip,iommuÉÿ“ òN Æ Ñ UaclkifaceqE  disablediommu@ff9a0440rockchip,iommu Éÿš@@ÿš€@ ò N Ð Ü Uaclkiface disablediommu@ff9a0800rockchip,iommuÉÿšò  N Ð Ü Uaclkiface disabledqos@ffad0000rockchip,rk3368-qossysconÉÿ­ ê4qos@ffad0080rockchip,rk3368-qossysconÉÿ­€ ê5qos@ffad0100rockchip,rk3368-qossysconÉÿ­ ê6qos@ffad0180rockchip,rk3368-qossysconÉÿ­€ ê7qos@ffad0200rockchip,rk3368-qossysconÉÿ­ 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5GGêi2c4i2c4-xfer 5GGêi2c5i2c5-xfer 5GGêi2si2s-8ch-bus�5 G GGGGGGGGêDpwm0pwm0-pin5Gê0pwm1pwm1-pin5Gê1pwm3pwm3-pin5Gê2sdio0sdio0-bus15Hsdio0-bus4@5HHHHsdio0-cmd5Hsdio0-clk5Gsdio0-cd5Hsdio0-wp5Hsdio0-pwr5Hsdio0-bkpwr5Hsdio0-int5Hsdmmcsdmmc-clk5 Gsdmmc-cmd5 Hsdmmc-cd5 Hsdmmc-bus15Hsdmmc-bus4@5HHHHspdifspdif-tx5GêCspi0spi0-clk5Hêspi0-cs05Hêspi0-cs15Hspi0-tx5Hêspi0-rx5Hêspi1spi1-clk5Hêspi1-cs05Hêspi1-cs15Hspi1-rx5Hêspi1-tx5Hêspi2spi2-clk5 Hêspi2-cs05 Hêspi2-rx5 Hêspi2-tx5 Hêtsadcotp-pin5Gê$otp-out5Gê%uart0uart0-xfer 5HGuart0-cts5Guart0-rts5Guart1uart1-xfer 5HGuart1-cts5Guart1-rts5Guart2uart2-xfer 5HGê3uart3uart3-xfer 5HGuart3-cts5Guart3-rts5Guart4uart4-xfer 5HGuart4-cts5Guart4-rts5Girir-int5GêKkeyspwr-key5GêLpmicpmic-sleep5Gê,pmic-int5Hê+chosenCserial2:115200n8memory@0½memoryÉ€gmac-clk fixed-clocksY@  ext_gmac3ê(ir-receivergpio-ir-receiver OJÉdefault×Kgpio-keys gpio-keysÉdefault×Lkey-power O- UGPIO Power[tfgpio-leds gpio-ledsled-0 OMUgeekbox:blue:ledtonled-1 OMUgeekbox:red:ledtoffvcc-sys-regulatorregulator-fixedÆvcc_sys–LK@®LK@p„ê. compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2ethernet0mmc0cpudevice_typeregenable-method#cooling-cellsphandleinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyclocksclock-namesfifo-depthresetsreset-namesstatusbus-widthcap-mmc-highspeednon-removablevmmc-supplyvqmmc-supplypinctrl-namespinctrl-0#io-channel-cellsreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outassigned-clocksassigned-clock-parentstx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-name#pwm-cells#mbox-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#sound-dai-cellspower-domains#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathgpioslabellinux,codewakeup-sourcedefault-state